On the Thermal Models for Resistive Random Access Memory Circuit Simulation

Kinetic Monte Carlo simulation analysis of the conductance drift in Multilevel HfO2-based RRAM devices

The drift characteristics of valence change memory (VCM) devices have been analyzed through both experimental analysis and 3D kinetic Monte Carlo (kMC) simulations. By simulating six distinct low-resistance states (LRS) over a 24-hour period at room temperature, we aim to assess the device temporal stability and retention. Our results demonstrate the feasibility of multi-level operation and reveal insights into the conductive filament (CF) dynamics. The cumulative distribution functions (CDFs) of read-out currents measured at different time intervals provide a comprehensive view of the device performance for the different conductance levels. These findings not only enhance the understanding of VCM device switching behaviour but also allow the development of strategies for improving retention, thereby advancing the development of reliable nonvolatile resistive switching memory technologies.

An overview of critical applications of resistive random access memory

The rapid advancement of new technologies has resulted in a surge of data, while conventional computers are nearing their computational limits. The prevalent von Neumann architecture, where processing and storage units operate independently, faces challenges such as data migration through buses, leading to decreased computing speed and increased energy loss. Ongoing research aims to enhance computing capabilities through the development of innovative chips and the adoption of new system architectures. One noteworthy advancement is Resistive Random Access Memory (RRAM), an emerging memory technology. RRAM can alter its resistance through electrical signals at both ends, retaining its state even after power-down. This technology holds promise in various areas, including logic computing, neural networks, brain-like computing, and integrated technologies combining sensing, storage, and computing. These cutting-edge technologies offer the potential to overcome the performance limitations of traditional architectures, significantly boosting computing power. This discussion explores the physical mechanisms, device structure, performance characteristics, and applications of RRAM devices. Additionally, we delve into the potential future adoption of these technologies at an industrial scale, along with prospects and upcoming research directions.

Thermal Compact Modeling and Resistive Switching Analysis in Titanium Oxide-Based Memristors

Resistive switching devices based on the Au/Ti/TiO2/Au stack were developed. In addition to standard electrical characterization by means of I-V curves, scanning thermal microscopy was employed to localize the hot spots on the top device surface (linked to conductive nanofilaments, CNFs) and perform in-operando tracking of temperature in such spots. In this way, electrical and thermal responses can be simultaneously recorded and related to each other. In a complementary way, a model for device simulation (based on COMSOL Multiphysics) was implemented in order to link the measured temperature to simulated device temperature maps. The data obtained were employed to calculate the thermal resistance to be used in compact models, such as the Stanford model, for circuit simulation. The thermal resistance extraction technique presented in this work is based on electrical and thermal measurements instead of being indirectly supported by a single fitting of the electrical response (using just I-V curves), as usual. Besides, the set and reset voltages were calculated from the complete I-V curve resistive switching series through different automatic numerical methods to assess the device variability. The series resistance was also obtained from experimental measurements, whose value is also incorporated into a compact model enhanced version.

3D simulation of conductive nanofilaments in multilayer h-BN memristors via a circuit breaker approach

A 3D simulation of conductive nanofilaments (CNFs) in multilayer hexagonal-BN memristors is performed. To do so, a simulation tool based on circuit breakers is developed including for the first time a 3D resistive network. The circuit breakers employed can be modeled with two, three and four resistance states; in addition, a series resistance and a module to account for quantum effects, by means of the quantum point contact model, are also included. Finally, to describe real dielectric situations, regions with a high defect density are modeled with a great variety of geometrical shapes to consider their influence in the resistive switching (RS) process. The simulator has been tuned with measurements of h-BN memristive devices, fabricated with chemical-vapour-deposition grown h-BN layers, which were electrically and physically characterized. We show the formation of CNFs that produce filamentary charge conduction in our devices. Moreover, the simulation tool is employed to describe partial filament rupture in reset processes and show the low dependence of the set voltage on the device area, which is seen experimentally.

TiN/Ti/HfO2/TiN memristive devices for neuromorphic computing: from synaptic plasticity to stochastic resonance

We characterize TiN/Ti/HfO2/TiN memristive devices for neuromorphic computing. We analyze different features that allow the devices to mimic biological synapses and present the models to reproduce analytically some of the data measured. In particular, we have measured the spike timing dependent plasticity behavior in our devices and later on we have modeled it. The spike timing dependent plasticity model was implemented as the learning rule of a spiking neural network that was trained to recognize the MNIST dataset. Variability is implemented and its influence on the network recognition accuracy is considered accounting for the number of neurons in the network and the number of training epochs. Finally, stochastic resonance is studied as another synaptic feature. It is shown that this effect is important and greatly depends on the noise statistical characteristics.

Semiempirical Two-Dimensional Model of the Bipolar Resistive Switching Process in Si-NCs/SiO2 Multilayers

In this work, the SET and RESET processes of bipolar resistive switching memories with silicon nanocrystals (Si-NCs) embedded in an oxide matrix is simulated by a stochastic model. This model is based on the estimation of two-dimensional oxygen vacancy configurations and their relationship with the resistive state. The simulation data are compared with the experimental current-voltage data of Si-NCs/SiO2 multilayer-based memristor devices. Devices with 1 and 3 Si-NCs/SiO2 bilayers were analyzed. The Si-NCs are assumed as agglomerates of fixed oxygen vacancies, which promote the formation of conductive filaments (CFs) through the multilayer according to the simulations. In fact, an intermediate resistive state was observed in the forming process (experimental and simulated) of the 3-BL device, which is explained by the preferential generation of oxygen vacancies in the sites that form the complete CFs, through Si-NCs.

Holistic Variability Analysis in Resistive Switching Memories Using a Two-Dimensional Variability Coefficient

We present a new methodology to quantify the variability of resistive switching memories. Instead of statistically analyzing few data points extracted from current versus voltage (I-V) plots, such as switching voltages or state resistances, we take into account the whole I-V curve measured in each RS cycle. This means going from a one-dimensional data set to a two-dimensional data set, in which every point of each I-V curve measured is included in the variability calculation. We introduce a new coefficient (named two-dimensional variability coefficient, 2DVC) that reveals additional variability information to which traditional one-dimensional analytical methods (such as the coefficient of variation) are blind. This novel approach provides a holistic variability metric for a better understanding of the functioning of resistive switching memories.

Thermal Characterization of Conductive Filaments in Unipolar Resistive Memories

A methodology to estimate the device temperature in resistive random access memories (RRAMs) is presented. Unipolar devices, which are known to be highly influenced by thermal effects in their resistive switching operation, are employed to develop the technique. A 3D RRAM simulator is used to fit experimental data and obtain the maximum and average temperatures of the conductive filaments (CFs) that are responsible for the switching behavior. It is found that the experimental CFs temperature corresponds to the maximum simulated temperatures obtained at the narrowest sections of the CFs. These temperature values can be used to improve compact models for circuit simulation purposes.

Flexible Transient Resistive Memory Based on Biodegradable Composites

Physical transient electronics have attracted more attention as the basis for building green electronics and biomedical devices. However, there are difficulties in selecting materials for the fabricated devices to take into account both biodegradability and high performance. In this paper, a physically transient resistive random-access memory (RRAM) device was fabricated by using egg protein and graphene quantum dot composites as active layers. The sandwich structure composed of Al/EA:GQD/ITO shows a good write-once-multiple-read memory characteristic, and the introduced GQD improves the switching current ratio of the device. By using the sensitivity of GQDs to ultraviolet light, the logic operation of the "OR gate" is completed. Furthermore, the device exhibits a physical transient behavior and good biodegradability due to the dissolution behavior in deionized water. These results suggest that the device is a favorable candidate for the construction of memory elements for transient electronic systems.

Exploiting Non-idealities of Resistive Switching Memories for Efficient Machine Learning

Novel computing architectures based on resistive switching memories (also known as memristors or RRAMs) have been shown to be promising approaches for tackling the energy inefficiency of deep learning and spiking neural networks. However, resistive switch technology is immature and suffers from numerous imperfections, which are often considered limitations on implementations of artificial neural networks. Nevertheless, a reasonable amount of variability can be harnessed to implement efficient probabilistic or approximate computing. This approach turns out to improve robustness, decrease overfitting and reduce energy consumption for specific applications, such as Bayesian and spiking neural networks. Thus, certain non-idealities could become opportunities if we adapt machine learning methods to the intrinsic characteristics of resistive switching memories. In this short review, we introduce some key considerations for circuit design and the most common non-idealities. We illustrate the possible benefits of stochasticity and compression with examples of well-established software methods. We then present an overview of recent neural network implementations that exploit the imperfections of resistive switching memory, and discuss the potential and limitations of these approaches.

GERARD: GEneral RApid Resolution of Digital Mazes Using a Memristor Emulator

Memristive technology is a promising game-changer in computers and electronics. In this paper, a system exploring the optimal paths through a maze, utilizing a memristor-based setup, is developed and concreted on a FPGA (field-programmable gate array) device. As a memristor, a digital emulator has been used. According to the proposed approach, the memristor is used as a delay element, further configuring the test graph as a memristor network. A parallel algorithm is then applied, successfully reducing computing time and increasing the system’s efficiency. The proposed system is simple, easy to scale up and capable of implementing different graph configurations. The operation of the algorithm in the MATLAB (matrix laboratory) programming enviroment is checked beforehand and then exported to two different Intel FPGAs: a DE0-Nano board and an Arria 10 GX 220 FPGA. In both cases, reliable results are obtained quickly and conveniently, even for the case of a 300 × 300 nodes maze.

Standards for the Characterization of Endurance in Resistive Switching Devices

Resistive switching (RS) devices are emerging electronic components that could have applications in multiple types of integrated circuits, including electronic memories, true random number generators, radiofrequency switches, neuromorphic vision sensors, and artificial neural networks. The main factor hindering the massive employment of RS devices in commercial circuits is related to variability and reliability issues, which are usually evaluated through switching endurance tests. However, we note that most studies that claimed high endurances >10⁶ cycles were based on resistance versus cycle plots that contain very few data points (in many cases even <20), and which are collected in only one device. We recommend not to use such a characterization method because it is highly inaccurate and unreliable (i.e., it cannot reliably demonstrate that the device effectively switches in every cycle and it ignores cycle-to-cycle and device-to-device variability). This has created a blurry vision of the real performance of RS devices and in many cases has exaggerated their potential. This article proposes and describes a method for the correct characterization of switching endurance in RS devices; this method aims to construct endurance plots showing one data point per cycle and resistive state and combine data from multiple devices. Adopting this recommended method should result in more reliable literature in the field of RS technologies, which should accelerate their integration in commercial products.