Integrated bioelectronic proton-gated logic elements utilizing nanoscale patterned Nafion

A central endeavour in bioelectronics is the development of logic elements to transduce and process ionic to electronic signals. Motivated by this challenge, we report fully monolithic, nanoscale logic elements featuring n- and p-type nanowires as electronic channels that are proton-gated by electron-beam patterned Nafion. We demonstrate inverter circuits with state-of-the-art ion-to-electron transduction performance giving DC gain exceeding 5 and frequency response up to 2 kHz. A key innovation facilitating the logic integration is a new electron-beam process for patterning Nafion with linewidths down to 125 nm. This process delivers feature sizes compatible with low voltage, fast switching elements. This expands the scope for Nafion as a versatile patternable high-proton-conductivity element for bioelectronics and other applications requiring nanoengineered protonic membranes and electrodes.

Achieving short high-quality gate-all-around structures for horizontal nanowire field-effect transistors

We introduce a fabrication method for gate-all-around nanowire field-effect transistors. Single nanowires were aligned perpendicular to underlying bottom gates using a resist-trench alignment technique. Top gates were then defined aligned to the bottom gates to form gate-all-around structures. This approach overcomes significant limitations in minimal obtainable gate length and gate-length control in previous horizontal wrap-gated nanowire transistors that arise because the gate is defined by wet-etching. In the method presented here gate-length control is limited by the resolution of the electron-beam-lithography process. We demonstrate the versatility of our approach by fabricating a device with an independent bottom gate, top gate, and gate-all-around structure as well as a device with three independent gate-all-around structures with 300, 200, and 150 nm gate length. Our method enables us to achieve subthreshold swings as low as 38 mV dec^-1 at 77 K for a 150 nm gate length.

Using Ultrathin Parylene Films as an Organic Gate Insulator in Nanowire Field-Effect Transistors

We report the development of nanowire field-effect transistors featuring an ultrathin parylene film as a polymer gate insulator. The room temperature, gas-phase deposition of parylene is an attractive alternative to oxide insulators prepared at high temperatures using atomic layer deposition. We discuss our custom-built parylene deposition system, which is designed for reliable and controlled deposition of <100 nm thick parylene films on III-V nanowires standing vertically on a growth substrate or horizontally on a device substrate. The former case gives conformally coated nanowires, which we used to produce functional Ω-gate and gate-all-around structures. These give subthreshold swings as low as 140 mV/dec and on/off ratios exceeding 10³ at room temperature. For the gate-all-around structure, we developed a novel fabrication strategy that overcomes some of the limitations with previous lateral wrap-gate nanowire transistors. Finally, we show that parylene can be deposited over chemically treated nanowire surfaces, a feature generally not possible with oxides produced by atomic layer deposition due to the surface "self-cleaning" effect. Our results highlight the potential for parylene as an alternative ultrathin insulator in nanoscale electronic devices more broadly, with potential applications extending into nanobioelectronics due to parylene's well-established biocompatible properties.

The effect of (NH4)2Sx passivation on the (311)A GaAs surface and its use in AlGaAs/GaAs heterostructure devices

We have studied the efficacy of (NH4)2Sx surface passivation on the (311)A GaAs surface. We report XPS studies of simultaneously-grown (311)A and (100) heterostructures showing that the (NH4)2Sx solution removes surface oxide and sulfidizes both surfaces. Passivation is often characterized using photoluminescence measurements; we show that while (NH4)2Sx treatment gives a 40-60 ×  increase in photoluminescence intensity for the (100) surface, an increase of only 2-3 ×  is obtained for the (311)A surface. A corresponding lack of reproducible improvement in the gate hysteresis of (311)A heterostructure transistor devices made with the passivation treatment performed immediately prior to gate deposition is also found. We discuss possible reasons why sulfur passivation is ineffective for (311)A GaAs, and propose alternative strategies for passivation of this surface.