Enhancing β-Ga2O3-film ultraviolet detectors via RF magnetron sputtering with seed layer insertion on c-plane sapphire substrate

Gallium oxide (Ga2O3) possesses a band gap of approximately 4.9 eV, aligning its detection wavelength within the solar-blind region, making it an ideal semiconductor material for solar-blind photodetectors (SBPDs). This study aims to enhance the performance of Ga2O3 ultraviolet (UV) detectors by pre-depositing a Ga2O3 seed layer on a c-plane sapphire substrate. The X-ray diffraction (XRD) and X-ray photoelectron spectroscopy (XPS) analyses validated that the deposited films, following high-temperature annealing, comprised β-Ga2O3. Comparing samples with and without a 20 nm seed layer, it was found that the former exhibited fewer oxygen defects and substantially improved crystal quality. The incorporation of the seed layer led to the realization of detectors with remarkably low dark current (≤ 25.4 fA). Moreover, the photo-to-dark current ratio (PDCR) was enhanced by 30% (surpassing 1.3 × 104) and the response/recovery time reduced to 0.9 s/0.01 s, indicating faster performance. Furthermore, these detectors demonstrated higher responsivity (4.8 mA/W), improved detectivity (2.49×1016 Jones), and excellent solar-blind characteristics. This study serves as a foundational stepping toward achieving high-quality β-Ga2O3 thin film and UV detector arrays. .

Various Applications of ZnO Thin Films Obtained by Chemical Routes in the Last Decade

This review addresses the importance of Zn for obtaining multifunctional materials with interesting properties by following certain preparation strategies: choosing the appropriate synthesis route, doping and co-doping of ZnO films to achieve conductive oxide materials with p- or n-type conductivity, and finally adding polymers in the oxide systems for piezoelectricity enhancement. We mainly followed the results of studies of the last ten years through chemical routes, especially by sol-gel and hydrothermal synthesis. Zinc is an essential element that has a special importance for developing multifunctional materials with various applications. ZnO can be used for the deposition of thin films or for obtaining mixed layers by combining ZnO with other oxides (ZnO-SnO₂, ZnO-CuO). Also, composite films can be achieved by mixing ZnO with polymers. It can be doped with metals (Li, Na, Mg, Al) or non-metals (B, N, P). Zn is easily incorporated in a matrix and therefore it can be used as a dopant for other oxidic materials, such as: ITO, CuO, BiFeO_3, and NiO. ZnO can be very useful as a seed layer, for good adherence of the main layer to the substrate, generating nucleation sites for nanowires growth. Thanks to its interesting properties, ZnO is a material with multiple applications in various fields: sensing technology, piezoelectric devices, transparent conductive oxides, solar cells, and photoluminescence applications. Its versatility is the main message of this review.

Effect of a ZrO2 Seed Layer on an Hf0.5Zr0.5O2 Ferroelectric Device Fabricated via Plasma Enhanced Atomic Layer Deposition

In this study, a ferroelectric layer was formed on a ferroelectric device via plasma enhanced atomic layer deposition. The device used 50 nm thick TiN as upper and lower electrodes, and an Hf_0.5Zr_0.5O₂ (HZO) ferroelectric material was applied to fabricate a metal-ferroelectric-metal-type capacitor. HZO ferroelectric devices were fabricated in accordance with three principles to improve their ferroelectric properties. First, the HZO nanolaminate thickness of the ferroelectric layers was varied. Second, heat treatment was performed at 450, 550, and 650 °C to investigate the changes in the ferroelectric characteristics as a function of the heat-treatment temperature. Finally, ferroelectric thin films were formed with or without seed layers. Electrical characteristics such as the I-E characteristics, P-E hysteresis, and fatigue endurance were analyzed using a semiconductor parameter analyzer. The crystallinity, component ratio, and thickness of the nanolaminates of the ferroelectric thin film were analyzed via X-ray diffraction, X-ray photoelectron spectroscopy, and transmission electron microscopy. The residual polarization of the (20,20)*3 device heat treated at 550 °C was 23.94 μC/cm², whereas that of the D(20,20)*3 device was 28.18 μC/cm², which improved the characteristics. In addition, in the fatigue endurance test, the wake-up effect was observed in specimens with bottom and dual seed layers, which exhibited excellent durability after 10⁸ cycles.

Seed Layer Optimisation for Ultra-Thin Sb2Se3 Solar Cells on TiO2 by Vapour Transport Deposition

Antimony selenide (Sb2Se3) material has drawn considerable attention as an Earth-abundant and non-toxic photovoltaic absorber. The power conversion efficiency of Sb2Se3-based solar cells increased from less than 2% to over 10% in a decade. Different deposition methods were implemented to synthesize Sb2Se3 thin films, and various device structures were tested. In search of a more environmentally friendly device composition, the common CdS buffer layer is being replaced with oxides. It was identified that on oxide substrates such as TiO2 using vacuum-based close-space deposition methods, an intermediate deposition step was required to produce high-quality thin films. However, little or no investigation was carried out using another very successful vacuum deposition approach in Sb2Se3 technology called vapour transport deposition (VTD). In this work, we present optimized VTD process conditions to achieve compact, pinhole-free, ultra-thin (<400 nm) Sb2Se3 absorber layers. Three process steps were designed to first deposit the seed layer, then anneal it and, at the final stage, deposit a complete Sb2Se3 absorber. Fabricated solar cells using absorbers as thin as 400 nm generated a short-circuit current density over 30 mA/cm2, which demonstrates both the very high absorption capabilities of Sb2Se3 material and the prospects for ultra-thin solar cell application.

Formation and crystallization of TiO2 nanostructures on various surfaces

A comparative study of the synthesis of TiO₂ nanorods on fluorine-doped tin oxide (FTO) glass, Si, SiO₂, Si/Ta, Si/TiN, Si/TiN/Ti and Si/HFO₂ substrates by hydrothermal reaction is presented. Detailed analysis on the growth of TiO₂ on pre-annealed Si/TiN/Ti and HfO₂ (HFO) surfaces is also given. For Si/TiN/Ti, a pre-annealing procedure led to the transformation of Ti to a TiO₂ layer which acts as a seed for aligned growth of TiO₂ nanorods. In contrast, Si/HFO does not provide a nucleation site for the formation of aligned nanorods. Various samples were prepared by varying the synthesis conditions, i.e. pre- and post-annealing temperatures and hydrothermal reaction time to figure out the optimum conditions which lead to unidirectional and highly aligned nanorods. X-ray diffraction, scanning electron microscopy, ultraviolet-visible spectroscopy and Raman spectroscopy were used to study structural, morphological and optical properties of synthesized samples. It is found that TiO₂ nanorods exhibit a rutile phase on the Si/Ti/TiN and Si/HFO substrates, but highly oriented vertical growth of nanorods has been observed only on pre-annealed Si/TiN/Ti substrates. On the other hand, TiO₂ nanorods form dandelion-like structures on Si/HFO substrates. Growth of vertically oriented TiO₂ nanorods on Si/TiN/Ti is attributed to the TiO₂ seed layer which forms after the process of pre-annealing of substrates at a suitable temperature. Variation in hydrothermal reaction time and post-annealing temperature brings further improvement in crystallinity and morphology of nanorods. This work shows that the pre-annealed Si/TiN/Ti substrate is the optimal choice to achieve vertically oriented, highly aligned TiO₂ nanorods.

Reversal of the Pinning Direction in the Synthetic Spin Valve with a NiFeCr Seed Layer

The effect of the seed layers on the magnetic properties of the giant magnetoresistance thin films has received a lot of attention. Here, a synthetic spin valve film stack with a wedge-shaped NiFeCr seed layer is deposited and annealed following a zero-field cooling procedure. The film crystallinity and magnetic properties are studied as a function of the NiFeCr seed layer thickness. It is found that the exchange coupling field from the IrMn/CoFe interface and the antiferromagnetic coupling field in the synthetic antiferromagnet both increase as the seed layer thickness increases, indicating the perfection of film texture. In this film, the critical thickness of the NiFeCr seed layer for the formation of the ordered IrMn₃ texture is about 9.3 nm. Meanwhile, a reversal of the pinning direction in the film is observed at this critical thickness of NiFeCr. This phenomenon can be explained in a free energy model by the competition effect between the exchange coupling and the interlayer coupling during the annealing process.

Ultrathin Metals on a Transparent Seed and Application to Infrared Reflectors

Ultrathin metal films (UTMFs) are widely used in optoelectronic applications, from transparent conductors to photovoltaic cells, low emissivity windows, and plasmonic metasurfaces. During the initial deposition phase, many metals tend to form islands on the receiving substrate rather than a physically connected (percolated) network, which eventually evolves into continuous films as the thickness increases. For example, in the case of Ag and Au on dielectric surfaces, percolation begins when the thickness of the metal film is at least about 5 nm. It is known that the type of growth can be changed when a proper seed layer is used. Here, we show that a CuO layer directly deposited on a substrate can dramatically influence surface wetting and promote early percolation of polycrystalline Ag and Au UTMFs. We demonstrate that the proposed seed is effective even when its thickness is sub-nanometric, in this way maintaining the full transparency of the receiving substrate. The Ag and Au films seeded with CuO showed a percolation thickness close to 1 nm and were morphologically and optically characterized from an ultraviolet (λ = 300 nm) to a midinfrared (λ = 15 μm) wavelength. Infrared reflectors, a mirror and a resonant plasmonic structure, were also demonstrated and uniquely tuned by electrical gating, this being possible owing to the small thickness of the constituting Au UTMF.

Fabrication of Piezoelectric ZnO Nanowires Energy Harvester on Flexible Substrate Coated with Various Seed Layer Structures

Flexible piezoelectric nanogenerators (PENGs) are very attractive for mechanical energy harvesting due to their high potential for realizing self-powered sensors and low-power electronics. In this paper, a PENG that is based on zinc oxide (ZnO) nanowires (NWs) is fabricated on flexible and transparent Polydimethylsiloxane (PDMS) substrate. The ZnO NWs were deposited on two different seed layer structures, i.e., gold (Au)/ZnO and tin-doped indium-oxide (ITO)/ZnO, using hydrothermal synthesis. Along with the structural and morphological analyses of ZnO NWs, the electrical characterization was also investigated for ZnO NWs-based flexible PENGs. In order to evaluate the suitability of the PENG device structure, the electrical output performance was studied. By applying a periodic mechanical force of 3 N, the ZnO NWs-based flexible PENG generated a maximum root mean square (RMS) voltage and average power of 2.7 V and 64 nW, respectively. Moreover, the comparison between the fabricated device performances shows that a higher electrical output can be obtained when ITO/ZnO seed layer structure is adopted. The proposed ZnO NWs-based PENG structure can provide a flexible and cost-effective device for supplying portable electronics.

Seed Layer Formation on Carbon Electrodes to Control Li2O2 Discharge Products for Practical Li-O2 Batteries with High Energy Density and Reversibility

The high theoretical energy densities of lithium-air batteries (LAB) make this technology an attractive energy storage system for future mobility applications. Li₂O₂ growth process on the cathode relies on the surrounding chemical environment of electrolytes. Low conductivity and strong reactivity of Li₂O₂ discharge products can cause overpotential and induce side reactions in LABs, respectively, eventually leading to poor cyclability. The capacity and reversibility of LABs are highly susceptible to the morphology of the Li₂O₂ discharge products. Here, we identify for the first time that a seed layer formed by the combination of a cathode and an electrolyte determines the morphology of Li₂O₂ discharge products. This seed layer led to its high reversibility with a large areal capacity (up to 10 mAh/cm²). Excellent OER (oxygen evolution reaction) was achieved by the formation of a favorable interface between the carbon electrode and electrolyte, minimizing the decomposition of the electrolyte. These remarkable improvements in LAB performance demonstrate critical progress toward advancing LAB into practical uses, which would exploit good reversibility of LABs in pouch-type cell arrangements with 1.34 Ah.

Effect of Pulse Current and Pre-annealing on Thermal Extrusion of Cu in Through-Silicon via (TSV)

Thermal stress induced by annealing the Cu filling of through-silicon vias (TSVs) requires further investigation as it can inhibit the performance of semiconductor devices. This study reports the filling behavior of TSVs prepared using direct current and pulse current Cu electrodeposition with and without pre-annealing. The thermal extrusion of Cu inside the TSVs was studied by observing the extrusion behavior after annealing and the changes in grain orientation using scanning electron microscopy and electron backscatter diffraction. The bottom-up filling ratio achieved by the direct current approach decreased because the current was used both to fill the TSV and to grow bump defects on the top surface of the wafer. In contrast, pulse current electrodeposition yielded an improved TSV bottom-up filling ratio and no bump defects, which is attributable to strong suppression and thin diffusion layer. Moreover, Cu deposited with a pulse current exhibited lesser thermal extrusion, which was attributed to the formation of nanotwins and a change in the grain orientation from random to (101). Based on the results, thermal extrusion of the total area of the TSVs could be obtained by pulse current electrodeposition with pre-annealing.

Toward the Growth of Self-Catalyzed ZnO Nanowires Perpendicular to the Surface of Silicon and Glass Substrates, by Pulsed Laser Deposition

Vertically-oriented zinc oxide (ZnO) nanowires were synthesized on glass and silicon substrates by Pulsed Laser Deposition and without the use of a catalyst. An intermediate c-axis oriented nanotextured ZnO seed layer in the form of nanowall network with honey comb structure allows the growth of high quality, self-forming, and vertically-oriented nanowires at relatively low temperature (<400 °C) and under argon atmosphere at high pressure (>5 Torr). Many parameters were shown to affect the growth of the ZnO nanowires such as gas pressure, substrate–target distance, and laser energy. Growth of a c-axis-crystalline array of nanowires growing vertically from the energetically favorable sites on the seed layer is observed. Nucleation occurs due to the matching lattice structure and the polar nature of the ZnO seed layer. Morphological, structural, and optical properties were investigated. X-ray diffraction (XRD) revealed highly c-axis aligned nanowires along the (002) crystal plane. Room temperature photoluminescence (PL) measurements showed a strong and narrow bandwidth of Ultraviolet (UV) emission, which shifts to lower wavelength with the increase of pressure.

Native Oxide Seeded Spontaneous Integration of Dielectrics on Exfoliated Black Phosphorus

Two-dimensional (2D) semiconductors have been a central focus for next-generation electronics and optoelectronics owing to their great potential to extend the scaling limits in a silicon transistor. However, due to the lack of surface dangling bonds in most 2D semiconductors, such as graphene and transition metal dichalcogenides (TMDs), the direct growth of the high-κ film on these 2D materials via an atomic layer deposition (ALD) technique often produces dielectrics with poor quality, which hinders their integration in the modern semiconductor industry. Here, we comprehensively investigate the ALD growth of the Al₂O₃ layer on 2D exfoliated black phosphorus (BP). Intriguingly, we found that the 2D BP with "silicon-like" characteristics possesses a native surface oxide layer P_xO_y after air exposure. The P_xO_y-induced surface dangling bonds enable the spontaneous integration of the high-quality Al₂O₃ layer on the BP flake without any pretreatments to functionalize the surface. Additionally, the Al₂O₃ layer could effectively passivate BP to prevent its degradation in ambient conditions, which addresses the most serious problem of the BP material. Moreover, the Al₂O₃-encapsulated BP field-effect transistor (FET) exhibits good electrical transport performance, with a high hole mobility of ∼420 cm² V^-1 s^-1 and electron mobility of ∼80 cm² V^-1 s^-1. Moreover, the high-quality Al₂O₃ layer can also be integrated into the top-gated BP transistor and inverter. Our findings reveal the silicon-like characteristics of BP for the high-κ ALD dielectric growth technology, which promises the seamless integration of 2D BP in the modern semiconductor industry.

Effect of Al2O3 Seed-Layer on the Dielectric and Electrical Properties of Ultrathin MgO Films Fabricated Using In Situ Atomic Layer Deposition

Metal/insulator/metal (M/I/M) trilayers of Al/MgO/Al with ultrathin MgO in the thickness range of 2.20-4.40 nm were fabricated using in vacuo sputtering and atomic layer deposition (ALD). In order to achieve a high-quality metal/insulator (M/I) interface and hence high-quality dielectric ALD-MgO films, a 5 cycles (∼0.55 nm) thick ALD-Al₂O₃ seed layer (SL) was employed to demonstrate the dielectric constant (ε_r) is ∼8.82-9.38 in 3.30-4.95 nm thick ALD-MgO/SL films, which is close to that of single-crystal MgO ε_r ∼ 9.80. In contrast, a low ε_r of 3.55-4.66 for the ALD-MgO films of a similar thickness without a SL was observed. The effective oxide thickness (EOT) of ∼1.40 nm has therefore been achieved in the ultrathin ALD-MgO films, which are comparable to the EOTs of high-K dielectrics such as HfO₂. In addition, the leakage current through the M/I/M structure is reduced by more than 1 order of magnitude with implementation of the SL. The high leakage current in the samples without a SL can be attributed to the nonuniform nucleation of the ALD-MgO on the Al surface with a significant portion of the Al surface remaining conductive as confirmed using in vacuo scanning tunneling spectroscopy (STS). With the SL, the STS study has confirmed a tunnel barrier height of 1.50 eV on 0.55 nm MgO with 0.55 nm Al₂O₃ SL with almost 100% coverage. In addition, molecular dynamics simulations point out the importance of deposition of ultrathin SL that has a significant effect on the initial nucleation of the Mg precursor. This result not only illustrates the critical importance of controlling the M/I interface to obtain high-quality dielectric properties of ultrathin ALD films but also provides an approach to engineering incompatible M/I interfaces using a SL for a high-quality dielectric required for applications in M/I/M tunnel junctions and complementary metal oxide semiconductors.

A Comparative Study on the Effects of Au, ZnO and AZO Seed Layers on the Performance of ZnO Nanowire-Based Piezoelectric Nanogenerators

In this study, different seed layers like gold (Au), zinc oxide (ZnO) and aluminum-doped ZnO (AZO) have been associated to ZnO nanowires (NWs) for the development of mechanical energy harvesters. ZnO NWs were grown by using a low temperature hydrothermal method. The morphological properties were investigated using Scanning Electron Microscopy (SEM) and the analysis of crystalline quality and growth orientation was studied using X-ray Diffraction (XRD). The obtained ZnO NWs are found to be highly dense, uniformly distributed and vertically well aligned on the ZnO and AZO seed layers, while ZnO NWs grown on Au possess a low density and follow a non-uniform distribution. Moreover, the NWs exhibited good crystal quality over the seed layers. The piezoelectric nanogenerator (PENG) consists of ZnO NWs grown on the three different seed layers, parylene-C matrix, Ti/Al top electrode and poly(dimethylsiloxane) (PDMS) encapsulated polymer composite. The measurements of the open circuit voltage (V_OC) were around 272 mV, 36 mV for ZnO, AZO seed layers while the PENG including Au seed layer presented a short-circuited state. This study is an important step in order to investigate the effect of different seed layers influencing the magnitude of the generated electrical performances under identical growth and measurement conditions. It will also help identify the most suitable seed layers for energy harvesting devices and their future integration in industrial applications.

Effect of Growth Temperature during the Atomic Layer Deposition of the SrTiO3 Seed Layer on the Properties of RuO2/SrTiO3/Ru Capacitors for Dynamic Random Access Memory Applications

The atomic layer deposition process of SrTiO₃ (STO) films at 230 °C was studied with Sr(ⁱPr₃Cp)₂ and Ti(CpMe₅)(OMe)₃ (Pr, Cp, and Me are propyl, cyclopentadienyl, and methyl groups, respectively) on Ru substrates. The growth behavior and properties of STO films grown at 230 °C were compared with those deposited at 370 °C. With the limited over-reaction of the Sr precursor during the initial growth stage at a lower temperature, the cation composition was more controllable, and the surface morphology after crystallization annealing at 650 °C had more uniform grains with fewer defects. Here, the excess reaction of the Sr precursor means the chemical-vapor-deposition-like growth of the SrO component mediated through the thermal decomposition of the adsorbed Sr precursor molecules. It was by the reaction of the Sr precursor with the oxygen supplied from the partly oxidized Ru substrate. The second STO was grown at 370 °C (main layer) on the annealed first STO layer (crystallized seed layer) to lead to the in situ crystallization of the main layer. Due to the improved microstructure of STO films induced by the seed layer deposited at 230 °C, the bulk dielectric constant of 167 was obtained for the main layer, which was higher than the value of 101 where the seed layer was deposited at 370 °C, even though the crystallization annealing condition of the seed layer and the deposition condition of the main layer were consistent. The seed layer grown at 230 °C, however, had a lower dielectric constant of only ∼49, whereas the high-temperature seed layer had a dielectric constant of ∼106. Therefore, the low-temperature seed layer posed a severe limitation in acquiring an advanced capacitor property with the involvement of a low-dielectric interfacial layer.

Physical Properties of (Na1- xK x)NbO3 Thin Film Grown at Low Temperature Using Two-Dimensional Ca2Nb3O10 Nanosheet Seed Layer

A monolayer Ca₂Nb₃O₁₀ (CNO) nanosheet was deposited on a Pt/Ti/SiO₂/Si substrate using the Langmuir-Blodgett method. This monolayer CNO nanosheet with a (001) surface termination was used as a seed layer to reduce the growth temperature of the crystalline (Na_{1- x}K _x)NbO₃ (NKN) film. The crystalline NKN film was preferentially grown along the [001] direction at 400 °C. The ferroelectric and piezoelectric properties of this NKN film were influenced by the postannealing atmosphere due to the variations in the amounts of oxygen vacancies in the NKN film. The crystalline NKN film annealed at 300 °C under 50 Torr O₂ atmosphere showed promising ferroelectric and piezoelectric properties; ε_r of 303 and tan δ of 2.0% at 100 kHz, P_s of 15.3 μC/cm², P_r of 11.7 μC/cm², and E_c of 78 kV/cm, and d₃₃ of 139 pm/V. This NKN film showed the lowest leakage current, which can be explained by the Schottky emission mechanism. The Schottky barrier heights of the Pt/NKN and NKN/CNO/Pt interfaces were calculated to be 0.97 and 0.28 eV, respectively. The results of this work suggest a new method to grow crystalline thin films at low temperatures by using metal-oxide nanosheets as the seed layer.

Preparation of a Highly Conductive Seed Layer for Calcium Sensor Fabrication with Enhanced Sensing Performance

The seed layer plays a crucial role in achieving high electrical conductivity and ensuring higher performance of devices. In this study, we report fabrication of a solution-gated field-effect transistor (FET) sensor based on zinc oxide nanorods (ZnO NRs) modified iron oxide nanoparticles (α-Fe₂O₃ NPs) grown on a highly conductive sandwich-like seed layer (ZnO seed layer/Ag nanowires/ZnO seed layer). The sandwich-like seed layer and ZnO NRs modification with α-Fe₂O₃ NPs provide excellent conductivity and prevent possible ZnO NRs surface damage from low pH enzyme immobilization, respectively. The highly conductive solution-gated FET sensor employed the calmodulin (CaM) immobilization on the surface of α-Fe₂O₃-ZnO NRs for selective detection of calcium ions (Ca²⁺). The solution-gated FET sensor exhibited a substantial change in conductance upon introduction of different concentrations of Ca²⁺ and showed high sensitivity (416.8 μA cm^-2 mM^-1) and wide linear range (0.01-3.0 mM). In addition, the total Ca²⁺ concentration in water and serum samples was also measured. Compared to the analytically obtained data, our sensor was found to measure Ca²⁺ in the water and serum samples accurately, suggesting a potential alternative for Ca²⁺ determination in water and serum samples, specifically used for drinking/irrigation and clinical analysis.

Reliable and Low-Power Multilevel Resistive Switching in TiO2 Nanorod Arrays Structured with a TiOx Seed Layer

The electrical performance of TiO₂ nanorod array (NRA)-based resistive switching memory devices is examined in this paper. The formation of a seed layer on the fluorine-doped tin oxide (FTO) glass substrate after treatment in TiCl₄ solution, before the growth of TiO₂ NRAs on the FTO substrate via a hydrothermal process, is shown to significantly improve the resistive switching performance of the resulting TiO₂ NRA-based device. As fabricated, the Al/TiO₂ NRA/TiO_x layer/FTO device displayed electroforming-free bipolar resistive switching behavior while maintaining a stable ON/OFF ratio for more than 500 direct sweeping cycles over a retention period of 3 × 10⁴ s. Meanwhile, the programming current as low as ∼10^-8 A and 10^-10 A for low resistance state and high resistance state respectively makes the fabricated devices suitable for low-power memristor applications. The TiO_x precursor seed layer not only promotes the uniform and preferred growth of TiO₂ nanorods on the FTO substrate but also functions as an additional source layer of trap centers due to its oxygen-deficient composition. Our data suggest that the primary conduction mechanism in these devices arises from trap-mediated space-charge-limited current (SCLC). Multilevel memory performance in this new device is achieved by varying the SET voltage. The origin of this effect is also discussed.

Seeding atomic layer deposition of alumina on graphene with yttria

Integrating graphene into nanoelectronic device structure requires interfacing graphene with high-κ dielectric materials. However, the dewetting and thermal instability of dielectric layers on top of graphene makes fabricating a pinhole-free, uniform, and conformal graphene/dielectric interface challenging. Here, we demonstrate that an ultrathin layer of high-κ dielectric material Y2O3 acts as an effective seeding layer for atomic layer deposition of Al2O3 on graphene. Whereas identical Al2O3 depositions lead to discontinuous film on bare graphene, the Y2O3 seeding layer yields uniform and conformal films. The morphology of the Al2O3 film is characterized by atomic force microscopy and transmission electron microscopy. C-1s X-ray photoemission spectroscopy indicates that the underlying graphene remains intact following Y2O3 seed and Al2O3 deposition. Finally, photoemission measurements of the graphene/SiO2/Si, Y2O3/graphene/SiO2, and Al2O3/Y2O3/graphene/SiO2 interfaces indicate n-type doping of graphene with different doping levels due to charge transfer at the interfaces.

Oxidized titanium as a gate dielectric for graphene field effect transistors and its tunneling mechanisms

We fabricate and characterize a set of dual-gated graphene field effect transistors using a novel physical vapor deposition technique in which titanium is evaporated onto the graphene channel in 10 Å cycles and oxidized in ambient to form a top-gate dielectric. A combination of X-ray photoemission spectroscopy, ellipsometry, and transmission electron microscopy suggests that the titanium is oxidizing in situ to titanium dioxide. Electrical characterization of our devices yields a dielectric constant of κ = 6.9 with final mobilities above 5500 cm(2)/(V s). Low temperature analysis of the gate-leakage current in the devices gives a potential barrier of 0.78 eV in the conduction band and a trap depth of 45 meV below the conduction band.

Selective Growth of Vertical-aligned ZnO Nanorod Arrays on Si Substrate by Catalyst-free Thermal Evaporation

By thermal evaporation of pure ZnO powders, high-density vertical-aligned ZnO nanorod arrays with diameter ranged in 80–250 nm were successfully synthesized on Si substrates covered with ZnO seed layers. It was revealed that the morphology, orientation, crystal, and optical quality of the ZnO nanorod arrays highly depend on the crystal quality of ZnO seed layers, which was confirmed by the characterizations of field-emission scanning electron microscopy, X-ray diffraction, transmission electron microscopy, and photoluminescence measurements. For ZnO seed layer with wurtzite structure, the ZnO nanorods grew exactly normal to the substrate with perfect wurtzite structure, strong near-band-edge emission, and neglectable deep-level emission. The nanorods synthesized on the polycrystalline ZnO seed layer presented random orientation, wide diameter, and weak deep-level emission. This article provides a C-free and Au-free method for large-scale synthesis of vertical-aligned ZnO nanorod arrays by controlling the crystal quality of the seed layer.