Sub-5 nm Gate-Length Monolayer Selenene Transistors

Two-dimensional (2D) semiconductors are being considered as alternative channel materials as silicon-based field-effect transistors (FETs) have reached their scaling limits. Recently, air-stable 2D selenium nanosheet FETs with a gate length of 5 µm were experimentally produced. In this study, we used an ab initio quantum transport approach to simulate sub-5 nm gate-length double-gate monolayer (ML) selenene FETs. When considering negative-capacitance technology and underlap, we found that 3 nm gate-length p-type ML selenene FETs can meet the 2013 ITRS standards for high-performance applications along the armchair and zigzag directions in the 2028 horizon. Therefore, ML selenene has the potential to be a channel material that can scale Moore's law down to a gate length of 3 nm.

Can Carbon Nanotube Transistors Be Scaled Down to the Sub-5 nm Gate Length?

Single-walled carbon nanotubes (CNTs) have been considered as a promising semiconductor to construct transistors and integrated circuits in the future owing to their ultrathin channel thickness and ultrahigh injection velocity. Although a 5 nm gate-length CNT field-effect transistor (FET) has already been experimentally fabricated and demonstrates excellent device performance, the potential or constraint factors on performance have not been explored or revealed. Based on the benchmark of the device performance between the experimental and simulated 5 nm gate-length CNT FETs, we use the first-principles quantum transport approach to explore the performance limit of CNT FETs based on the gate-all-around (GAA) device geometry for the first time. It is found that the GAA CNT FETs can fulfill the ITRS 2028 high-performance target in the 2 nm gate-length node in terms of the on-state current, delay time, and power consumption. We also find that the energy-delay product of the CNT FETs is superior to those of the high-performance 2D materials and Si Fin FETs at the sub-5 nm gate length due to its unique electrical property. Though theoretically the gate length of CNT FETs can be potentially scaled to 2 nm, considering the tradeoff between the performance and power consumption, 5 nm is the ultimate scaled limit.

Constructing Dual-Molecule Junctions to Probe Intermolecular Crosstalk

Understanding and controlling charge transport across multiple parallel molecules are fundamental to the creation of innovative functional electronic components, as future molecular devices will likely be multimolecular. The smallest possible molecular ensemble to address this challenge is a dual-molecule junction device, which has potential to unravel the effects of intermolecular crosstalk on electronic transport at the molecular level that cannot be elucidated using either conventional single-molecule or self-assembled monolayer (SAM) techniques. Herein, we demonstrate the fabrication of a scanning tunneling microscopy (STM) dual-molecule junction device, which utilizes noncovalent interactions and allows for direct comparison to the conventional STM single-molecule device. STM-break junction (BJ) measurements reveal a decrease in conductance of 10% per molecule from the dual-molecule to the single-molecule junction device. Quantum transport simulations indicate that this decrease is attributable to intermolecular crosstalk (i.e., intermolecular π-π interactions), with possible contributions from substrate-mediated coupling (i.e., molecule-electrode). This study provides the first experimental evidence to interpret intermolecular crosstalk in electronic transport at the STM-BJ level and translates the experimental observations into meaningful molecular information to enhance our fundamental knowledge of this subject matter. This approach is pertinent to the design and development of future multimolecular electronic components and also to other dual-molecular systems where such crosstalk is mediated by various noncovalent intermolecular interactions (e.g., electrostatic and hydrogen bonding).

Monolayer Bismuthene-Metal Contacts: A Theoretical Study

Bismuthene, a bismuth analogue of graphene, has a moderate band gap, has a high carrier mobility, has a topological nontriviality, has a high stability at room temperature, has an easy transferability, and is very attractive for electronics, optronics, and spintronics. The electrical contact plays a critical role in an actual device. The interfacial properties of monolayer (ML) bismuthene in contact with the metal electrodes spanning a wide work function range in a field-effect transistor configuration are systematically studied for the first time by using both first-principles electronic structure calculations and quantum transport simulations. The ML bismuthene always undergoes metallization upon contact with the six metal electrodes owing to a strong interaction. According to the quantum transport simulations, apparent metal-induced gap states (MIGSs) formed in the semiconductor-metal interface give rise to a strong Fermi-level pinning. As a result, the ML bismuthene forms an n-type Schottky contact with Ir/Ag/Ti electrodes with electron Schottky barrier heights (SBHs) of 0.17, 0.22, and 0.25 eV, respectively, and a p-type Schottky contact with Pt/Al/Au electrodes with hole SBHs of 0.09, 0.16, and 0.38 eV, respectively. The effective channel length of the ML bismuthene transistors is also significantly reduced by the MIGSs. However, the MIGSs are eliminated and the effective channel length is increased when ML graphene is used as an electrode, accompanied by a small hole SBH of 0.06 eV (quasi-Ohmic contact). Hence, an insight is provided into the interfacial properties of the ML bismuthene-metal composite systems and a guidance is provided for the choice of metal electrodes in ML bismuthene devices.

Schottky Barriers in Bilayer Phosphorene Transistors

It is unreliable to evaluate the Schottky barrier height (SBH) in monolayer (ML) 2D material field effect transistors (FETs) with strongly interacted electrode from the work function approximation (WFA) because of existence of the Fermi-level pinning. Here, we report the first systematical study of bilayer (BL) phosphorene FETs in contact with a series of metals with a wide work function range (Al, Ag, Cu, Au, Cr, Ti, Ni, and Pd) by using both ab initio electronic band calculations and quantum transport simulation (QTS). Different from only one type of Schottky barrier (SB) identified in the ML phosphorene FETs, two types of SBs are identified in BL phosphorene FETs: the vertical SB between the metallized and the intact phosphorene layer, whose height is determined from the energy band analysis (EBA); the lateral SB between the metallized and the channel BL phosphorene, whose height is determined from the QTS. The vertical SBHs show a better consistency with the lateral SBHs of the ML phosphorene FETs from the QTS compared than that of the popular WFA. Therefore, we develop a better and more general method than the WFA to estimate the lateral SBHs of ML semiconductor transistors with strongly interacted electrodes based on the EBA for its BL counterpart. In terms of the QTS, n-type lateral Schottky contacts are formed between BL phosphorene and Cr, Al, and Cu electrodes with electron SBH of 0.27, 0.31, and 0.32 eV, respectively, while p-type lateral Schottky contacts are formed between BL phosphorene and Pd, Ti, Ni, Ag, and Au electrodes with hole SBH of 0.11, 0.18, 0.19, 0.20, and 0.21 eV, respectively. The theoretical polarity and SBHs are in good agreement with available experiments. Our study provides an insight into the BL phosphorene-metal interfaces that are crucial for designing the BL phosphorene device.