Mechanism Exploration of the Effect of Polyamines on the Polishing Rate of Silicon Chemical Mechanical Polishing: A Study Combining Simulations and Experiments

Polyamines have become important chemical components used in several integrated circuit manufacturing processes, such as etching, chemical mechanical polishing (CMP), and cleaning. Recently, researchers pointed out that polyamines can be excellent enhancers in promoting the material removal rate (MRR) of Si CMP, but the interaction mechanism between the polyamines and the silicon surface has not been clarified. Here, the micro-interaction mechanisms of polyamines, including ethylenediamine (EDA), diethylenetriamine (DETA), triethylenetetramine (TETA), tetraethylenepentamine (TEPA), and pentaethylenehexamine (PEHA), with the Si(1, 0, 0) surface were investigated through molecular dynamics (MD) simulations using the ReaxFF reactive force field. Polyamines can adsorb onto the Si(1, 0, 0) surface, and the adsorption rate first accelerates and then tends to stabilize with the increase in the quantity of -CH2CH2NH-. The close connection between the adsorption properties of polyamines and the polishing rate has been confirmed by CMP experiments on silicon wafers. A comprehensive bond analysis indicates that the adsorption of polyamines can stretch surface Si-Si bonds, which facilitates subsequent material removal by abrasive mechanical wear. This work reveals the adsorption mechanism of polyamines onto the silicon substrate and the understanding of the MRR enhancement in silicon CMP, which provides guidance for the design of CMP slurry.

Interaction Energy Dependency on Pulse Width in ns NIR Laser Scanning of Silicon

Laser ablation of semiconductor silicon has been extensively studied in the past few decades. In the ultrashort pulse domain, whether in the fs scale or ps scale, the pulse energy fluence threshold in the ablation of silicon is strongly dependent on the pulse width. However, in the ns pulse scale, the energy fluence threshold dependence on the pulse width is not well understood. This study elucidates the interaction energy dependency on pulse width in ns NIR laser ablation of silicon. The level of ablation or melting was determined by the pulse energy deposition rate, which was proportional to laser peak power. Shorter pulse widths with high peak power were likely to induce surface ablation, while longer pulse widths were likely to induce surface melting. The ablation threshold increased from 5.63 to 24.84 J/cm² as the pulse width increased from 26 to 500 ns. The melting threshold increased from 3.33 to 5.76 J/cm² as the pulse width increased from 26 to 200 ns, and then remained constant until 500 ns, the longest width investigated. Distinct from a shorter pulse width, a longer pulse width did not require a higher power level for inducing surface melting, as surface melting can be induced at a lower power with the longer heating time of a longer pulse width. The line width from surface melting was less than the focused spot size; the line appeared either as a continuous line at slow scanning speed or as isolated dots at high scanning speed. In contrast, the line width from ablation significantly exceeded the focused spot size.

Breakage Ratio of Silicon Wafer during Fixed Diamond Wire Sawing

Monocrystalline silicon is an important material for processing electronic and photovoltaic devices. The fixed diamond wire sawing technology is the first key technology for monocrystalline silicon wafer processing. A systematic study of the relationship between the fracture strength, stress and breakage rate is the basis for thinning silicon wafers. The external vibration excitation of sawing machine and diamond wire lead to the transverse vibration and longitudinal vibration for silicon wafers. The transverse vibration is the main reason of wafer breakage. In this paper, a mathematical model for calculating breakage ratio of silicon wafer is established. The maximum stress and breakage ratio for as-sawn silicon wafers are studied. It is found that the maximum amplitude of the silicon wafers with the size of 156 mm × 156 mm × 0.2 mm was 160 μm during the diamond wire sawing process. The amplitude, maximum stress and breakage rate of the wafers increased with the increase of the cutting depth. The smaller the silicon wafer thickness, the larger of silicon wafer breakage ratio. In the sawing stage, the breakage ratio of the 156 mm × 156 mm section with a thickness of 0.15 mm of silicon wafers is 6%.

Experimental Study on Surface Integrity of Solar Cell Silicon Wafers Sliced by Electrochemical Multi-Wire Saw

Electrochemical multi-wire sawing (EMWS) is a hybrid machining method based on a traditional multi-wire sawing (MWS) system. In this new method, a silicon ingot is connected to a positive electrode; the slicing wire is connected to a negative electrode. Material is removed by the interaction of mechanical grinding and an electrochemical reaction. In this paper, contrast experiments of EMWS and MWS were conducted based on industrialized equipment to verify the beneficial effects of the hybrid method. The experimental statistical results show that the composite processing method improved the processing qualification rate by 1.28%, and the Bow of silicon wafers was reduced by about 2.74 microns. Further testing on the surface of the silicon wafer after electrochemical action showed that obvious holes were present on the surface, and the surface hardness of the wafer decreased significantly. Therefore, the scratches on the surface of wafer sliced by EMWS were reduced; in addition, the thickness of the surface damage layer was reduced by about 9 microns. After standard texturing, the average reflectivity of the wafers sliced by EMWS was about 2-10% lower than that of the wafers sliced by MWS in the wavelength of 300-1100 nm. In this paper, the voltage parameter of the composite machining is set to 48 V; the amount of electrolyte added in each experiment is 2 L; and a good machining effect is obtained. In the future, the electric parameters and cutting fluid components will be further studied to improve the electrochemical effect.

Nanowall Textured Hydrophobic Surfaces and Liquid Droplet Impact

Water droplet impact on nanowires/nanowalls’ textured hydrophobic silicon surfaces was examined by assessing the influence of texture on the droplet impact dynamics. Silicon wafer surfaces were treated, resulting in closely packed nanowire/nanowall textures with an average spacing and height of 130 nm and 10.45 μm, respectively. The top surfaces of the nanowires/nanowalls were hydrophobized through the deposition of functionalized silica nanoparticles, resulting in a droplet contact angle of 158° ± 2° with a hysteresis of 4° ± 1°. A high-speed camera was utilized to monitor the impacting droplets on hydrophobized nanowires/nanowalls’ textured surfaces. The nanowires/nanowalls texturing of the surface enhances the pinning of the droplet on the impacted surface and lowers the droplet spreading. The maximum spreading diameter of the impacting droplet on the hydrophobized nanowires/nanowalls surfaces becomes smaller than that of the hydrophobized as-received silicon, hydrophobized graphite, micro-grooved, and nano-springs surfaces. Penetration of the impacted droplet fluid into the nanowall-cell structures increases trapped air pressure in the cells, acting as an air cushion at the interface of the droplet fluid and nanowalls’ top surface. This lowers the droplet pinning and reduces the work of droplet volume deformation while enhancing the droplet rebound height.

The Influence of Wire Speed on Phase Transitions and Residual Stress in Single Crystal Silicon Wafers Sawn by Resin Bonded Diamond Wire Saw

Lower warp is required for the single crystal silicon wafers sawn by a fixed diamond wire saw with the thinness of a silicon wafer. The residual stress in the surface layer of the silicon wafer is the primary reason for warp, which is generated by the phase transitions, elastic-plastic deformation, and non-uniform distribution of thermal energy during wire sawing. In this paper, an experiment of multi-wire sawing single crystal silicon is carried out, and the Raman spectra technique is used to detect the phase transitions and residual stress in the surface layer of the silicon wafers. Three different wire speeds are used to study the effect of wire speed on phase transition and residual stress of the silicon wafers. The experimental results indicate that amorphous silicon is generated during resin bonded diamond wire sawing, of which the Raman peaks are at 178.9 cm⁻¹ and 468.5 cm⁻¹. The ratio of the amorphous silicon surface area and the surface area of a single crystal silicon, and the depth of amorphous silicon layer increases with the increasing of wire speed. This indicates that more amorphous silicon is generated. There is both compressive stress and tensile stress on the surface layer of the silicon wafer. The residual tensile stress is between 0 and 200 MPa, and the compressive stress is between 0 and 300 MPa for the experimental results of this paper. Moreover, the residual stress increases with the increase of wire speed, indicating more amorphous silicon generated as well.

Orthogonal Experimental Research on Dielectrophoresis Polishing (DEPP) of Silicon Wafer

Silicon wafer with high surface quality is widely used as substrate materials in the fields of micromachines and microelectronics, so a high-efficiency and high-quality polishing method is urgently needed to meet its large demand. In this paper, a dielectrophoresis polishing (DEPP) method was proposed, which applied a non-uniform electric field to the polishing area to slow down the throw-out effect of centrifugal force, thereby achieving high-efficiency and high-quality polishing of silicon wafers. The principle of DEPP was described. Orthogonal experiments on important polishing process parameters were carried out. Contrast polishing experiments of silicon wafer were conducted. The orthogonal experimental results showed that the influence ratio of electric field intensity and rotation speed on material removal rate (MRR) and surface roughness was more than 80%. The optimal combination of process parameters was electric field intensity 450 V/mm, rotation speed 90 rpm, abrasive concentration 30 wt%, size of abrasive particle 80 nm. Contrast polishing experiments indicated that the MRR and material removal uniformity of DEPP were significantly better than traditional chemical mechanical polishing (CMP). Compared with the traditional CMP, the MRR of DEPP was increased by 17.6%, and the final surface roughness of silicon wafer reached Ra 0.31 nm. DEPP can achieve high-efficiency and high-quality processing of silicon wafer.

Functionalized, Vertically Super-Aligned Multiwalled Carbon Nanotubes for Potential Biomedical Applications

Currently, there is a lack of ultrasensitive diagnostic tool to detect some diseases such as ischemic stroke, thereby impacting effective and efficient intervention for such diseases at an embryonic stage. In addition to the lack of proper detection of the neurological diseases, there is also a challenge in the treatment of these diseases. Carbon nanotubes have a potential to be employed in solving the theragnostic challenges in those diseases. In this study, carbon nanotubes were successfully synthesized for potential application in the detection and treatment of the neurological diseases such as ischemic stroke. Vertically aligned multiwalled carbon nanotubes (VA-MWCNTs) were purified with HCl, carboxylated with H₂SO₄:HNO₃ (3:1) and acylated with SOCl₂ for use in potential targeting studies and for the design of a carbon-based electrode for possible application in the diagnosis of neurological diseases, including ischemic stroke. MWCNTs were washed, extracted from the filter membranes and dried in a vacuum oven at 60 °C for 24 h prior to functionalization and PEGylation. CNTs were characterized by SEM, TEM, OCA, DLS, CV and EIS. The HCl-treated CNT obtained showed an internal diameter, outer diameter and thickness of 8 nm, 34 nm and 75 µm, while these parameters for the H₂SO₄-HNO₃-treated CNT were 8 nm, 23 nm and 41µm, respectively. PEGylated CNT demonstrated zeta potential, polydispersive index and particle size distribution of 6 mV, 0.41 and 98 nm, respectively. VA-MWCNTs from quartz tube were successfully purified, carboxylated, acylated and PEGylated for potential functionalization for use in targeting studies. For designing the carbon-based electrode, VA-MWCNTs on silicon wafer were successfully incorporated into epoxy resin for diagnostic applications. Functionalized MWCNTs were nontoxic towards PC-12 neuronal cells. In conclusion, vertically super-aligned MWCNTs have been successfully synthesized and functionalized for possible theragnostic biomedical applications in neurological disorders such as ischemic stroke.

Laser-based Thickness Control in a Double-Side Polishing System for Silicon Wafers

Thickness control is a critical process of automated polishing of large and thin Si wafers in the semiconductor industry. In this paper, an elaborate double-side polishing (DSP) system is demonstrated, which has a polishing unit with feedback control of wafer thickness based on the scan data of a laser probe. Firstly, the mechanical structure, as well as the signal transmission and control of the DSP system, are discussed, in which the thickness feedback control is emphasized. Then, the precise positioning of the laser probe is explored to obtain the continuous and valid scan data of the wafer thickness. After that, a B-spline model is applied for the characterization of the wafer thickness function to provide the thickness control system with credible thickness deviation information. Finally, experiments of wafer-thickness evaluation and control are conducted on the presented DSP system. With the advisable number of control points in B-spline fitting, the thickness variation can be effectively controlled in wafer polishing with the DSP system, according to the experimental results of curve fitting and the statistical analysis of the experimental data.

Proximity Gettering Design of Hydrocarbon⁻Molecular⁻Ion⁻Implanted Silicon Wafers Using Dark Current Spectroscopy for CMOS Image Sensors

We developed silicon epitaxial wafers with high gettering capability by using hydrocarbon-molecular-ion implantation. These wafers also have the effect of hydrogen passivation on process-induced defects and a barrier to out-diffusion of oxygen of the Czochralski silicon (CZ) substrate bulk during Complementary metal-oxide-semiconductor (CMOS) device fabrication processes. We evaluated the electrical device performance of CMOS image sensor fabricated on this type of wafer by using dark current spectroscopy. We found fewer white spot defects compared with those of intrinsic gettering (IG) silicon wafers. We believe that these hydrocarbon-molecular-ion-implanted silicon epitaxial wafers will improve the device performance of CMOS image sensors.

Classifying Image Stacks of Specular Silicon Wafer Back Surface Regions: Performance Comparison of CNNs and SVMs

In this work, we compare the performance of convolutional neural networks and support vector machines for classifying image stacks of specular silicon wafer back surfaces. In these image stacks, we can identify structures typically originating from replicas of chip structures or from grinding artifacts such as comets or grinding grooves. However, defects like star cracks are also visible in those images. To classify these image stacks, we test and compare three different approaches. In the first approach, we train a convolutional neural net performing feature extraction and classification. In the second approach, we manually extract features of the images and use these features to train support vector machines. In the third approach, we skip the classification layers of the convolutional neural networks and use features extracted from different network layers to train support vector machines. Comparing these three approaches shows that all yield an accuracy value above 90%. With a quadratic support vector machine trained on features extracted from a convolutional network layer we achieve the best compromise between precision and recall rate of the class star crack with 99.3% and 98.6%, respectively.

An Optical Diffuse Reflectance Model for the Characterization of a Si Wafer with an Evaporated SiO₂ Layer

Thin films are a type of coating that have a very wide spectrum of applications. They may be used as single layers or composed in multilayer stacks, which significantly extend their applications. One of the most commonly used material for thin films is silicon dioxide, SiO₂. Although there are other tools that can be used to measure the thickness of SiO₂ films, these tools are very complex and sophisticated. In this article, we propose the use of an exponential two-layer light-material interaction model, throughout its diffuse reflectance spectra, as an alternative for the measurement of the thickness of evaporated SiO₂ on Si wafers. The proposed model is evaluated experimentally by means of a 980-nm-thick SiO₂ layer evaporated on a Si wafer. The results show that the proposed model has a strong correlation with the thickness measurements obtained using commercial equipment.

Using a Natural Ratio to Compare DC and AC Resistances

The simulation and construction of a direct current (DC) and alternating current (AC) resistor, based on a silicon wafer, has been described and demonstrated. By applying the van der Pauw method and the Thompson-Lampard theorem, to within approximations accommodating the conditions of the resistor's construction, a constant resistance ratio, (π/ln2)², was derived that is independent of the sample resistivity and thickness. The constant ratio, valued at approximately 20.5, can theoretically be used as a basis of comparison between two distinct calibration chains, one based on the traceability from a calculable capacitor and the other based on the quantum Hall effect. To support the calculated ratio, several sets of simulations were performed for both DC and AC cases. The DC simulation results agreed with the ratio value to within 0.035 % when using a wafer thickness of 0.53 mm. Additionally, the experimental DC and AC (1 kHz) results agreed with the calculated ratio value to within 0.23 %, with at most a 0.06 % standard uncertainty before point contact errors from device fabrication.

Effects of diffusion process on potential induced degradation of silicon solar cells

BACKGROUND

Potential induced degradation (PID) has recently been identified as one of the most important degradation mechanisms for silicon solar cells. It is widely considered that PID is closely related with the manufacture and application period of solar modules.

METHODS

In this study, the effects of diffusion sheet resistance on PID were verified and explained by testing the emitter doping profile, the minority carrier lifetime, the emitter saturation current, the electrical performance of different cells, and the PID process.

RESULTS

With increasing sheet resistance of cells, the depth and saturation current density of the emitter both decreased, and the cell efficiency increased, whereas the PID phenomenon became serious.

CONCLUSIONS

It was found that higher sheet resistance or thinner P-N junction could lead to higher PID sensitivity. Therefore, more attention should be paid to PID phenomenon as the photovoltaic industry develops in the direction of high sheet resistance.

Development of Batch and Flow Immobilized Catalytic Systems with High Catalytic Activity and Reusability

My mission in catalysis research is to develop highly active and reusable supported catalytic systems in terms of fundamental chemistry and industrial application. For this purpose, I developed three types of highly active and reusable supported catalytic systems. The first type involves polymeric base-supported metal catalysts: Novel polymeric imidazole-Pd and Cu complexes were developed that worked at the mol ppm level for a variety of organic transformations. The second involves catalytic membrane-installed microflow reactors: Membranous polymeric palladium and copper complex/nanoparticle catalysts were installed at the center of a microtube to produce novel catalytic membrane-immobilized flow microreactor devices. These catalytic devices mediated a variety of organic transformations to afford the corresponding products in high yield within 1-38 s. The third is a silicon nanowire array-immobilized palladium nanoparticle catalyst. This device promoted a variety of organic transformations as a heterogeneous catalyst. The Mizoroki-Heck reaction proceeded with 280 mol ppb (0.000028 mol%) of the catalyst, affording the corresponding products in high yield.

Versatile Bottom-Up Synthesis of Tethered Bilayer Lipid Membranes on Nanoelectronic Biosensor Devices

Interfacing nanoelectronic devices with cell membranes can enable multiplexed detection of fundamental biological processes (such as signal transduction, electrophysiology, and import/export control) even down to the single ion channel level, which can lead to a variety of applications in pharmacology and clinical diagnosis. Therefore, it is necessary to understand and control the chemical and electrical interface between the device and the lipid bilayer membrane. Here, we develop a simple bottom-up approach to assemble tethered bilayer lipid membranes (tBLMs) on silicon wafers and glass slides, using a covalent tether attachment chemistry based on silane functionalization, followed by step-by-step stacking of two other functional molecular building blocks (oligo-poly(ethylene glycol) (PEG) and lipid). A standard vesicle fusion process was used to complete the bilayer formation. The monolayer synthetic scheme includes three well-established chemical reactions: self-assembly, epoxy-amine reaction, and EDC/NHS cross-linking reaction. All three reactions are facile and simple and can be easily implemented in many research labs, on the basis of common, commercially available precursors using mild reaction conditions. The oligo-PEG acts as the hydrophilic spacer, a key role in the formation of a homogeneous bilayer membrane. To explore the broad applicability of this approach, we have further demonstrated the formation of tBLMs on three common classes of (nano)electronic biosensor devices: indium-tin oxide-coated glass, silicon nanoribbon devices, and high-density single-walled carbon nanotubes (SWNT) networks on glass. More importantly, we incorporated alemethicin into tBLMs and realized the real-time recording of single ion channel activity with high sensitivity and high temporal resolution using the tBLMs/SWNT network transistor hybrid platform. This approach can provide a covalently bonded lipid coating on the oxide layer of nanoelectronic devices, which will enable a variety of applications in the emerging field of nanoelectronic interfaces to electrophysiology.

Magnetic Nano-skyrmion Lattice Observed in a Si-Wafer-Based Multilayer System

Growth, electronic properties, and magnetic properties of an Fe monolayer (ML) on an Ir/YSZ/Si(111) multilayer system have been studied using spin-polarized scanning tunneling microscopy. Our experiments reveal a magnetic nano-skyrmion lattice, which is fully equivalent to the magnetic ground state that has previously been observed for the Fe ML on Ir(111) bulk single crystals. In addition, the experiments indicate that the interface-stabilized skyrmion lattice is robust against local atomic lattice distortions induced by multilayer preparation.