Novel Tunnel-Contact-Controlled IGZO Thin-Film Transistors with High Tolerance to Geometrical Variability

Ultrahigh-gain organic transistors based on van der Waals metal-barrier interlayer-semiconductor junction

Intrinsic gain is a vital figure of merit in transistors, closely related to signal amplification, operation voltage, power consumption, and circuit simplification. However, organic thin-film transistors (OTFTs) targeted at high gain have suffered from challenges such as narrow subthreshold operating voltage, low-quality interface, and uncontrollable barrier. Here, we report a van der Waals metal-barrier interlayer-semiconductor junction-based OTFT, which shows ultrahigh performance including ultrahigh gain of ~104, low saturation voltage, negligible hysteresis, and good stability. The high-quality van der Waals-contacted junctions are mainly attributed to patterning EGaIn liquid metal electrodes by low-energy microfluidic processes. The wide-bandgap semiconductor Ga2O3 as barrier interlayer is achieved by in situ surface oxidation of EGaIn electrodes, allowing for an adjustable barrier height and expected thermionic emission properties. The organic inverters with a high gain of 5130 and a simplified current stabilizer are further demonstrated, paving a way for high-gain and low-power organic electronics.

Bio-inspired artificial synaptic transistors: evolution from innovative basic units to system integration

The investigation of transistor-based artificial synapses in bioinspired information processing is undergoing booming exploration, and is the stable building block for brain-like computing. Given that the storage and computing separation architecture of von Neumann construction is not conducive to the current explosive information processing, it is critical to accelerate the connection between hardware systems and software simulations of intelligent synapses. So far, various works based on a transistor-based synaptic system successfully simulated functions similar to biological nerves in the human brain. However, the influence of the semiconductor and the device structural design on synaptic properties is still poorly linked. This review concretely emphasizes the recent advances in the novel structure design of semiconductor materials and devices used in synaptic transistors, not only from a single multifunction synaptic device but also to system application with various connected routes and related working mechanisms. Finally, crises and opportunities in transistor-based synaptic interconnection are discussed and predicted.

Ferroelectric Wide-Bandgap Metal Halide Perovskite Field-Effect Transistors: Toward Transparent Electronics

Transparent field-effect transistors (FETs) are attacking intensive interest for constructing fancy "invisible" electronic products. Presently, the main technology for realizing transparent FETs is based on metal oxide semiconductors, which have wide-bandgap but generally demand sputtering technique or high-temperature (>350 °C) solution process for fabrication. Herein, a general device fabrication strategy for metal halide perovskite (MHP) FETs is shown, by which transparent perovskite FETs are successfully obtained using low-temperature (<150 °C) solution process. This strategy involves the employment of ferroelectric copolymer poly(vinylidene fluoride-co-trifluoroethylene) (PVDF-TrFE) as the dielectric, which conquers the challenging issue of gate-electric-field screening effect in MHP FETs. Additionally, an ultra-thin SnO₂ is inserted between the source/drain electrodes and MHPs to facilitate electron injection. Consequently, n-type semi-transparent MAPbBr₃ FETs and fully transparent MAPbCl₃ FETs which can operate well at room temperature with mobility over 10^-3  cm²  V^-1  s^-1 and on/off ratio >10³ are achieved for the first time. The low-temperature solution processability of these FETs makes them particularly attractive for applications in low-cost, large-area transparent electronics.

Heterogeneous Integration of Atomically-Thin Indium Tungsten Oxide Transistors for Low-Power 3D Monolithic Complementary Inverter

In this work, the authors demonstrate a novel vertically-stacked thin film transistor (TFT) architecture for heterogeneously complementary inverter applications, composed of p-channel polycrystalline silicon (poly-Si) and n-channel amorphous indium tungsten oxide (a-IWO), with a low footprint than planar structure. The a-IWO TFT with channel thickness of approximately 3-4 atomic layers exhibits high mobility of 24 cm² V^-1 s^-1 , near ideally subthreshold swing of 63 mV dec^-1 , low leakage current below 10^-13 A, high on/off current ratio of larger than 10⁹ , extremely small hysteresis of 0 mV, low contact resistance of 0.44 kΩ-µm, and high stability after encapsulating a passivation layer. The electrical characteristics of n-channel a-IWO TFT are well-matched with p-channel poly-Si TFT for superior complementary metal-oxide-semiconductor technology applications. The inverter can exhibit a high voltage gain of 152 V V^-1 at low supply voltage of 1.5 V. The noise margin can be up to 80% of supply voltage and perform the symmetrical window. The pico-watt static power consumption inverter is achieved by the wide energy bandgap of a-IWO channel and atomically-thin channel. The vertically-stacked complementary field-effect transistors (CFET) with high energy-efficiency can increase the circuit density in a chip to conform the development of next-generation semiconductor technology.

High-Performance Organic Source-Gated Transistors Enabled by the Indium-Tin Oxide-Diketopyrrolopyrrole Polymer Interface

Source-gated transistors are a new driver of low-power high-gain thin-film electronics. However, source-gated transistors based on organic semiconductors are not widely investigated yet despite their potential for future display and sensor technologies. We report on the fabrication and modeling of high-performance organic source-gated transistors utilizing a critical junction formed between indium-tin oxide and diketopyrrolopyrrole polymer. This partially blocked hole-injection interface is shown to offer both a sufficient level of drain currents and a strong depletion effect necessary for source pinch-off. As a result, our transistors exhibit a set of outstanding metrics, including an intrinsic gain of 160 V/V, an output resistance of 4.6 GΩ, and a saturation coefficient of 0.2 at an operating voltage of 5 V. Drift-diffusion simulation is employed to reproduce and rationalize the experimental data. The modeling reveals that the effective contact length is significantly reduced in an interdigitated electrode geometry, eventually contributing to the realization of low-voltage saturation.

Recent Advances in Metal−Oxide Thin−Film Transistors: Flexible/Stretchable Devices, Integrated Circuits, Biosensors and Neuromorphic Applications

Thin−film transistors using metal oxides have been investigated extensively because of their high transparency, large area, and mass production of metal oxide semiconductors. Compatibility with conventional semiconductor processes, such as photolithography of the metal oxide offers the possibility to develop integrated circuits on a larger scale. In addition, combinations with other materials have enabled the development of sensor applications or neuromorphic devices in recent years. Here, this paper provides a timely overview of metal−oxide−based thin−film transistors focusing on emerging applications, including flexible/stretchable devices, integrated circuits, biosensors, and neuromorphic devices. This overview also revisits recent efforts on metal oxide−based thin−film transistors developed with high compatibility for integration to newly reported applications.

Organic Field-Effect Transistor Fabricated on Internal Shrinking Substrate

In the development of flexible organic field-effect transistors (OFET), downsizing and reduction of the operating voltage are essential for achieving a high current density with a low operating power. Although the bias voltage of the OFETs can be reduced by a high-k dielectric, achieving a threshold voltage close to zero remains a challenge. Moreover, the scaling down of OFETs demands the use of photolithography, and may lead to compatibility issues in organic semiconductors. Herein, a new strategy based on the ductile properties of organic semiconductors is developed to control the threshold voltage at close to zero while concurrently downsizing the OFETs. The OFETs are fabricated on prestressed polystyrene shrink film substrates at room temperature, then thermal energy (160 °C) is used to release the strain. The OFETs conformally attached to the wrinkled structure are shown to locally amplify the electric field. After shrinking, the horizontal device area is reduced by 75%, and the threshold voltage is decreased from -1.44 to -0.18 V, with a subthreshold swing of 74 mV dec^-1 and intrinsic gain of 4.151 × 10⁴ . These results reveal that the shrink film can be generally used as a substrate for downsizing OFETs and improving their performance.

Multimodal transistors as ReLU activation functions in physical neural network classifiers

Artificial neural networks (ANNs) providing sophisticated, power-efficient classification are finding their way into thin-film electronics. Thin-film technologies require robust, layout-efficient devices with facile manufacturability. Here, we show how the multimodal transistor’s (MMT’s) transfer characteristic, with linear dependence in saturation, replicates the rectified linear unit (ReLU) activation function of convolutional ANNs (CNNs). Using MATLAB, we evaluate CNN performance using systematically distorted ReLU functions, then substitute measured and simulated MMT transfer characteristics as proxies for ReLU. High classification accuracy is maintained, despite large variations in geometrical and electrical parameters, as CNNs use the same activation functions for training and classification.

New Opportunities for High-Performance Source-Gated Transistors Using Unconventional Materials

Source-gated transistors (SGTs), which are typically realized by introducing a source barrier in staggered thin-film transistors (TFTs), exhibit many advantages over conventional TFTs, including ultrahigh gain, lower power consumption, higher bias stress stability, immunity to short-channel effects, and greater tolerance to geometric variations. These properties make SGTs promising candidates for readily fabricated displays, biomedical sensors, and wearable electronics for the Internet of Things, where low power dissipation, high performance, and efficient, low-cost manufacturability are essential. In this review, the general aspects of SGT structure, fabrication, and operation mechanisms are first discussed, followed by a detailed property comparison with conventional TFTs. Next, advances in high-performance SGTs based on silicon are first discussed, followed by recent advances in emerging metal oxides, organic semiconductors, and 2D materials, which are individually discussed, followed by promising applications that can be uniquely realized by SGTs and their circuitry. Lastly, this review concludes with challenges and outlook overview.

Crystallized Monolayer Semiconductor for Ohmic Contact Resistance, High Intrinsic Gain, and High Current Density

The contact resistance limits the downscaling and operating range of organic field-effect transistors (OFETs). Access resistance through multilayers of molecules and the nonideal metal/semiconductor interface are two major bottlenecks preventing the lowering of the contact resistance. In this work, monolayer (1L) organic crystals and nondestructive electrodes are utilized to overcome the abovementioned challenges. High intrinsic mobility of 12.5 cm² V^-1 s^-1 and Ohmic contact resistance of 40 Ω cm are achieved. Unlike the thermionic emission in common Schottky contacts, the carriers are predominantly injected by field emission. The 1L-OFETs can operate linearly from V_DS  = -1 V to V_DS as small as -0.1 mV. Thanks to the good pinch-off behavior brought by the monolayer semiconductor, the 1L-OFETs show high intrinsic gain at the saturation regime. At a high bias load, a maximum current density of 4.2 µA µm^-1 is achieved by the only molecular layer as the active channel, with a current saturation effect being observed. In addition to the low contact resistance and high-resolution lithography, it is suggested that the thermal management of high-mobility OFETs will be the next major challenge in achieving high-speed densely integrated flexible electronics.