CdSe Nanowire-Based Flexible Devices: Schottky Diodes, Metal-Semiconductor Field-Effect Transistors, and Inverters

Drift velocity saturation in field-effect transistors based on single CdSe nanowires

Field-effect transistors (FETs) based on semiconductor nanowires (NWs) have been extensively investigated and used for constructing novel nanoelectronic and optoelectronic devices in the past two decades. High electric field transport characteristics in FETs are of significance in both physics and applications. However, some specific physics phenomena at high electric field, such as drift velocity saturation, have rarely been reported in semiconductor NW FETs. In this work, the high electric field transport characteristics in FETs based on CdSe NWs were investigated. In the output characteristic curves, the current saturation phenomenon at high electric field caused by drift velocity saturation was observed. Typical values of saturation drift velocity and low electric field mobility in CdSe NW FETs were obtained. The low electric field mobility is in the range of 265.2 to 388.0 cm2 V-1 s-1. The saturation drift velocity is in the range of 5.1 × 105 to 7.0 × 105 cm s-1 and decreases monotonically with the increase of charge density, indicating that the electron-phonon scattering mechanism dominates at high electric field. Saturation drift velocity is an important figure-of-merit which characterizes the high electric field transport performance in FETs. As far as we know, this is the first experimental report on saturation drift velocity in CdSe NW FETs, which may provide valuable guidance for the design of nanoelectronic and optoelectronic devices based on CdSe NWs in the future.

1D and 2D Field Effect Transistors in Gas Sensing: A Comprehensive Review

Rapid progress in the synthesis and fundamental understanding of 1D and 2D materials have solicited the incorporation of these nanomaterials into sensor architectures, especially field effect transistors (FETs), for the monitoring of gas and vapor in environmental, food quality, and healthcare applications. Yet, several challenges have remained unaddressed toward the fabrication of 1D and 2D FET gas sensors for real-field applications, which are related to properties, synthesis, and integration of 1D and 2D materials into the transistor architecture. This review paper encompasses the whole assortment of 1D-i.e., metal oxide semiconductors (MOXs), silicon nanowires (SiNWs), carbon nanotubes (CNTs)-and 2D-i.e., graphene, transition metal dichalcogenides (TMD), phosphorene-materials used in FET gas sensors, critically dissecting how the material synthesis, surface functionalization, and transistor fabrication impact on electrical versus sensing properties of these devices. Eventually, pros and cons of 1D and 2D FETs for gas and vapor sensing applications are discussed, pointing out weakness and highlighting future directions.

Review on Quasi One-Dimensional CdSe Nanomaterials: Synthesis and Application in Photodetectors

During the past 15 years, quasi one-dimensional (1D) Cadmium Selenide (CdSe) nanomaterials have been widely investigated for high-performance electronic and optoelectronic devices, due to the unique geometrical and physical properties. In this review, recent advancements on diverse synthesis methods of 1D CdSe nanomaterials and the application in photodetectors have been illustrated in detail. First, several bottom-up synthesis methods of 1D CdSe nanomaterials have been introduced, including the vapor-liquid-solid method, the solution-liquid-solid method, and electrochemical deposition, etc. Second, the discussion on photodetectors based on 1D CdSe nanomaterials has been divided into three parts, including photodiodes, photoconductors, and phototransistors. Besides, some new mechanisms (such as enhancement effect of localized surface plasmon, optical quenching effect of photoconductivity, and piezo-phototronic effect), which can be utilized to enhance the performance of photodetectors, have also been elaborated. Finally, some major challenges and opportunities towards the practical integration and application of 1D CdSe nanomaterials in photodetectors have been discussed, which need to be further investigated in the future.

Nanowire Electronics: From Nanoscale to Macroscale

Semiconductor nanowires have attracted extensive interest as one of the best-defined classes of nanoscale building blocks for the bottom-up assembly of functional electronic and optoelectronic devices over the past two decades. The article provides a comprehensive review of the continuing efforts in exploring semiconductor nanowires for the assembly of functional nanoscale electronics and macroelectronics. Specifically, we start with a brief overview of the synthetic control of various semiconductor nanowires and nanowire heterostructures with precisely controlled physical dimension, chemical composition, heterostructure interface, and electronic properties to define the material foundation for nanowire electronics. We then summarize a series of assembly strategies developed for creating well-ordered nanowire arrays with controlled spatial position, orientation, and density, which are essential for constructing increasingly complex electronic devices and circuits from synthetic semiconductor nanowires. Next, we review the fundamental electronic properties and various single nanowire transistor concepts. Combining the designable electronic properties and controllable assembly approaches, we then discuss a series of nanoscale devices and integrated circuits assembled from nanowire building blocks, as well as a unique design of solution-processable nanowire thin-film transistors for high-performance large-area flexible electronics. Last, we conclude with a brief perspective on the standing challenges and future opportunities.

Plasmon-Induced Heterointerface Thinning for Schottky Barrier Modification of Core/Shell SiC/SiO2 Nanowires

In this work, plasmon-induced heterointerface thinning for Schottky barrier modification of core/shell SiC/SiO₂ nanowires is conducted by femtosecond (fs) laser irradiation. The incident energy of polarized fs laser (50 fs, 800 nm) is confined in the SiO₂ shell of the nanowire due to strong plasmonic localization in the region of the electrode-nanowire junction. With intense nonlinear absorption in SiO₂, the thickness of the SiO₂ layer can be thinned in a controllable way. The tuning of the SiO₂ barrier layer allows the promotion of electron transportation at the electrode-nanowire interface. The switching voltage of the rectifying junction made by the SiC/SiO₂ nanowire can be significantly tuned from 15.7 to 1 V. When selectively thinning at source and drain electrodes and leaving the SiO₂ barrier layer at the gate electrode intact, a metal/oxide/semiconductor (MOS) device is fabricated with low leakage current. This optically controlled interfacial engineering technology should be applicable for MOS components and other heterogeneous integration structures.

Photoelectric Detectors Based on Inorganic p-Type Semiconductor Materials

Photoelectric detectors are the central part of modern photodetection systems with numerous commercial and scientific applications. p-Type semiconductor materials play important roles in optoelectronic devices. Photodetectors based on p-type semiconductor materials have attracted a great deal of attention in recent years because of their unique properties. Here, a comprehensive summary of the recent progress mainly on photodetectors based on inorganic p-type semiconductor materials is presented. Various structures, including photoconductors, phototransistors, homojunctions, heterojunctions, p-i-n junctions, and metal-semiconductor junctions of photodetectors based on inorganic p-type semiconductor materials, are discussed and summarized. Perspectives and an outlook, highlighting the promising future directions of this research field, are also given.

Influence of interface inhomogeneity on the electrical transport mechanism of CdSe nanowire/Au Schottky junctions

Schottky junctions based on one-dimensional semiconductor nanomaterials, such as nanowires (NWs) and nanobelts (NBs), have been widely used in building high-performance nano-electric and nano-optoelectric devices during the past 15 years. Meanwhile, with considerable development in diverse application fields, more and more interests are turning to the investigation of the fundamental physics inside the junctions. The inhomogeneity of the interface between semiconductor NWs/NBs and metal electrodes has significant influence on the electrical transport mechanism of Schottky junctions. However, few researchers are involved in such studies and the physical mechanism here is far from fully understood. In this work, we fabricated Schottky junctions based on single CdSe NWs, in which Au was used as a Schottky contact with CdSe NW. The temperature dependence of the electrical transport characteristics of typical CdSe NW/Au Schottky junctions were characterized. The ideality factor was found to decrease and the zero-bias Schottky barrier height (SBH) increased monotonously as the temperature was increased from 140 to 320 K, and this relationship was ascribed to SBH inhomogeneity. The electrical transport mechanism was analyzed quantitatively with a spatial potential fluctuation model, in which SBHs obey the Gaussian distribution. The standard deviation of the SBH distribution was determined to be as high as 13.54% and 13.94% of the zero-bias mean SBH in the temperature ranges 140-200 K and 200-320 K, respectively. Our work revealed the barrier inhomogeneity at CdSe NW/Au interfaces and its influence on the electrical transport mechanism of NW-based Schottky junctions.

Rectifying Characteristics and Semiconductor-Metal Transition Induced by Interfacial Potential in the Mn3CuN/n-Si Intermetallic Heterojunction

The Mn₃CuN/n-Si heterojunction device is first designed in the antiperovskite compound, and excellent rectifying characteristics are obtained. The rectification ratio (RR) reaches as large as 38.9 at 10 V, and the open-circuit voltage V_oc of 1.13 V is observed under temperature of 410 K. The rectifying behaviors can be well described by the Shockley equation, indicating the existence of a Schottky diode. Simultaneously, a particular semiconductor-metal transition (SMT) behavior at 250 K is also observed in the Mn₃CuN/n-Si heterojunction. The interfacial band bending induced inversion layer, which is clarified by the interfacial schematic band diagrams, is believed to be responsible for the SMT and rectifying effects. This study can develop a new class of materials for heterojunction, rectifying devices, and SMT behaviors.

Engineered Solution-Liquid-Solid Growth of a "Treelike" 1D/1D TiO2 Nanotube-CdSe Nanowire Heterostructure: Photoelectrochemical Conversion of Broad Spectrum of Solar Energy

This work presents a hitherto unreported approach to assemble a 1D oxide-1D chalcogenide heterostructured photoactive film. As a representative system, bismuth (Bi) catalyzed 1D CdSe nanowires are directly grown on anodized 1D TiO₂ nanotube (T_NT). A combination of the reductive successive-ionic-layer-adsorption-reaction (R-SILAR) and the solution-liquid-solid (S-L-S) approach is implemented to fabricate this heterostructured assembly, reported in this 1D/1D form for the first time. XRD, SEM, HRTEM, and elemental mapping are performed to systematically characterize the deposition of bismuth on T_NT and the growth of CdSe nanowires leading to the evolution of the 1D/1D heterostructure. The resulting "treelike" photoactive architecture demonstrates UV-visible light-driven electron-hole pair generation. The photoelectrochemical results highlight: (i) the formation of a stable n-n heterojunction between TiO₂ nanotube and CdSe nanowire, (ii) an excellent correlation between the absorbance vis-à-vis light conversion efficiency (IPCE), and (iii) a photocurrent density of 3.84 mA/cm². This proof-of-concept features the viability of the approach for designing such complex 1D/1D oxide-chalcogenide heterostructures that can be of interest to photovoltaics, photocatalysis, environmental remediation, and sensing.

Surface Charge Transfer Doping via Transition Metal Oxides for Efficient p-Type Doping of II-VI Nanostructures

Wide band gap II-VI nanostructures are important building blocks for new-generation electronic and optoelectronic devices. However, the difficulty of realizing p-type conductivity in these materials via conventional doping methods has severely handicapped the fabrication of p-n homojunctions and complementary circuits, which are the fundamental components for high-performance devices. Herein, by using first-principles density functional theory calculations, we demonstrated a simple yet efficient way to achieve controlled p-type doping on II-VI nanostructures via surface charge transfer doping (SCTD) using high work function transition metal oxides such as MoO₃, WO₃, CrO₃, and V₂O₅ as dopants. Our calculations revealed that these oxides were capable of drawing electrons from II-VI nanostructures, leading to accumulation of positive charges (holes injection) in the II-VI nanostructures. As a result, Fermi levels of the II-VI nanostructures were shifted toward the valence band regions after surface modifications, along with the large enhancement of work functions. In situ ultraviolet photoelectron spectroscopy and X-ray photoelectron spectroscopy characterizations verified the significant interfacial charge transfer between II-VI nanostructures and surface dopants. Both theoretical calculations and electrical transfer measurements on the II-VI nanostructure-based field-effect transistors clearly showed the p-type conductivity of the nanostructures after surface modifications. Strikingly, II-VI nanowires could undergo semiconductor-to-metal transition by further increasing the SCTD level. SCTD offers the possibility to create a variety of electronic and optoelectronic devices from the II-VI nanostructures via realization of complementary doping.

Ultralow power complementary inverter circuits using axially doped p- and n-channel Si nanowire field effect transistors

We have successfully synthesized axially doped p- and n-type regions on a single Si nanowire (NW). Diodes and complementary metal-oxide-semiconductor (CMOS) inverter devices using single axial p- and n-channel Si NW field-effect transistors (FETs) were fabricated. We show that the threshold voltages of both p- and n-channel Si NW FETs can be lowered to nearly zero by effectively controlling the doping concentration. Because of the high performance of the p- and n-type Si NW channel FETs, especially with regard to the low threshold voltage, the fabricated NW CMOS inverters have a low operating voltage (<3 V) while maintaining a high voltage gain (∼6) and ultralow static power dissipation (≤0.3 pW) at an input voltage of ±3 V. This result offers a viable way for the fabrication of a high-performance high-density logic circuit using a low-temperature fabrication process, which makes it suitable for flexible electronics.