Charge Transport in Low-Temperature Processed Thin-Film Transistors Based on Indium Oxide/Zinc Oxide Heterostructures

Enhancing the Carrier Mobility and Bias Stability in Metal-Oxide Thin Film Transistors with Bilayer InSnO/a-InGaZnO Heterojunction Structure

In this study, the electrical performance and bias stability of InSnO/a-InGaZnO (ITO/a-IGZO) heterojunction thin-film transistors (TFTs) are investigated. Compared to a-IGZO TFTs, the mobility (µFE) and bias stability of ITO/a-IGZO heterojunction TFTs are enhanced. The band alignment of the ITO/a-IGZO heterojunction is analyzed by using X-ray photoelectron spectroscopy (XPS). A conduction band offset (∆EC) of 0.5 eV is observed in the ITO/a-IGZO heterojunction, resulting in electron accumulation in the formed potential well. Meanwhile, the ∆EC of the ITO/a-IGZO heterojunction can be modulated by nitrogen doping ITO (ITON), which can affect the carrier confinement and transport properties at the ITO/a-IGZO heterojunction interface. Moreover, the carrier concentration distribution at the ITO/a-IGZO heterointerface is extracted by means of TCAD silvaco 2018 simulation, which is beneficial for enhancing the electrical performance of ITO/a-IGZO heterojunction TFTs.

Solution-processed bilayer InGaZnO/In2O3thin film transistors at low temperature by lightwave annealing

At low temperatures about 230 °C, bilayer InGaZnO/In2O3thin film transistors (TFTs) were prepared by a solution process with lightwave annealing. The InGaZnO/In2O3bilayer TFTs with SiO2as dielectric layer show high electrical performances, such as a mobility of 7.63 cm2V-1s-1, a threshold voltage (Vth) of 3.8 V, and an on/off ratio higher than 107, which are superior to single-layer InGaZnO TFTs or In2O3TFTs. Moreover, bilayer InGaZnO/In2O3TFTs demonstrated a great bias stability enhancement due to the introduction of top InGaZnO film act as a passivation layer, which could prevent the interaction of ambient air with the bottom In2O3layer. By using high dielectric constant AlOxfilm, the InGaZnO/In2O3TFTs exhibit an improved mobility of 47.7 cm2V-1s-1. The excellent electrical performance of the solution-based InGaZnO/In2O3TFTs shows great application potential for low-cost flexible printed electronics.

Machine Learning Driven Channel Thickness Optimization in Dual-Layer Oxide Thin-Film Transistors for Advanced Electrical Performance

Machine learning (ML) provides temporal advantage and performance improvement in practical electronic device design by adaptive learning. Herein, Bayesian optimization (BO) is successfully applied to the design of optimal dual-layer oxide semiconductor thin film transistors (OS TFTs). This approach effectively manages the complex correlation and interdependency between two oxide semiconductor layers, resulting in the efficient design of experiment (DoE) and reducing the trial-and-error. Considering field effect mobility (𝜇) and threshold voltage (Vth ) simultaneously, the dual-layer structure designed by the BO model allows to produce OS TFTs with remarkable electrical performance while significantly saving an amount of experimental trial (only 15 data sets are required). The optimized dual-layer OS TFTs achieve the enhanced field effect mobility of 36.1 cm2  V-1  s-1 and show good stability under bias stress with negligible difference in its threshold voltage compared to conventional IGZO TFTs. Moreover, the BO algorithm is successfully customized to the individual preferences by applying the weight factors assigned to both field effect mobility (𝜇) and threshold voltage (Vth ).

Ultra-thin gate insulator of atomic-layer-deposited AlOxand HfOxfor amorphous InGaZnO thin-film transistors

To strengthen the downscaling potential of top-gate amorphous oxide semiconductor (AOS) thin-film transistors (TFTs), the ultra-thin gate insulator (GI) was comparatively implemented using the atomic-layer-deposited (ALD) AlO_xand HfO_x. Both kinds of high-kGIs exhibit good insulating properties even with the physical thickness thinning to 4 nm. Compared to the amorphous indium-gallium-zinc oxide (a-IGZO) TFTs with 4 nm AlO_xGI, the 4 nm HfO_xenables a larger GI capacitance, while the HfO_x-gated TFT suffers higher gate leakage current and poorer subthreshold slope, respectively originating from the inherently small band offset and the highly defective interface between a-IGZO and HfO_x. Such imperfect a-IGZO/HfO_xinterface further causes noticeable positive bias stress instability. Both ALD AlO_xand HfO_xwere found to react with the underneath a-IGZO channel to generate the interface defects, such as metal interstitials and oxygen vacancies, while the ALD process of HfO_xgives rise to a more severe reduction of a-IGZO. Moreover, when such a defective interface is covered by the top gate, it cannot be readily restored using the conventional oxidizing post-treatments and thus desires the reduction-resistant pre-treatments of AOSs.

Heterojunction Transistors Printed via Instantaneous Oxidation of Liquid Metals

Semiconducting transparent metal oxides are critical high mobility materials for flexible optoelectronic devices such as displays. We introduce the continuous liquid metal printing (CLMP) technique to enable rapid roll-to-roll compatible deposition of semiconducting two-dimensional (2D) metal oxide heterostructures. We leverage CLMP to deposit 10 cm²-scale nanosheets of InO_x and GaO_x in seconds at a low process temperature (T < 200 °C) in air, fabricating heterojunction thin film transistors with 100× greater I_on/I_off, 4× steeper subthreshold slope, and a 50% increase in mobility over pure InO_x channels. Detailed nanoscale characterization of the heterointerface by X-ray photoelectron spectroscopy, UV-vis, and Kelvin probe elucidates the origins of enhanced electronic transport in these 2D heterojunctions. This combination of CLMP with the electrostatic control induced by the heterostructure architecture leads to high performance (μ_lin up to 22.6 cm²/(V s)) while reducing the process time for metal oxide transistors by greater than 100× compared with sol-gels and vacuum deposition methods.

One-Step Synergistic Treatment Approach for High Performance Amorphous InGaZnO Thin-Film Transistors Fabricated at Room Temperature

Amorphous InGaZnO (a-InGaZnO) is currently the most prominent oxide semiconductor complement to low-temperature polysilicon for thin-film transistor (TFT) applications in next-generation displays. However, balancing the transmission performance and low-temperature deposition is the primary obstacle in the application of a-InGaZnO TFTs in the field of ultra-high resolution optoelectronic display. Here, we report that a-InGaZnO:O TFT prepared at room temperature has high transport performance, manipulating oxygen vacancy (V_O) defects through an oxygen-doped a-InGaZnO framework. The main electrical properties of a-InGaZnO:O TFTs included high field-effect mobility (µ_FE) of 28 cm²/V s, a threshold voltage (V_th) of 0.9 V, a subthreshold swing (SS) of 0.9 V/dec, and a current switching ratio (I_on/I_off) of 10⁷; significant improvements over a-InGaZnO TFTs without oxygen plasma. A possible reason for this is that appropriate oxygen plasma treatment and room temperature preparation technology jointly play a role in improving the electrical performance of a-InGaZnO TFTs, which could not only increase carrier concentration, but also reduce the channel-layer surface defects and interface trap density of a-InGaZnO TFTs. These provides a powerful way to synergistically boost the transport performance of oxide TFTs fabricated at room temperature.

High-Performance Deep Red Colloidal Quantum Well Light-Emitting Diodes Enabled by the Understanding of Charge Dynamics

Colloidal quantum wells (CQWs) have emerged as a promising family of two-dimensional (2D) optoelectronic materials with outstanding properties, including ultranarrow luminescence emission, nearly unity quantum yield, and large extinction coefficient. However, the performance of CQWs-based light-emitting diodes (CQW-LEDs) is far from satisfactory, particularly for deep red emissions (≥660 nm). Herein, high efficiency, ultra-low-efficiency roll-off, high luminance, and extremely saturated deep red CQW-LEDs are reported. A key feature for the high performance is the understanding of charge dynamics achieved by introducing an efficient electron transport layer, ZnMgO, which enables balanced charge injection, reduced nonradiative channels, and smooth films. The CQW-LEDs based on (CdSe/CdS)@(CdS/CdZnS) ((core/crown)@(colloidal atomic layer deposition shell/hot injection shell)) show an external quantum efficiency of 9.89%, which is a record value for 2D nanocrystal LEDs with deep red emissions. The device also exhibits an ultra-low-efficiency roll-off and a high luminance of 3853 cd m^-2. Additionally, an exceptional color purity with the CIE coordinates of (0.719, 0.278) is obtained, indicating that the color gamut covers 102% of the International Telecommunication Union Recommendation BT 2020 (Rec. 2020) standard in the CIE 1931 color space, which is the best for CQW-LEDs. Furthermore, an active-matrix CQW-LED pixel circuit is demonstrated. The findings imply that the understanding of charge dynamics not only enables high-performance CQW-LEDs and can be further applied to other kinds of nanocrystal LEDs but also is beneficial to the development of CQW-LEDs-based display technology and related integrated optoelectronics.

Comparative Study of Atomic Layer Deposited Indium-Based Oxide Transistors with a Fermi Energy Level-Engineered Heterojunction Structure Channel through a Cation Combinatorial Approach

Amorphous indium-gallium-zinc oxide (a-IGZO) has become a standard channel ingredient of switching/driving transistors in active-matrix organic light-emitting diode (AMOLED) televisions. However, mobile AMOLED displays with a high pixel density (≥500 pixels per inch) and good form factor do not often employ a-IGZO transistors due to their modest mobility (10-20 cm²/(V s)). Hybrid low-temperature polycrystalline silicon and oxide transistor (LTPO) technology is being adapted in high-end mobile AMOLED devices due to its ultralow power consumption and excellent current drivability. The critical issues of LTPO (including a complicated structure and high fabrication costs) require a search for alternative all-oxide thin-film transistors (TFTs) with low-cost processability and simple device architecture. The atomic layer deposition (ALD) method is a promising route for high-performance all-oxide TFTs due to its unique features, such as in situ cation composition tailoring ability, precise nanoscale thickness controllability, and excellent step coverage. Here, we report an in-depth comparative investigation of TFTs with indium-gallium oxide (IGO)/gallium-zinc oxide (GZO) and indium-zinc oxide (IZO)/GZO heterojunction stacks using an ALD method. IGO and IZO layers with different compositions were tested as a confinement layer (CL), whereas the GZO layer was used as a barrier layer (BL). Optimal IGO/GZO and IZO/GZO channels were carefully designed on the basis of their energy band properties, where the formation of a quasi-two-dimensional electron gas (q2DEG) near the CL/BL interface is realized by rational design of the band gaps and work-functions of the IGO, IZO, and GZO thin films. To verify the effect of q2DEG formation, the device performances and stabilities of TFTs with CL/BL oxide heterojunction stacks were examined and compared to those of TFTs with a single CL layer. The optimized device with the In_0.75Zn_0.25O/Ga_0.80Zn_0.20O stack showed remarkable electrical performance: μ_FE of 76.7 ± 0.51 cm²/(V s), V_TH of -0.37 ± 0.19 V, SS of 0.13 ± 0.01 V/dec, and I_ON/OFF of 2.5 × 10¹⁰ with low operation voltage range of ≥2 V and excellent stabilities (ΔV_TH of +0.35, -0.67, and +0.08 V for PBTS, NBIS, and CCS, respectively). This study suggests the feasibility of using high-performance ALD-derived oxide TFTs (which can compete with the performance of LTPO transistors) for high-end mobile AMOLED displays.

Atomic Layer Deposition of Ternary Indium/Tin/Aluminum Oxide Thin Films, Their Characterization and Transistor Performance under Illumination

Multilayered heterostructures comprising of In2 O3 , SnO2 , and Al2 O3 were studied for their application in thin-film transistors (TFT). The compositional influence of tin oxide on the properties of the thin-film, as well as on the TFT characteristics is investigated. The heterostructures are fabricated by atomic layer deposition (ALD) at 200 °C, employing trimethylindium (TMI), tetrakis(dimethylamino)tin (TDMASn), trimethylaluminum (TMA), and water as precursors. After post-deposition annealing at 400 °C the thin-films are found to be amorphous, however, they show a discrete layer structure of the individual oxides of uniform film thickness and high optical transparency in the visible region. Incorporation of only two monolayers of Al2 O3 in the active semiconducting layer the formation of oxygen vacancies can be effectively suppressed, resulting in an improved semiconducting and switching behavior. The heterostacks comprising of In2 O3 /SnO2 /Al2 O3 are incorporated into TFT devices, exhibiting a saturation field-effect mobility (μsat ) of 2.0 cm2  ⋅ V-1  s-1 , a threshold-voltage (Vth ) of 8.6 V, a high current on/off ratio (IOn /IOff ) of 1.0×107 , and a subthreshold swing (SS) of 485 mV ⋅ dec-1 . The stability of the TFT under illumination is also altered to a significant extent. A change in the transfer characteristic towards conductive behavior is evident when illuminated with light of an energy of 3.1 eV (400 nm).

Significance of Pairing In/Ga Precursor Structures on PEALD InGaOx Thin-Film Transistor

Atomic layer deposition (ALD) is a promising deposition method to precisely control the thickness and metal composition of oxide semiconductors, making them attractive materials for use in thin-film transistors because of their high mobility and stability. However, multicomponent deposition using ALD is difficult to control without understanding the growth mechanisms of the precursors and reactants. Thus, the adsorption and surface reactivity of various precursors must be investigated. In this study, InGaO (IGO) semiconductors were deposited by plasma-enhanced atomic layer deposition (PEALD) using two sets of In and Ga precursors. The first set of precursors consisted of In(CH₃)₃[CH₃OCH₂CH₂NHtBu] (TMION) and Ga(CH₃)₃[CH₃OCH₂CH₂NHtBu]) (TMGON), denoted as TM-IGO; the other set of precursors was (CH₃)₂In(CH₂)₃N(CH₃)₂ (DADI) and (CH₃)₃Ga (TMGa), denoted as DT-IGO. We varied the number of InO subcycles between 3 and 19 to control the chemical composition of the ALD-processed films. The indium compositions of TM-IGO and DT-IGO thin films increased as the InO subcycles increased. However, the indium/gallium metal ratios of TM-IGO and DT-IGO were quite different, despite having the same InO subcycles. The steric hindrance of the precursors and different densities of the adsorption sites contributed to the different TM-IGO and DT-IGO metal ratios. The electrical properties of the precursors, such as Hall characteristics and device parameters of the thin-film transistors, were also different, even though the same deposition process was used. These differences might have resulted from the growth behavior, anion/cation ratios, and binding states of the IGO thin films.

Effect of the Bilayer Period of Atomic Layer Deposition on the Growth Behavior and Electrical Properties of the Amorphous In-Zn-O Film

This study reports on the effect of a bilayer period on the growth behavior, microstructure evolution, and electrical properties of atomic layer deposition (ALD) deposited In-Zn-O (IZO) films, fixing the ALD cycle ratio of In-O/Zn-O as 9:1. Here, the bilayer period is defined as the total number of ALD cycles in one supercycle of In-O and Zn-O by alternately stacking Zn-O and In-O layers at a temperature of 220 °C. IZO films with a bilayer period from 10 to 40 cycles, namely, IZO[In-O/Zn-O = 9:1] to IZO[36:4], result to form an amorphous phase with a resistivity of 4.94 × 10^-4 Ω·cm. However, by increasing the bilayer period above 100 cycles, the IZO films begin to form a mixed amorphous-nanocrystalline microstructure, resulting from the limited intermixing at the interfaces. Concomitantly, the overall film resistivity is considerably increased with a simultaneous decrease in both the carrier mobility and the concentration. These results not only reveal the importance of the bilayer period in designing the ALD stacking sequence in the ALD-IZO, but also provide the possibility of forming various multilayered materials with different electrical properties.

Artificial Synapse Emulated through Fully Aqueous Solution-Processed Low-Voltage In2O3 Thin-Film Transistor with Gd2O3 Solid Electrolyte

Brain-like neuromorphic computing system provides an alternative approach for the future computer for its characteristics of high-efficiency, power-efficient, self-learning, and parallel computing. Therefore, the imitation of synapse behavior based on microelectronics is particularly important. Recently, the synaptic transistors have received widespread attention. Among them, solid oxide-based synaptic transistors are more compatible with the large-scale fabrication than the liquid and organic-based transistors. So the development of oxide synaptic transistor is required. Here, a novel aqueous solution-processed Gd₂O₃ is suggested to be the solid electrolyte for synaptic transistors. The microstructure and the dielectric properties of Gd₂O₃ film are investigated, which show the potential for the simulation of synaptic transmission. Then, the fully aqueous solution-processed In₂O₃/Gd₂O₃ thin-film transistor (TFT) is fabricated. The device exhibits an acceptable electrical performance with a small threshold voltage of 1.24 V, and a small subthreshold swing of 0.12 V/decade. The artificial synapse behavior is stimulated and the short-term plasticity of In₂O₃/Gd₂O₃ TFT is studied. The dependence of its excitatory postsynaptic current on presynaptic pulse magnitude, width, and frequency is verified. Besides, the synapse behavior of devices under continuous illumination stresses is investigated. The lights with different photon energy have different effects on the synaptic transmission, which is related to the ionization of oxygen vacancies. Our results demonstrate that fully aqueous solution-processed In₂O₃ TFT with Gd₂O₃ solid electrolyte is a candidate for the synaptic transistor.

Combustion synthesis of electrospun LaInO nanofiber for high-performance field-effect transistors

One-dimensional semiconductor nanofibers are regarded as ideal materials for electronics due to their distinctive morphology and characteristics. In this work, La-doped indium oxide (LaInO) nanofibers are fabricated as the channel layer to reduce O vacancies and the density of interface trap states; this is clearly confirmed by investigating the stability under positive bias stress and the capacitance-voltage for field-effect transistors (FETs). The In₂O₃ nanofiber FETs optimized by doping with 5 mol% La exhibit excellent electrical performance with a mobility of 4.95 cm² V^-1 s^-1 and an on/off current ratio of 1.1 × 10⁸. In order to further enhance the electrical performance of LaInO nanofiber FETs, ZrAlO _x film, which has a high dielectric constant, is employed as the insulator for the LaInO nanofiber FETs. The LaInO nanofiber FETs with ZrAlO _x insulator have a high mobility of 13.5 cm² V^-1 s^-1. These findings clearly indicate the great promise of La-doped In₂O₃ nanofibers in future one-dimensional nanoelectronics.

Corrugated Heterojunction Metal-Oxide Thin-Film Transistors with High Electron Mobility via Vertical Interface Manipulation

A new strategy is reported to achieve high-mobility, low-off-current, and operationally stable solution-processable metal-oxide thin-film transistors (TFTs) using a corrugated heterojunction channel structure. The corrugated heterojunction channel, having alternating thin-indium-tin-zinc-oxide (ITZO)/indium-gallium-zinc-oxide (IGZO) and thick-ITZO/IGZO film regions, enables the accumulated electron concentration to be tuned in the TFT off- and on-states via charge modulation at the vertical regions of the heterojunction. The ITZO/IGZO TFTs with optimized corrugated structure exhibit a maximum field-effect mobility >50 cm2 V-1 s-1 with an on/off current ratio of >108 and good operational stability (threshold voltage shift <1 V for a positive-gate-bias stress of 10 ks, without passivation). To exploit the underlying conduction mechanism of the corrugated heterojunction TFTs, a physical model is implemented by using a variety of chemical, structural, and electrical characterization tools and Technology Computer-Aided Design simulations. The physical model reveals that efficient charge manipulation is possible via the corrugated structure, by inducing an extremely high carrier concentration at the nanoscale vertical channel regions, enabling low off-currents and high on-currents depending on the applied gate bias.