Fundamental aspects to localize self-catalyzed III-V nanowires on silicon

Nucleation-Limited Kinetics of GaAs Nanostructures Grown by Selective Area Epitaxy: Implications for Shape Engineering in Optoelectronics Devices

The growth kinetics of vertical III-V nanowires (NWs) were clarified long ago. The increasing aspect ratio of NWs results in an increase in the surface area, which, in turn, enhances the material collection. The group III adatom diffusion from the NW sidewalls to the top sustains a superlinear growth regime. In this work, we report on the growth of different GaAs nanostructures by selective area MOVPE on GaAs (111)B substrates. We show that the opening dimensions and geometry qualitatively alter the morphology and height evolution of the structures. We compare the time evolution of vertical GaAs NWs stemming from circular holes and horizontal GaAs nanomembranes (NMs) growing from one-dimensional (1D) rectangular slits on the same substrate. While NW heights grow exponentially with time, NMs surprisingly exhibit sublinear kinetics. The absence of visible atomic steps on the top facets of both NWs and NMs suggests layer-by-layer growth in the mononuclear mode. We interpret these observations within a self-consistent growth model, which links the diffusion flux of Ga adatoms to the position- and shape-dependent nucleation rate on top of NWs and NMs. Specifically, the island nucleation rate is lower on top of the NMs than that on the NWs, resulting in the total diffusion flux being directed from the top facet to the sidewalls. This gives a sublinear height evolution for the NMs. These results open innovative perspectives for shape engineering of III-V nanostructures and new avenues for the design of optoelectronics and photonic devices.

Patterning optimization for device realization of patterned GaAsSbN nanowire photodetectors

Vertically grown nanowires (NWs) are a research interest in optoelectronics and photovoltaic applications due to their high surface to volume ratio and good light trapping capabilities. This study presents the effects of process and design parameters on self-catalyzed GaAsSbN NWs grown by plasma-assisted molecular beam epitaxy on patterned silicon substrates using electron beam lithography. Vertical alignment of the patterned NWs examined via scanning electron microscopy show the sensitivity of patterned NW growth to the parameters of NW diameter, pitch, dose time, etching techniques and growth plan. Diameters range from 90 nm to 250 nm. Pitch lengths of 200 nm, 400 nm, 600 nm, 800 nm, 1000 nm, and 1200 nm were examined. Dry etching of the oxide layer of the silicon substrate and PMMA coating is performed using reactive ion etching (RIE) for 20 s and 120 s respectively. Comparisons of different HF etch durations performed pre and post PMMA removal are presented. Additionally, the report of an observed surfactant effect in dilute nitride GaAsSbN NWs in comparison to non-nitride GaAsSb is presented. Optimizations to patterning, RIE, and HF etching are presented to obtain higher vertical yield of patterned GaAsSbN NWs, achieving ∼80% of the expected NWµm2. Room temperature and 4 K photoluminescence results show the effect of nitride incorporation for further bandgap tuning, and patterned pitch on the optical characteristics of the NWs which gives insights to the compositional homogeneity for NWs grown at each pitch length.

Revealing Seed-Mediated Structural Evolution of Copper-Silicide Nanostructures: Generating Structured Current Collectors for Rechargeable Batteries

Metal silicide thin films and nanostructures typically employed in electronics have recently gained significant attention in battery technology, where they are used as active or inactive materials. However, unlike thin films, the science behind the evolution of silicide nanostructures, especially 1D nanowires (NWs), is a key missing aspect. Cux Siy nanostructures synthesized by solvent vapor growth technique are studied as a model system to gain insights into metal silicide formation. The temperature-dependent phase evolution of Cux Siy structures proceeds from Cu>Cu0.83 Si0.17 >Cu5 Si>Cu15 Si4 . The role of Cu diffusion kinetics on the morphological progression of Cu silicides is studied, revealing that the growth of 1D metal silicide NWs proceeds through an in situ formed, Cu seed-mediated, self-catalytic process. The different Cux Siy morphologies synthesized are utilized as structured current collectors for K-ion battery anodes. Sb deposited by thermal evaporation upon Cu15 Si4 tripod NWs and cube architectures exhibit reversible alloying capacities of 477.3 and 477.6 mAh g-1 at a C/5 rate. Furthermore, Sb deposited Cu15 Si4 tripod NWs anode tested in Li-ion and Na-ion batteries demonstrate reversible capacities of ≈518 and 495 mAh g-1 .

Initialization of Nanowire or Cluster Growth Critically Controlled by the Effective V/III Ratio at the Early Nucleation Stage

For self-catalyzed nanowires (NWs), reports on how the catalytic droplet initiates successful NW growth are still lacking, making it difficult to control the yield and often accompanying a high density of clusters. Here, we have performed a systematic study on this issue, which reveals that the effective V/III ratio at the initial growth stage is a critical factor that governs the NW growth yield. To initiate NW growth, the ratio should be high enough to allow the nucleation to extend to the entire contact area between the droplet and substrate, which can elevate the droplet off of the substrate, but it should not be too high in order to keep the droplet. This study also reveals that the cluster growth between NWs is also initiated from large droplets. This study provides a new angle from the growth condition to explain the cluster formation mechanism, which can guide high-yield NW growth.

Epitaxial growth of crystal phase quantum dots in III-V semiconductor nanowires

Crystal phase quantum dots (QDs) are formed during the axial growth of III-V semiconductor nanowires (NWs) by stacking different crystal phases of the same material. In III-V semiconductor NWs, both zinc blende (ZB) and wurtzite (WZ) crystal phases can coexist. The band structure difference between both crystal phases can lead to quantum confinement. Thanks to the precise control in III-V semiconductor NW growth conditions and the deep knowledge on the epitaxial growth mechanisms, it is nowadays possible to control, down to the atomic level, the switching between crystal phases in NWs forming the so-called crystal phase NW-based QDs (NWQDs). The shape and size of the NW bridge the gap between QDs and the macroscopic world. This review is focused on crystal phase NWQDs based on III-V NWs obtained by the bottom-up vapor-liquid-solid (VLS) method and their optical and electronic properties. Crystal phase switching can be achieved in the axial direction. In contrast, in the core/shell growth, the difference in surface energies between different polytypes can enable selective shell growth. One reason for the very intense research in this field is motivated by their excellent optical and electronic properties both appealing for applications in nanophotonics and quantum technologies.

Submicron-Size Emitters of the 1.2-1.55 μm Spectral Range Based on InP/InAsP/InP Nanostructures Integrated into Si Substrate

We study photoluminescence of InP/InAsP/InP nanostructures monolithically integrated to a Si(100) substrate. The InP/InAsP/InP nanostructures were grown in pre-formed pits in the silicon substrate using an original approach based on selective area growth and driven by a molten alloy in metal-organic vapor epitaxy method. This approach provides the selective-area synthesis of the ordered emitters arrays on Si substrates. The obtained InP/InAsP/InP nanostructures have a submicron size. The individual InP/InAsP/InP nanostructures were investigated by photoluminescence spectroscopy at room temperature. The tuning of the emission line in the spectral range from 1200 nm to 1550 nm was obtained depending on the growth parameters. These results provide a path for the growth on Si(100) substrate of position-controlled heterojunctions based on InAs_1-xP_x for nanoscale optical devices operating at the telecom band.

GaAs/GaInP nanowire solar cell on Si with state-of-the-art Voc and quasi-Fermi level splitting

With their unique structural, optical and electrical properties, III-V nanowires (NWs) are an extremely attractive option for the direct growth of III-Vs on Si for tandem solar cell applications. Here, we introduce a core-shell GaAs/GaInP NW solar cell grown by molecular beam epitaxy on a patterned Si substrate, and we present an in-depth investigation of its optoelectronic properties and limitations. We report a power conversion efficiency of almost 3.7%, and a state-of-the-art open-circuit voltage (V_OC) for a NW array solar cell on Si of 0.65 V. We also present the first quantification of the quasi-Fermi level splitting in NW array solar cells using hyperspectral photoluminescence measurements. A value of 0.84 eV is obtained at 1 sun (1.01 eV at 81 suns), which is significantly higher than qV_OC. It indicates NWs with a better intrinsic optoelectronic quality than what could be expected from TEM images or deduced from electrical measurements. Optical and electronic simulations provide insights into the main absorption and electrical losses, and guidelines to design and fabricate higher-efficiency devices. It suggests that improvements at the n-type contact (GaInP/ITO) are key to unlocking the potential of next generation NW solar cells.

Self-catalyzed InAs nanowires grown on Si: the key role of kinetics on their morphology

Integrating self-catalyzed InAs nanowires on Si(111) is an important step toward building vertical gate-all-around transistors. The complementary metal oxide semiconductor (CMOS) compatibility and the nanowire aspect ratio are two crucial parameters to consider. In this work, we optimize the InAs nanowire morphology by changing the growth mode from Vapor-Solid to Vapor-Liquid-Solid in a CMOS compatible process. We study the key role of the Hydrogen surface preparation on nanowire growths and bound it to a change of the chemical potential and adatoms diffusion length on the substrate. We transfer the optimized process to patterned wafers and adapt both the surface preparation and the growth conditions. Once group III and V fluxes are balances, aspect ratio can be improved by increasing the system kinetics. Overall, we propose a method for large scale integration of CMOS compatible InAs nanowire on silicon and highlight the major role of kinetics on the growth mechanism.

Polarization Control in Integrated Silicon Waveguides Using Semiconductor Nanowires

In this work, we show the design of a silicon photonic-based polarization converting device based on the integration of semiconduction InP nanowires on the silicon photonic platform. We present a comprehensive numerical analysis showing that full polarization conversion (from quasi-TE modes to quasi-TM modes, and vice versa) can be achieved in devices exhibiting small footprints (total device lengths below 20 µm) with minimal power loss (<2 dB). The approach described in this work can pave the way to the realization of complex and re-configurable photonic processors based on the manipulation of the state of polarization of guided light beams.

GaAs nanowires on Si nanopillars: towards large scale, phase-engineered arrays

Large-scale patterning for vapor-liquid-solid growth of III-V nanowires is a challenge given the required feature size for patterning (45 to 60 nm holes). In fact, arrays are traditionally manufactured using electron-beam lithography,for which processing times increase greatly when expanding the exposure area. In order to bring nanowire arrays one step closer to the wafer-scale we take a different approach and replace patterned nanoscale holes with Si nanopillar arrays. The method is compatible with photolithography methods such as phase-shift lithography or deep ultraviolet (DUV) stepper lithography. We provide clear evidence on the advantage of using nanopillars as opposed to nanoscale holes both for the control on the growth mechanisms and for the scalability. We identify the engineering of the contact angle as the key parameter to optimize the yield. In particular, we demonstrate how nanopillar oxidation is key to stabilize the Ga catalyst droplet and engineer the contact angle. We demonstrate how the position of the triple phase line at the SiO₂/Si as opposed to the SiO₂/vacuum interface is central for a successful growth. We compare our experiments with simulations performed in surface evolver™ and observe a strong correlation. Large-scale arrays using phase-shift lithography result in a maximum local vertical yield of 67% and a global chip-scale yield of 40%. We believe that, through a greater control over key processing steps typically achieved in a semiconductor fab it is possible to push this yield to 90+% and open perspectives for deterministic nanowire phase engineering at the wafer-scale.

Surface Nano-Patterning for the Bottom-Up Growth of III-V Semiconductor Nanowire Ordered Arrays

Ordered arrays of vertically aligned semiconductor nanowires are regarded as promising candidates for the realization of all-dielectric metamaterials, artificial electromagnetic materials, whose properties can be engineered to enable new functions and enhanced device performances with respect to naturally existing materials. In this review we account for the recent progresses in substrate nanopatterning methods, strategies and approaches that overall constitute the preliminary step towards the bottom-up growth of arrays of vertically aligned semiconductor nanowires with a controlled location, size and morphology of each nanowire. While we focus specifically on III-V semiconductor nanowires, several concepts, mechanisms and conclusions reported in the manuscript can be invoked and are valid also for different nanowire materials.

Semiconductor nanowire arrays for optical sensing: a numerical insight on the impact of array periodicity and density

Recent advances in the nanofabrication and modeling of metasurfaces have shown the potential of these systems in providing unprecedented control over light-matter interactions at the nanoscale, enabling immediate and tangible improvement of features and specifications of photonic devices that are becoming always more crucial in enhancing everyday life quality. In this work, we theoretically demonstrate that metasurfaces made of periodic and non-periodic deterministic assemblies of vertically aligned semiconductor nanowires can be engineered to display a tailored effective optical response and provide a suitable route to realize advanced systems with controlled photonic properties particularly interesting for sensing applications. The metasurfaces investigated in this paper correspond to nanowire arrays that can be experimentally realized exploiting nanolithography and bottom-up nanowire growth methods: the combination of these techniques allow to finely control the position and the physical properties of each individual nanowire in complex arrays. By resorting to numerical simulations, we address the near- and far-field behavior of a nanowire ensemble and we show that the controlled design and arrangement of the nanowires on the substrate may introduce unprecedented oscillations of light reflectance, yielding a metasurface which displays an electromagnetic behavior with great potential for sensing. Finite-difference time-domain numerical simulations are carried out to tailor the nanostructure parameters and systematically engineer the optical response in the VIS-NIR spectral range. By exploiting our computational-methods we set-up a complete procedure to design and test metasurfaces able to behave as functional sensors. These results are especially encouraging in the perspective of developing arrays of epitaxially grown semiconductor nanowires, where the suggested design can be easily implemented during the nanostructure growth, opening the way to fully engineered nanowire-based optical metamaterials.

Improving the yield of GaAs nanowires on silicon by Ga pre-deposition

GaAs nanowire (NW) arrays were grown by molecular beam epitaxy using the self-assisted vapor-liquid-solid method with Ga droplets as seed particles. A Ga pre-deposition step is examined to control NW yield and diameter. The NW yield can be increased with suitable duration of a Ga pre-deposition step but is highly dependent on oxide hole diameter and surface conditions. The NW diameter was determined by vapor-solid growth on the NW sidewalls, rather than Ga pre-deposition. The maximum NW yield with a Ga pre-deposition step was very close to 100%, established at shorter Ga deposition durations and for larger holes. This trend was explained within a model where maximum yield is obtained when the Ga droplet volume approximately equals the hole volume.

Thermodynamics Controlled Sharp Transformation from InP to GaP Nanowires via Introducing Trace Amount of Gallium

Growth of high-quality III-V nanowires at a low cost for optoelectronic and electronic applications is a long-term pursuit of research. Still, controlled synthesis of III-V nanowires using chemical vapor deposition method is challenge and lack theory guidance. Here, we show the growth of InP and GaP nanowires in a large area with a high density using a vacuum chemical vapor deposition method. It is revealed that high growth temperature is required to avoid oxide formation and increase the crystal purity of InP nanowires. Introduction of a small amount of Ga into the reactor leads to the formation of GaP nanowires instead of ternary InGaP nanowires. Thermodynamic calculation within the calculation of phase diagrams (CALPHAD) approach is applied to explain this novel growth phenomenon. Composition and driving force calculations of the solidification process demonstrate that only 1 at.% of Ga in the catalyst is enough to tune the nanowire formation from InP to GaP, since GaP nucleation shows a much larger driving force. The combined thermodynamic studies together with III-V nanowire growth studies provide an excellent example to guide the nanowire growth.

Photonic-plasmonic mode coupling in nanopillar Ge-on-Si PIN photodiodes

Incorporating group IV photonic nanostructures within active top-illuminated photonic devices often requires light-transmissive contact schemes. In this context, plasmonic nanoapertures in metallic films can not only be realized using CMOS compatible metals and processes, they can also serve to influence the wavelength-dependent device responsivities. Here, we investigate crescent-shaped nanoapertures in close proximity to Ge-on-Si PIN nanopillar photodetectors both in simulation and experiment. In our geometries, the absorption within the devices is mainly shaped by the absorption characteristics of the vertical semiconductor nanopillar structures (leaky waveguide modes). The plasmonic resonances can be used to influence how incident light couples into the leaky modes within the nanopillars. Our results can serve as a starting point to selectively tune our device geometries for applications in spectroscopy or refractive index sensing.

Study of patterned GaAsSbN nanowires using sigmoidal model

This study presents the first report on patterned nanowires (NWs) of dilute nitride GaAsSbN on p-Si (111) substrates by self-catalyzed plasma-assisted molecular beam epitaxy. Patterned NW array with GaAsSbN of Sb composition of 3% as a stem provided the best yield of vertical NWs. Large bandgap tuning of ~ 75 meV, as ascertained from 4 K photoluminescence (PL), over a pitch length variation of 200-1200 nm has been demonstrated. Pitch-dependent axial and radial growth rates show a logistic sigmoidal growth trend different from those commonly observed in other patterned non-nitride III-V NWs. The sigmoidal fitting provides further insight into the PL spectral shift arising from differences in Sb and N incorporation from pitch induced variation in secondary fluxes. Results indicate that sigmoidal fitting can be a potent tool for designing patterned NW arrays of optimal pitch length for dilute nitrides and other highly mismatched alloys and heterostructures.

Monolithic integration of InP on Si by molten alloy driven selective area epitaxial growth

We report a new approach for monolithic integration of III-V materials into silicon, based on selective area growth and driven by a molten alloy in metal-organic vapor epitaxy. Our method includes elements of both selective area and droplet-mediated growths and combines the advantages of the two techniques. Using this approach, we obtain organized arrays of high crystalline quality InP insertions into (100) oriented Si substrates. Our detailed structural, morphological and optical studies reveal the conditions leading to defect formation. These conditions are then eliminated to optimize the process for obtaining dislocation-free InP nanostructures grown directly on Si and buried below the top surface. The PL signal from these structures exhibits a narrow peak at the InP bandgap energy. The fundamental aspects of the growth are studied by modeling the InP nucleation process. The model is fitted by our X-ray diffraction measurements and correlates well with the results of our transmission electron microscopy and optical investigations. Our method constitutes a new approach for the monolithic integration of active III-V materials into Si platforms and opens up new opportunities in active Si photonics.

Characteristics of silicon nanowire solar cells with a crescent nanohole

In recent years, newly emerging photovoltaic (PV) devices based on silicon nanowire solar cells (SiNW-SCs) have attracted considerable research attention. This is due to their efficient light-trapping capability and large carrier transportation and collection with compact size. However, there is a strong desire to find effective strategies to provide high and wideband optical absorption. In this paper, a modified circular nanowire (NW) with a nanocrescent hole is newly introduced and analyzed for solar cell applications. The crescent hole can strongly improve the light absorption through the NW due to the excitation of numbers of modes that can be coupled with the incident light. The material index, volume, and position of the nanohole are studied to significantly increase the optical absorption efficiency and hence the power conversion efficiency (PCE). The absorption performance can be further preserved by using a silicon substrate due to the coupling between the supported modes by the NW, and that of the substrate. The optical and electrical characteristics of the suggested design are investigated using finite difference time domain and finite element methods via Lumerical software packages. The reported asymmetric design offers higher optical and electrical efficiencies compared to the conventional NW counterpart. The proposed NW offers a short circuit current density (J_sc) of 33.85 (34.35) mA/cm² and power conversion efficiency (PCE) of 16.78 (17.05) % with an enhancement of 16.3 (16.8) % and 17.3 (18.4) % for transverse magnetic (TM) and transverse electric (TE) polarizations, respectively, compared to the conventional cylindrical counterpart.

Stable and high yield growth of GaP and In0.2Ga0.8As nanowire arrays using In as a catalyst

We report the first investigation of indium (In) as the vapor-liquid-solid catalyst of GaP and InGaAs nanowires by molecular beam epitaxy. A strong asymmetry in the Ga distribution between the liquid and solid phases allows one to obtain pure GaP and In0.2Ga0.8As nanowires while the liquid catalyst remains nearly pure In. This uncommon In catalyst presents several advantages. First, the nanowire morphology can be tuned by changing the In flux alone, independently of the Ga and group V fluxes. Second, the nanowire crystal structure always remains cubic during steady state growth and catalyst crystallization, despite the low contact angle of the liquid droplet measured after growth (95°). Third, the vertical yield of In-catalyzed GaP and (InGa)As nanowire arrays on patterned silicon substrates increases dramatically. Combining straight sidewalls, controllable morphologies and a high vertical yield, In-catalysts provide an alternative to the standard Au or Ga alloys for the bottom-up growth of large scale homogeneous arrays of (InGa)As or GaP nanowires.

Engineering III-V Semiconductor Nanowires for Device Applications

III-V semiconductor nanowires offer potential new device applications because of the unique properties associated with their 1D geometry and the ability to create quantum wells and other heterostructures with a radial and an axial geometry. Here, an overview of challenges in the bottom-up approaches for nanowire synthesis using catalyst and catalyst-free methods and the growth of axial and radial heterostructures is given. The work on nanowire devices such as lasers, light emitting nanowires, and solar cells and an overview of the top-down approaches for water splitting technologies is reviewed. The authors conclude with an analysis of the research field and the future research directions.

Controllable Growth of High-Quality Inorganic Perovskite Microplate Arrays for Functional Optoelectronics

Inorganic perovskite single crystals have emerged as promising vapor-phase processable structures for optoelectronic devices. However, because of material lattice mismatch and uncontrolled nucleation, vapor-phase methods have been restricted to random distribution of single crystals that are difficult to perform for integrated device arrays. Herein, an effective strategy to control the vapor-phase growth of high-quality cesium lead bromide perovskite (CsPbBr₃ ) microplate arrays with uniform morphology as well as controlled location and size is reported. By introducing perovskite seeds on substrates, intractable lattice mismatches and random nucleation barriers are surpassed, and the epitaxial growth of perovskite crystals is accurately controlled. It is further demonstrated that CsPbBr₃ microplate arrays can be monolithically integrated on substrates for the fabrication of high-performance lasers and photodetectors. This strategy provides a facile approach to fabricate high-quality CsPbBr₃ microplates with controllable size and location, which offers new opportunities for the scalable production of integrated optoelectronic devices.

GaAs nanoscale membranes: prospects for seamless integration of III-Vs on silicon

The growth of compound semiconductors on silicon has been widely sought after for decades, but reliable methods for defect-free combination of these materials have remained elusive. Recently, interconnected GaAs nanoscale membranes have been used as templates for the scalable integration of nanowire networks on III-V substrates. Here, we demonstrate how GaAs nanoscale membranes can be seamlessly integrated on silicon by controlling the density of nuclei in the initial stages of growth. We also correlate the absence or presence of defects with the existence of a single or multiple nucleation regime for the single membranes. Certain defects exhibit well-differentiated spectroscopic features that we identify with cathodoluminescence and micro-photoluminescence techniques. Overall, this work presents a new approach for the seamless integration of compound semiconductors on silicon.

Impact of the Ga flux incidence angle on the growth kinetics of self-assisted GaAs nanowires on Si(111)

In this work we show that the incidence angle of group-III element fluxes plays a significant role in the diffusion-controlled growth of III-V nanowires (NWs) by molecular beam epitaxy (MBE). We present a thorough experimental study on the self-assisted growth of GaAs NWs by using a MBE reactor equipped with two Ga cells located at different incidence angles with respect to the surface normal of the substrate, so as to ascertain the impact of such a parameter on the NW growth kinetics. The as-obtained results show a dramatic influence of the Ga flux incidence angle on the NW length and diameter, as well as on the shape and size of the Ga droplets acting as catalysts. In order to interpret the results we developed a semi-empirical analytical model inspired by those already developed for MBE-grown Au-catalyzed GaAs NWs. Numerical simulations performed with the model allow us to reproduce thoroughly the experimental results (in terms of NW length and diameter and of droplet size and wetting angle), putting in evidence that under formally the same experimental conditions the incidence angle of the Ga flux is a key parameter which can drastically affect the growth kinetics of the NWs grown by MBE.

Ultrahigh Hole Mobility of Sn-Catalyzed GaSb Nanowires for High Speed Infrared Photodetectors

Owing to the relatively low hole mobility, the development of GaSb nanowire (NW) electronic and photoelectronic devices has stagnated in the past decade. During a typical catalyst-assisted chemical vapor deposition (CVD) process, the adopted metallic catalyst can be incorporated into the NW body to act as a slight dopant, thus regulating the electrical properties of the NW. In this work, we demonstrate the use of Sn as a catalyst and dopant for GaSb NWs in the surfactant-assisted CVD growth process. The Sn-catalyzed zinc-blende GaSb NWs are thin, long, and straight with good crystallinity, resulting in a record peak hole mobility of 1028 cm² V^-1 s^-1. This high mobility is attributed to the slight doping of Sn atoms from the catalyst tip into the NW body, which is verified by the red-shifted photoluminescence peak of Sn-catalyzed GaSb NWs (0.69 eV) compared with that of Au-catalyzed NWs (0.74 eV). Furthermore, the parallel array NWs also show a high peak hole mobility of 170 cm² V^-1 s^-1, a high responsivity of 61 A W^-1, and fast rise and decay times of 195.1 and 380.4 μs, respectively, under the illumination of 1550 nm infrared light. All of the results demonstrate that the as-prepared Sn-catalyzed GaSb NWs are promising for application in next-generation electronics and optoelectronics.

Growth Dynamics of Gallium Nanodroplets Driven by Thermally Activated Surface Diffusion

The growth of catalytic liquid-metal nanodroplets on flat substrates is essential for many technological applications. However, the detailed nucleation and growth dynamics of these nanodroplets remain unclear. Here, using in situ transmission electron microscopy (TEM) imaging, we track in real time the growth of individual Ga nanodroplets from a beam of Ga vapor. We show that the nucleation and growth are driven by thermally activated surface diffusion of Ga adatoms, with the diffusion activation energy of E_D = 95 ± 10 meV on a SiN_x surface. More importantly, our analysis shows that Ga dimers serve as the critical nucleation clusters and that the nanodroplet growth follows a power-law of the form R(t) ∝ e^-E_D/k_BT(t - t₀)^1/2. These insights into the growth dynamics of metallic nanodroplets are essential for tailoring their size and density for their application in self-catalyzed growth of nanomaterials.

Synthesis and Applications of III-V Nanowires

Low-dimensional semiconductor materials structures, where nanowires are needle-like one-dimensional examples, have developed into one of the most intensely studied fields of science and technology. The subarea described in this review is compound semiconductor nanowires, with the materials covered limited to III-V materials (like GaAs, InAs, GaP, InP,...) and III-nitride materials (GaN, InGaN, AlGaN,...). We review the way in which several innovative synthesis methods constitute the basis for the realization of highly controlled nanowires, and we combine this perspective with one of how the different families of nanowires can contribute to applications. One reason for the very intense research in this field is motivated by what they can offer to main-stream semiconductors, by which ultrahigh performing electronic (e.g., transistors) and photonic (e.g., photovoltaics, photodetectors or LEDs) technologies can be merged with silicon and CMOS. Other important aspects, also covered in the review, deals with synthesis methods that can lead to dramatic reduction of cost of fabrication and opportunities for up-scaling to mass production methods.

Vapor Phase Growth of Semiconductor Nanowires: Key Developments and Open Questions

Nanowires are filamentary crystals with a tailored diameter that can be obtained using a plethora of different synthesis techniques. In this review, we focus on the vapor phase, highlighting the most influential achievements along with a historical perspective. Starting with the discovery of VLS, we feature the variety of structures and materials that can be synthesized in the nanowire form. We then move on to establish distinct features such as the three-dimensional heterostructure/doping design and polytypism. We summarize the status quo of the growth mechanisms, recently confirmed by in situ electron microscopy experiments and defining common ground between the different synthesis techniques. We then propose a selection of remaining defects, starting from what we know and going toward what is still to be learned. We believe this review will serve as a reference for neophytes but also as an insight for experts in an effort to bring open questions under a new light.