Application of three-dimensionally area-selective atomic layer deposition for selectively coating the vertical surfaces of standing nanopillars

Self-Formation of a Ru/ZnO Multifunctional Bilayer for the Next-Generation Interconnect Technology via Area-Selective Atomic Layer Deposition

This study suggests a Ru/ZnO bilayer grown using area-selective atomic layer deposition (AS-ALD) as a multifunctional layer for advanced Cu metallization. As a diffusion barrier and glue layer, ZnO is selectively grown on SiO2 , excluding Cu, where Ru, as a liner and seed layer, is grown on both surfaces. Dodecanethiol (DDT) is used as an inhibitor for the AS-ALD of ZnO using diethylzinc and H2 O at 120 °C. H2 plasma treatment removes the DDT adsorbed on Cu, forming inhibitor-free surfaces. The ALD-Ru film is then successfully deposited at 220 °C using tricarbonyl(trimethylenemethane)ruthenium and O2 . The Cu/bilayer/Si structural and electrical properties are investigated to determine the diffusion barrier performance of the bilayer film. Copper silicide is not formed without the conductivity degradation of the Cu/bilayer/Si structure, even after annealing at 700 °C. The effect of ZnO on the Ru/SiO2 structure interfacial adhesion energy is investigated using a double-cantilever-beam test and is found to increase with ZnO between Ru and SiO2 . Consequently, the Ru/ZnO bilayer can be a multifunctional layer for advanced Cu interconnects. Additionally, the formation of a bottomless barrier by eliminating ZnO on the via bottom, or Cu, is expected to decrease the via resistance for the ever-shrinking Cu lines.

Site-Selective Chemical Vapor Deposition on Direct-Write 3D Nanoarchitectures

Recent advancements in additive manufacturing have enabled the preparation of free-shaped 3D objects with feature sizes down to and below the micrometer scale. Among the fabrication methods, focused electron beam- and focused ion beam-induced deposition (FEBID and FIBID, respectively) associate a high flexibility and unmatched accuracy in 3D writing with a wide material portfolio, thereby allowing for the growth of metallic to insulating materials. The combination of the free-shaped 3D nanowriting with established chemical vapor deposition (CVD) techniques provides attractive opportunities to synthesize complex 3D core-shell heterostructures. Hence, this hybrid approach enables the fabrication of morphologically tunable layer-based nanostructures with the great potential of unlocking further functionalities. Here, the fundamentals of such a hybrid approach are demonstrated by preparing core-shell heterostructures using 3D FEBID scaffolds for site-selective CVD. In particular, 3D microbridges are printed by FEBID with the (CH₃)₃CH₃C₅H₄Pt precursor and coated by thermal CVD using the Nb(NMe₂)₃(N-t-Bu) and HFeCo₃(CO)₁₂ precursors. Two model systems on the basis of CVD layers consisting of a superconducting NbC-based layer and a ferromagnetic Co₃Fe layer are prepared and characterized with regard to their composition, microstructure, and magneto-transport properties.

Using Ultrathin Parylene Films as an Organic Gate Insulator in Nanowire Field-Effect Transistors

We report the development of nanowire field-effect transistors featuring an ultrathin parylene film as a polymer gate insulator. The room temperature, gas-phase deposition of parylene is an attractive alternative to oxide insulators prepared at high temperatures using atomic layer deposition. We discuss our custom-built parylene deposition system, which is designed for reliable and controlled deposition of <100 nm thick parylene films on III-V nanowires standing vertically on a growth substrate or horizontally on a device substrate. The former case gives conformally coated nanowires, which we used to produce functional Ω-gate and gate-all-around structures. These give subthreshold swings as low as 140 mV/dec and on/off ratios exceeding 10³ at room temperature. For the gate-all-around structure, we developed a novel fabrication strategy that overcomes some of the limitations with previous lateral wrap-gate nanowire transistors. Finally, we show that parylene can be deposited over chemically treated nanowire surfaces, a feature generally not possible with oxides produced by atomic layer deposition due to the surface "self-cleaning" effect. Our results highlight the potential for parylene as an alternative ultrathin insulator in nanoscale electronic devices more broadly, with potential applications extending into nanobioelectronics due to parylene's well-established biocompatible properties.

Selective Deposition of Dielectrics: Limits and Advantages of Alkanethiol Blocking Agents on Metal-Dielectric Patterns

Area selective atomic layer deposition has the potential to significantly improve current fabrication approaches by introducing a bottom-up process in which robust and conformal thin films are selectively deposited onto patterned substrates. In this paper, we demonstrate selective deposition of dielectrics on metal/dielectric patterns by protecting metal surfaces using alkanethiol blocking layers. We examine alkanethiol self-assembled monolayers (SAMs) with two different chain lengths deposited both in vapor and in solution and show that in both systems, thiols have the ability to block surfaces against dielectric deposition. We show that thiol molecules can displace Cu oxide, opening possibilities for easier sample preparation. A vapor-deposited alkanethiol SAM is shown to be more effective than a solution-deposited SAM in blocking ALD, even after only 30 s of exposure. The vapor deposition also results in a much better thiol regeneration process and may facilitate deposition of the SAMs on porous or three-dimensional structures, allowing for the fabrication of next generation electronic devices.

A synergetic application of surface plasmon and field effect to improve Si solar cell performance

We report a synergetic application of surface plasmon (SP) and field effect (FE) to improve crystalline Si solar cell performance. The SPs are supported by small-sized Ag nanoparticles with an average diameter of 36.7 nm. The localized SP electromagnetic field from Ag nanoparticles excites extra electron-hole pairs at the surface region of the Si solar cell emitter, and meanwhile, the electron-hole pairs are detached by the electrostatic field that crosses the emitter surface. This synergism of SP and FE produces extra charges and enhances the Si solar cell efficiency. As compared to a Si solar cell applying SP and FE independently, a more than 10% efficiency enhancement is achieved by using them synergistically.

Area-Selective Atomic Layer Deposition: Conformal Coating, Subnanometer Thickness Control, and Smart Positioning

Transistors have already been made three-dimensional (3D), with device channels (i.e., fins in trigate field-effect transistor (FinFET) technology) that are taller, thinner, and closer together in order to enhance device performance and lower active power consumption. As device scaling continues, these transistors will require more advanced, fabrication-enabling technologies for the conformal deposition of high-κ dielectric layers on their 3D channels with accurate position alignment and thickness control down to the subnanometer scale. Among many competing techniques, area-selective atomic layer deposition (AS-ALD) is a promising method that is well suited to the requirements without the use of complicated, complementary metal-oxide semiconductor (CMOS)-incompatible processes. However, further progress is limited by poor area selectivity for thicker films formed via a higher number of ALD cycles as well as the prolonged processing time. In this issue of ACS Nano, Professor Stacy Bent and her research group demonstrate a straightforward self-correcting ALD approach, combining selective deposition with a postprocess mild chemical etching, which enables selective deposition of dielectric films with thicknesses and processing times at least 10 times larger and 48 times shorter, respectively, than those obtained by conventional AS-ALD processes. These advances present an important technological breakthrough that may drive the AS-ALD technique a step closer toward industrial applications in electronics, catalysis, and photonics, etc. where more efficient device fabrication processes are needed.