A Review on 1-D Nanomaterials: Scaling-Up with Gas-Phase Synthesis

Nanowire-like materials exhibit distinctive properties comprising optical polarisation, waveguiding, and hydrophobic channelling, amongst many other useful phenomena. Such 1-D derived anisotropy can be further enhanced by arranging many similar nanowires into a coherent matrix, known as an array superstructure. Manufacture of nanowire arrays can be scaled-up considerably through judicious use of gas-phase methods. Historically, the gas-phase approach however has been extensively used for the bulk and rapid synthesis of isotropic 0-D nanomaterials such as carbon black and silica. The primary goal of this review is to document recent developments, applications, and capabilities in gas-phase synthesis methods of nanowire arrays. Secondly, we elucidate the design and use of the gas-phase synthesis approach; and finally, remaining challenges and needs are addressed to advance this field.

Synthesis of Metal-Capped Semiconductor Nanowires from Heterodimer Nanoparticle Catalysts

Semiconductor nanowires (NWs) capped with metal nanoparticles (NPs) show multifunctional and synergistic properties, which are important for applications in the fields of catalysis, photonics, and electronics. Conventional colloidal syntheses of this class of hybrid structures require complex sequential seeded growth, where each section requires its own set of growth conditions, and methods for preparing such wires are not universal. Here, we report a new and general method for synthesizing metal-semiconductor nanohybrids based on particle catalysts, prepared by scanning probe block copolymer lithography, and chemical vapor deposition. In this process, metallic heterodimer NPs were used as catalysts for NW growth to form semiconductor NWs capped with metallic particles (Au, Ag, Co, Ni). Interestingly, the growth processes for NWs on NPs are regioselective and controlled by the chemical composition of the metallic heterodimer used. Using a systematic experimental approach, paired with density functional theory calculations, we were able to postulate three different growth modes, one without precedent.

High-performance printed electronics based on inorganic semiconducting nano to chip scale structures

The Printed Electronics (PE) is expected to revolutionise the way electronics will be manufactured in the future. Building on the achievements of the traditional printing industry, and the recent advances in flexible electronics and digital technologies, PE may even substitute the conventional silicon-based electronics if the performance of printed devices and circuits can be at par with silicon-based devices. In this regard, the inorganic semiconducting materials-based approaches have opened new avenues as printed nano (e.g. nanowires (NWs), nanoribbons (NRs) etc.), micro (e.g. microwires (MWs)) and chip (e.g. ultra-thin chips (UTCs)) scale structures from these materials have been shown to have performances at par with silicon-based electronics. This paper reviews the developments related to inorganic semiconducting materials based high-performance large area PE, particularly using the two routes i.e. Contact Printing (CP) and Transfer Printing (TP). The detailed survey of these technologies for large area PE onto various unconventional substrates (e.g. plastic, paper etc.) is presented along with some examples of electronic devices and circuit developed with printed NWs, NRs and UTCs. Finally, we discuss the opportunities offered by PE, and the technical challenges and viable solutions for the integration of inorganic functional materials into large areas, 3D layouts for high throughput, and industrial-scale manufacturing using printing technologies.

Ultralow Dissipation Patterned Silicon Nanowire Arrays for Scanning Probe Microscopy

In recent years, self-assembled semiconductor nanowires have been successfully used as ultrasensitive cantilevers in a number of unique scanning probe microscopy (SPM) settings. We describe the fabrication of ultralow dissipation patterned silicon nanowire (SiNW) arrays optimized for scanning probe applications. Our fabrication process produces ultrahigh aspect ratio vertical SiNWs that exhibit exceptional force sensitivity. The highest sensitivity SiNWs have thermomechanical noise-limited force sensitivity of [Formula: see text] at room temperature and [Formula: see text] at 4 K. To facilitate their use in SPM, the SiNWs are patterned within 7 μm from the edge of the substrate, allowing convenient optical access for displacement detection.

Recent advances in Sb-based III-V nanowires

Owing to the high mobility, narrow bandgap, strong spin-orbit coupling and large g-factor, Sb-based III-V nanowires (NWs) attracted significant interests in high speed electronics, long-wavelength photodetectors and quantum superconductivity in the past decade. In this review, we aim to give an integrated summarization about the recent advances in binary as well as ternary Sb-based III-V NWs, starting from the fundamental properties, NWs growth mechanism, typical synthetic methods to their applications in transistors, photodetectors, and Majorana fermions detection. Up to now, famous NWs growth techniques of solid-source chemical vapor deposition (CVD), molecular beam epitaxy, metal organic vapor phase epitaxy and metal organic CVD etc have been adopted and developed for the controllable growth of Sb-based III-V NWs. Several parameters including heating temperature, III/V ratio of source materials, growth temperature, catalyst size and kinds, and growth substrate play important roles on the morphology, position, diameter distribution, growth orientation and crystal phase of Sb-based III-V NWs. Furthermore, we discuss the photoelectrical applications of Sb-based III-V NWs such as field-effect-transistors, tunnel diode, low-power inverter, and infrared detectors etc. Importantly, due to the strongest spin-orbit interaction and giant g-factor among all III-V semiconductors, InSb with the geometry of one-dimension NW is considered as the most promising candidate for the detection of Majorana fermions. In the end, we also summarize the main challenges remaining in the field and put forward some suggestions for the future development of Sb-based III-V NWs.

Rational design of nanowire solar cells: from single nanowire to nanowire arrays

In this review, we report several rational designs of nanowire-based solar cells from single nanowire to nanowire arrays. Two methods of nanowires fabrication: via 'top-down' and 'bottom-up', and two types of configurations including axial and radial junction are presented for nanowire-based solar cells. To enhance absorption, several photon management schemes are shown in detail, including anti-reflection coating, diffractive grating, and plasmonics. Considering the rational design of nanowire arrays, we summarize a total of seven solar cell structures including axial junctions, radial junctions, substrate interfacial junctions, planar junctions, conductors, junctionless and tandem. Each type is supported by examples which are presented and discussed. Finally, a general comparison between bulk and nanowire solar cell efficiencies is given.

Nanowire morphology and particle phase control by tuning the In concentration of the foreign metal nanoparticle

Controllable particle assisted growth (PAG) of III-V nanowires is today almost exclusively done with Au, Ga or In nanoparticles, whereas other metals often yield nanowires with uncontrolled growth directions. To improve the control of the initial growth direction in PAG, independent of choice of metal, we propose to initiate nanowire growth from a group-III-rich foreign metal particle. For III-V nanowire growth, the group III concentration of the particle can be made to increase or decrease with the relative supply of group III and group V material, which can be used to promote the liquid phase that is necessary for vapor-liquid-solid growth. In this paper, 30 nm Pd nanoparticles are used to develop growth conditions for In-rich PAG of InAs nanowires. The particle size evolution for different growth times and V/III ratios is correlated with changes in nanowire density and morphology. In addition, we demonstrate In-rich Co, Pd, Pt and Rh nanoparticles and optimized In-rich PAG from Au and Pd seeds. The Au and Pd seeded nanowires are remarkably similar and by tuning the particle composition we trigger a morphological change. The vertical nanowire morphology is associated with In-rich nanoparticles that contain a liquid phase. The curly nanowire morphology, with random growth directions have an In concentration less than or equal to that of the most In rich compound of the seed metal-In system.

Nonpolar-Oriented Wurtzite InP Nanowires with Electron Mobility Approaching the Theoretical Limit

As an important semiconductor nanomaterial, InP nanowires (NWs) grown with a typical vapor-liquid-solid mechanism are still restricted from their low electron mobility for practical applications. Here, nonpolar-oriented defect-free wurtzite InP NWs with electron mobility of as high as 2000 cm² V^-1 s^-1 can be successfully synthesized via Pd-catalyzed vapor-solid-solid growth. Specifically, PdIn catalyst particles are involved and found to expose their PdIn{210} planes at the InP nucleation frontier due to their minimal lattice mismatch with nonpolar InP{2̅110} and {1̅100} planes. This appropriate lattice registration would then minimize the overall free energy and enable the highly crystalline InP NW growth epitaxially along the nonpolar directions. Because of the minimized crystal defects, the record-high electron mobility of InP NWs ( i.e., 2000 cm² V^-1 s^-1 at an electron concentration of 10¹⁷ cm^-3) results, being close to the theoretical limit of their bulk counterparts. Furthermore, once the top-gated device geometry is employed, the device subthreshold slopes can be impressively reduced down to 91 mV dec^-1 at room temperature. In addition, these NWs exhibit a high photoresponsivity of 10⁴ A W^-1 with fast rise and decay times of 0.89 and 0.82 s, respectively, in photodetection. All these results evidently demonstrate the promise of nonpolar-oriented InP NWs for next-generation electronics and optoelectronics.

Solution-based low-temperature synthesis of germanium nanorods and nanowires

ABSTRACT

The Ga-assisted formation of Ge nanorods and nanowires in solution has been demonstrated and a catalytic activity of the Ga seeds was observed. The synthesis of anisotropic single-crystalline Ge nanostructures was achieved at temperatures as low as 170 °C. Gallium not only serves as nucleation seed but is also incorporated in the Ge nanowires in higher concentrations than its thermodynamic solubility limit.

GRAPHICAL ABSTRACT

Direct Synthesis of Hyperdoped Germanium Nanowires

A low-temperature chemical vapor growth of Ge nanowires using Ga as seed material is demonstrated. The structural and chemical analysis reveals the homogeneous incorporation of ∼3.5 at. % Ga in the Ge nanowires. The Ga-containing Ge nanowires behave like metallic conductors with a resistivity of about ∼300 μΩcm due to Ga hyperdoping with electronic contributions of one-third of the incorporated Ga atoms. This is the highest conduction value observed by in situ doping of group IV nanowires reported to date. This work demonstrates that Ga is both an efficient seed material at low temperatures for Ge nanowire growth and an effective dopant changing the semiconductor into a metal-like conductor.

Reaction intermediate-induced vapor–liquid–solid growth of silicon oxide nanowires

Jellyfish-like SiO_x nanowires were formed in a reaction intermediate-induced vapor–liquid–solid process, which provides a new method for nanowire growth.

Complementary Metal Oxide Semiconductor-Compatible, High-Mobility, ⟨111⟩-Oriented GaSb Nanowires Enabled by Vapor-Solid-Solid Chemical Vapor Deposition

Using CMOS-compatible Pd catalysts, we demonstrated the formation of high-mobility ⟨111⟩-oriented GaSb nanowires (NWs) via vapor-solid-solid (VSS) growth by surfactant-assisted chemical vapor deposition through a complementary experimental and theoretical approach. In contrast to NWs formed by the conventional vapor-liquid-solid (VLS) mechanism, cylindrical-shaped Pd₅Ga₄ catalytic seeds were present in our Pd-catalyzed VSS-NWs. As solid catalysts, stoichiometric Pd₅Ga₄ was found to have the lowest crystal surface energy and thus giving rise to a minimal surface diffusion as well as an optimal in-plane interface orientation at the seed/NW interface for efficient epitaxial NW nucleation. These VSS characteristics led to the growth of slender NWs with diameters down to 26.9 ± 3.5 nm. Over 95% high crystalline quality NWs were grown in ⟨111⟩ orientation for a wide diameter range of between 10 and 70 nm. Back-gated field-effect transistors (FETs) fabricated using the Pd-catalyzed GaSb NWs exhibit a superior peak hole mobility of ∼330 cm² V^-1 s^-1, close to the mobility limit for a NW channel diameter of ∼30 nm with a free carrier concentration of ∼10¹⁸ cm^-3. This suggests that the NWs have excellent homogeneity in phase purity, growth orientation, surface morphology and electrical characteristics. Contact printing process was also used to fabricate large-scale assembly of Pd-catalyzed GaSb NW parallel arrays, confirming the potential constructions and applications of these high-performance electronic devices.

Switching of the products by changing the size and shape of catalytic nanoparticles during CVD growth of MoS2 nanotubes

MoS₂ nanotubes are grown by CVD with FeO catalyst nanoparticles, which competes with the formation of SiO₂ nanowires.

New growth modes of molybdenum oxide layered 1D structures using alternative catalysts: transverse mode vs. axial mode

Both transverse and axial growth modes were discovered in the CVD synthesis of molybdenum oxide (MoO₃) 1D structures using alkali metal based catalysts. A modified vapor–solid–solid (VSS) mechanism was proposed.

Review on nanomaterials synthesized by vapor transport method: growth and their related applications

Nanostructures with different dimensions, including bulk crystals, thin films, nanowires, nanobelts and nanorods, have received considerable attention due to their novel functionalities and outstanding applications in various areas.

Directly grown Si nanowire arrays on Cu foam with a coral-like surface for lithium-ion batteries

In order to mitigate the drastic volumetric expansion (>300%) of silicon (Si) during the lithiation process, we demonstrate the synthesis of novel Si nanowire arrays (n-SNWAs) with a coral-like surface on Cu foam via a one-step CVD method, in which the Cu foam can simultaneously act as a catalyst and current collector. The unique coral-like surface endows n-SNWAs with a high structural integrity, which is beneficial for enhancing their electrochemical performance. In addition, the as-prepared n-SNWAs on Cu foam can be directly applied as the anode for lithium-ion batteries (LIBs), exhibiting a very high reversible discharge capacity (2745 mA h g(-1) at 200 mA g(-1)) and a fast charge and discharge capability (884 mA h g(-1) at 3200 mA g(-1)), which is much higher than the conventional SNWAs (c-SNWAs, only 127 mA h g(-1) at 3200 mA g(-1)). Meanwhile, they deliver an improved cycling stability (2178 mA h g(-1) at 400 mA g(-1) after 50 cycles). More significantly, the as-synthesized n-SNWAs on Cu foam also possess a superior specific areal capacity of 4.1 mA h cm(-2) at 0.6 mA cm(-2). Such excellent electrochemical performance is superior, or at least comparable, to the best report for Si anode materials. Combining the cost-effective and facile preparation method, the present n-SNWAs on Cu foam can serve as a promising anode for LIBs.

Diamond nanowires: fabrication, structure, properties, and applications

C(sp(3) )C-bonded diamond nanowires are wide band gap semiconductors that exhibit a combination of superior properties such as negative electron affinity, chemical inertness, high Young's modulus, the highest hardness, and room-temperature thermal conductivity. The creation of 1D diamond nanowires with their giant surface-to-volume ratio enhancements makes it possible to control and enhance the fundamental properties of diamond. Although theoretical comparisons with carbon nanotubes have shown that diamond nanowires are energetically and mechanically viable structures, reproducibly synthesizing the crystalline diamond nanowires has remained challenging. We present a comprehensive, up-to-date review of diamond nanowires, including a discussion of their synthesis along with their structures, properties, and applications.

Metal-seeded growth of III-V semiconductor nanowires: towards gold-free synthesis

Semiconductor nanowires composed of III-V materials have enormous potential to add new functionality to electronics and optical applications. However, integration of these promising structures into applications is severely limited by the current near-universal reliance on gold nanoparticles as seeds for nanowire fabrication. Although highly controlled fabrication is achieved, this metal is entirely incompatible with the Si-based electronics industry. In this Feature we review the progress towards developing gold-free bottom-up synthesis techniques for III-V semiconductor nanowires. Three main categories of nanowire synthesis are discussed: selective-area epitaxy, self-seeding and foreign metal seeding, with main focus on the metal-seeded techniques. For comparison, we also review the development of foreign metal seeded synthesis of silicon and germanium nanowires. Finally, directions for future development and anticipated important trends are discussed. We anticipate significant development in the use of foreign metal seeding in particular. In addition, we speculate that multiple different techniques must be developed in order to replace gold and to provide a variety of nanowire structures and properties suited to a diverse range of applications.

Enhanced device performance of germanium nanowire junctionless (GeNW-JL) MOSFETs by germanide contact formation with Ar plasma treatment

In this study, germanium nanowire junctionless (GeNW-JL) metal-oxide-semiconductor-field-effect-transistors (MOSFETs) exhibited enhanced electrical performance with low source/drain (S/D) contact resistance under the influence of Ar plasma treatment on the contact regions. We found that the transformation of the surface oxide states by Ar plasma treatment affected the S/D contact resistance. With Ar plasma treatment, the germanium dioxide on the GeNW surface was effectively removed and increased oxygen vacancies were formed in the suboxide on the GeNW, whose germanium-enrichment surface was obtained to form a germanide contact at low temperature. After a rapid thermal annealing process, Ni-germanide contacts were formed on the Ar-plasma-treated GeNW surface. Ni-germanide contact resistance was improved by more than an order of magnitude compared to that of the other devices without Ni-germanide contact. Moreover, the peak field effect mobility value of the GeNW-JL MOSFETs was dramatically improved from 15 cm(2)/(V s) to 550 cm(2)/(V s), and the Ion/off ratio was enhanced from 1 × 10 to 3 × 10(3) due to Ar plasma treatment. The Ar plasma treatment process is essential for forming uniform Ni-germanide-contacts with reduced time and low temperature. It is also crucial for increasing mass productivity and lowering the thermal budget without sacrificing the performance of GeNW-JL MOSFETs.

Preparation of silicon@silicon oxide core-shell nanowires from a silica precursor toward a high energy density Li-ion battery anode

Bulk-quantity silicon@silicon oxide nanowires have been successfully synthesized via a facile high-temperature approach using environment-friendly silica mixed with titanium powders. It is confirmed that the obtained nanowires process a crystalline core and amorphous oxide sheath. The obtained nanowires grow along the [111] direction which catalyzed by spherical silicon@siilcon oxide nanoparticles. The unique one-dimensional structure and thin oxide sheath result in the favorable electrochemical performances, which may be beneficial to the high energy density silicon anode for lithium ion batteries.

Atomically abrupt silicon-germanium axial heterostructure nanowires synthesized in a solvent vapor growth system

The growth of Si/Ge axial heterostructure nanowires in high yield using a versatile wet chemical approach is reported. Heterostructure growth is achieved using the vapor zone of a high boiling point solvent as a reaction medium with an evaporated tin layer as the catalyst. The low solubility of Si and Ge within the Sn catalyst allows the formation of extremely abrupt heterojunctions of the order of just 1-2 atomic planes between the Si and Ge nanowire segments. The compositional abruptness was confirmed using aberration corrected scanning transmission electron microscopy and atomic level electron energy loss spectroscopy. Additional analysis focused on the role of crystallographic defects in determining interfacial abruptness and the preferential incorporation of metal catalyst atoms near twin defects in the nanowires.

A nickel-gold bilayer catalyst engineering technique for self-assembled growth of highly ordered silicon nanotubes (SiNT)

We report the growth of vertically aligned high-crystallinity silicon nanotube (SiNT) arrays on silicon substrate by means of a Ni-Au bilayer catalyst engineering technique. Nanotubes were synthesized through solid-liquid-solid method as well as vapor-liquid-solid. A precise evaluation utilizing atomic force microscopy and lateral force microscopy describes that the gold profile in Ni regions leads to the construction of multiwall SiNTs. The agreement of the structural geometry and stiffness of the obtained SiNTs with previous theoretical predictions suggest sp(3) hybridization as the mechanism of tube formation. Apart from scanning electron and transmission electron microscopy techniques, photoluminescence spectroscopy (PL) has been conducted to investigate the formation of nanostructures. PL spectroscopy confirms the evolution of ultrafine walls of the silicon nanotubes, responsible for the observed photoemission properties.

Economical synthesis and promotion of the electrochemical performance of silicon nanowires as anode material in Li-ion batteries

Silicon is considered as one of the most promising anodes alternative, with a low voltage and a high theoretical specific capacity of ~4200 mAh/g, for graphite in lithium-ion batteries. However, the large volume change and resulting interfacial changes of the silicon during cycling cause unsatisfactory cycle performance and hinder its commercialization. In this study, electrochemical performance and interfacial properties of silicon nanowires (SiNWs) which are prepared by the Cu-catalyzed chemical vapor deposition method, with 1 M LiPF6/EC + DMC (1:1 v/v) containing 2 wt % or no vinylene carbonate (VC) electrolyte, are investigated by using different electrochemical and spectroscopic techniques, i.e., cyclic voltammetry (CV), electrochemical impedance spectroscopy (EIS), scanning electron microscopy (SEM), and X-ray photoelectron spectroscopy (XPS) techniques. It is shown that the addition of VC has greatly enhanced the cycling performance and rate capability of SiNWs and should have an impact on the wide utilization of silicon anode materials in Li-ion batteries.

Strategies to control morphology in hybrid group III-V/group IV heterostructure nanowires

By combining in situ and ex situ transmission electron microscopy measurements, we examine the factors that control the morphology of "hybrid" nanowires that include group III-V and group IV materials. We focus on one materials pair, GaP/Si, for which we use a wide range of growth parameters. We show through video imaging that nanowire morphology depends on growth conditions, but that a general pattern emerges where either single kinks or inclined defects form some distance after the heterointerface. We show that pure Si nanowires can be made to exhibit the same kinks and defects by changing their droplet volume. From this we derive a model where droplet geometry drives growth morphology and discuss optimization strategies. We finally discuss morphology control for material pairs where the second material kinks immediately at the heterointerface and show that an interlayer between segments can enable the growth of unkinked hybrid nanowires.

A general approach toward shape-controlled synthesis of silicon nanowires

Controlling the morphology, electronic properties, and growth direction of nanowires (NWs) is an important aspect regarding their integration into devices on technologically relevant scales. Using the vapor-solid-solid (VSS) approach, with Ni as a catalyst and octachlorotrisilane (Si(3)Cl(8), OCTS) as a precursor, we achieved epitaxial growth of rectangular-shaped Si-NWs, which may have important implications for electronic mobility and light scattering in NW devices. The process parameters were adjusted to form cubic α-NiSi(2) particles which further act as the shaping element leading to prismatic Si-NWs. Along with the uncommon shape, also different crystallographic growth directions, namely, [100] and [110], were observed on the very same sample. The growth orientations were determined by analysis of the NWs' azimuths on the Si (111) substrates as well as by detailed transmission electron microscopy (TEM) and selected area electron diffraction (SAED) investigations.

Axial SiGe heteronanowire tunneling field-effect transistors

We present silicon-compatible trigated p-Ge/i-Si/n-Si axial heteronanowire tunneling field-effect transistors (TFETs), where on-state tunneling occurs in the Ge drain section, while off-state leakage is dominated by the Si junction in the source. Our TFETs have high I(ON) ~ 2 μA/μm, fully suppressed ambipolarity, and a subthreshold slope SS ~ 140 mV/decade over 4 decades of current with lowest SS ~ 50 mV/decade. Device operation in the tunneling mode is confirmed by three-dimensional TCAD simulation. Interestingly, in addition to the TFET mode, our devices work as standard nanowire FETs with a good I(ON)/I(OFF) ratio when the source-drain junction is forward-biased. The improved transport in both biasing modes confirms the benefits of utilizing bandgap engineered axial nanowires for enhancing device performance.

Growth pathways in ultralow temperature Ge nucleation from Au

Device integration on flexible or low-cost substrates has driven interest in the low-temperature growth of semiconductor nanostructures. Using in situ electron microscopy, we examine the Au-catalyzed growth of crystalline Ge at temperatures as low as 150 °C. For this materials system, the model for low temperature growth of nanowires, we find three distinct reaction pathways. The lowest temperature reactions are distinguished by the absence of any purely liquid state. From measurements of reaction rates and parameters such as supersaturation, we explain the sequence of pathways as arising from a kinetic competition between the imposed time scale for Ge addition and the inherent time scale for Ge nucleation. This enables an understanding of the conditions under which catalytic Ge growth can occur at very low temperatures, with implications for nanostructure formation on temperature-sensitive substrates.

Inherent control of growth, morphology, and defect formation in germanium nanowires

The use of bimetallic alloy seeds for growing one-dimensional nanostructures has recently gained momentum among researchers. The compositional flexibility of alloys provides the opportunity to manipulate the chemical environment, reaction kinetics, and thermodynamic behavior of nanowire growth, in both the eutectic and the subeutectic regimes. This Letter describes for the first time the role of Au(x)Ag(1-x) alloy nanoparticles in defining the growth characteristics and crystal quality of solid-seeded Ge nanowires via a supercritical fluid growth process. The enhanced diffusivity of Ge in the alloy seeds, compared to pure Ag seeds, and slow interparticle diffusion of the alloy nanoparticles allows the realization of high-aspect ratio nanowires with diameters below 10 nm, via a seeded bottom-up approach. Also detailed is the influence the alloyed seeds have on the crystalline features of nanowires synthesized from them, that is, planar defects. The distinctive stacking fault energies, formation enthalpies, and diffusion chemistries of the nanocrystals result in different magnitudes of {111} stacking faults in the seed particles and the subsequent growth of <112>-oriented nanowires with radial twins through a defect transfer mechanism, with the highest number twinned Ge nanowires obtained using Ag(0.75)Au(0.25) growth seeds. Employing alloy nanocrystals for intrinsically dictating the growth behavior and crystallinity of nanowires could open up the possibility of engineering nanowires with tunable structural and physical properties.

Concentration gradient induced morphology evolution of silica nanostructure growth on photoresist-derived carbon micropatterns

The evolution of silica nanostructure morphology induced by local Si vapor source concentration gradient has been investigated by a smart design of experiments. Silica nanostructure or their assemblies with different morphologies are obtained on photoresist-derived three-dimensional carbon microelectrode array. At a temperature of 1,000°C, rope-, feather-, and octopus-like nanowire assemblies can be obtained along with the Si vapor source concentration gradient flow. While at 950°C, stringlike assemblies, bamboo-like nanostructures with large joints, and hollow structures with smaller sizes can be obtained along with the Si vapor source concentration gradient flow. Both vapor-liquid-solid and vapor-quasiliquid-solid growth mechanisms have been applied to explain the diverse morphologies involving branching, connecting, and batch growth behaviors. The present approach offers a potential method for precise design and controlled synthesis of nanostructures with different features.

Direct synthesis of high-density lead sulfide nanowires on metal thin films towards efficient infrared light conversion

We report chemical-vapor-deposition (CVD) synthesis of high-density lead sulfide (PbS) nanowire arrays and nano pine trees directly on Ti thin films, and the fabrication of photovoltaic devices based upon the PbS nanowires. The as-grown nanowire arrays are largely vertically aligned to the substrates and are uniformly distributed over a relatively large area. Field effect transistors incorporating single PbS nanowires show p-type conduction and high mobilities. These catalytic metal thin films also serve as photocarrier collection electrodes and greatly facilitate device integration. For the first time, we have fabricated Schottky junction photovoltaic devices incorporating PbS nanowires, which demonstrate the capability of converting near-infrared light to electricity. The PbS nanowire devices are stable in air and their external quantum efficiency shows no significant decrease over a period of 3 months in air. We have also compared the photocurrent direction and quantum efficiencies of photovoltaic devices made with different metal electrodes, and the results are explained by band bending at the Schottky junction. Our research shows that PbS nanowires are promising building blocks for collecting near-infrared solar energy.

Peculiarities of axial and radial Ge–Si heterojunction formation in nanowires: Monte Carlo simulation

The process of axial and radial Si–Ge heterostructure formation during nanowire growth by vapor–liquid–solid (VLS) mechanism was studied using Monte Carlo (MC) simulation. It was demonstrated that radial growth can be stimulated by adding chemical species that decrease the activation energy of precursor dissociation or the solubility of semiconductor material in catalyst drop. Reducing the Si adatom diffusion length also leads to Si shell formation around the Ge core. The influence of growth conditions on the composition and abruptness of axial Ge–Si heterostructures was analyzed. The composition of the Ge x Si1–x axial heterojunction (HJ) was found to be dependent on the flux ratio, the duration of Si and Ge deposition, and the catalyst drop diameter. Maximal Ge concentration in the HJ is dependent on Ge deposition time owing to gradual changing of catalyst drop composition after switching Ge and Si fluxes. The dependence of junction abruptness on the nanowire diameter was revealed: in the adsorption-induced growth mode, the abruptness decreased with diameter, and in the diffusion-induced mode it increased. This implies that abrupt Ge–Si HJ in nanowires with small diameter can be obtained only in the chemical vapor deposition (CVD) process with negligible diffusion component of growth.

Dislocation-driven CdS and CdSe nanowire growth

We report the synthesis of CdS and CdSe nanowires (NWs) and nanoribbons (NRs) with gold catalysts by H(2)-assisted chemical vapor deposition. Nanopods and nanocones were obtained without catalysts at higher system pressure. Transmission electron microscopy (TEM) studies, including two-beam TEM and displaced-aperture dark-field TEM characterization, were used to investigate the NW growth mechanism. Dislocation contrast and twist contours have been routinely observed within the synthesized one-dimensional (1D) CdS and CdSe NWs, suggesting the operation of the dislocation-driven NW growth mechanism under our experimental conditions. The Burgers vectors of dislocations and the associated Eshelby twists were measured and quantified. We hypothesize that gold nanoparticles provide nucleation sites to initiate the growth of CdS/CdSe NWs and lead to the formation of dislocations that continue to drive and sustain 1D growth at a low supersaturation level. Our study suggests that the dislocation-driven mechanism may also contribute to the growth of other 1D nanomaterials that are commonly considered to grow via the vapor-liquid-solid mechanism.

Controlling heterojunction abruptness in VLS-grown semiconductor nanowires via in situ catalyst alloying

For advanced device applications, increasing the compositional abruptness of axial heterostructured and modulation doped nanowires is critical for optimizing performance. For nanowires grown from metal catalysts, the transition region width is dictated by the solute solubility within the catalyst. For example, as a result of the relatively high solubility of Si and Ge in liquid Au for vapor-liquid-solid (VLS) grown nanowires, the transition region width between an axial Si-Ge heterojunction is typically on the order of the nanowire diameter. When the solute solubility in the catalyst is lowered, the heterojunction width can be made sharper. Here we show for the first time the systematic increase in interface sharpness between axial Ge-Si heterojunction nanowires grown by the VLS growth method using a Au-Ga alloy catalyst. Through in situ tailoring of the catalyst composition using trimethylgallium, the Ge-Si heterojunction width is systematically controlled by tuning the semiconductor solubility within a metal Au-Ga alloy catalyst. The present approach of alloying to control solute solubilities in the liquid catalyst may be extended to increasing the sharpness of axial dopant profiles, for example, in Si-Ge pn-heterojunction nanowires which is important for such applications as nanowire tunnel field effect transistors or in Si pn-junction nanowires.

Spontaneous growth and phase transformation of highly conductive nickel germanide nanowires

We report the synthesis, phase transformation, and electrical property measurement of single-crystal NiGe and ε-Ni(5)Ge(3) nanowires (NWs). NiGe NWs were spontaneously synthesized by chemical vapor deposition of GeH(4) onto a porous Ni substrate without the use of intentional catalysts. The as-grown NWs of the orthorhombic NiGe phase were transformed to the hexagonal ε-Ni(5)Ge(3) phase by thermal annealing induced Ni enrichment. This controllable conversion of germanide phases is desirable for phase-dependent property study and applications, and the observation of novel metastable ε-Ni(5)Ge(3) phase suggests the importance of kinetic factors in such nanophase transformations. Electrical studies reveal that NiGe NWs are highly conductive, with an average resistivity of 35 ± 15 μΩ·cm, while the resistivity of ε-Ni(5)Ge(3) NWs is more than 4 times that of the NiGe phase. NWs of nickel germanides, particularly NiGe, would be useful building blocks for germanium-based nanoelectronic devices.

Mechanistic investigation of the growth of Fe1-xCoxSi (0 ≤ x ≤ 1) and Fe5(Si1-yGey)3 (0 ≤ y ≤ 0.33) ternary alloy nanowires

We present the chemical vapor deposition (CVD) reactions of the single source precursor Fe(SiCl(3))(2)(CO)(4) over Si, Ge, CoSi(2)/Si, and CoSi/Si substrates to explore the growth and doping processes of silicide nanowires (NWs). Careful investigation of the composition and morphology of the NW products and the intruded silicide films from which they nucleate revealed that the group IV elements (Si, Ge) in the NW products originate from both the precursor and the substrate, while the metal elements incorporated into the NWs (Fe, Co) originate from vapor phase precursor delivery. The use of a Ge growth substrate enabled the successful synthesis of Fe(5)Si(2)Ge NWs, the first report of a metal silicide-germanide alloy NW. Further, investigation of the pyrolysis of the CoSiCl(3)(CO)(4) precursor revealed independent delivery of Co and Si species during CVD reactions. This understanding enabled a new, more robust two-precursor synthetic route to Fe(1-x)Co(x)Si alloy NWs using Fe(SiCl(3))(2)(CO)(4) and CoCl(2).

Growth and characterization of gold catalyzed SiGe nanowires and alternative metal-catalyzed Si nanowires

The growth of semiconductor (SC) nanowires (NW) by CVD using Au-catalyzed VLS process has been widely studied over the past few years. Among others SC, it is possible to grow pure Si or SiGe NW thanks to these techniques. Nevertheless, Au could deteriorate the electric properties of SC and the use of other metal catalysts will be mandatory if NW are to be designed for innovating electronic. First, this article's focus will be on SiGe NW's growth using Au catalyst. The authors managed to grow SiGe NW between 350 and 400°C. Ge concentration (x) in Si1-xGex NW has been successfully varied by modifying the gas flow ratio: R = GeH4/(SiH4 + GeH4). Characterization (by Raman spectroscopy and XRD) revealed concentrations varying from 0.2 to 0.46 on NW grown at 375°C, with R varying from 0.05 to 0.15. Second, the results of Si NW growths by CVD using alternatives catalysts such as platinum-, palladium- and nickel-silicides are presented. This study, carried out on a LPCVD furnace, aimed at defining Si NW growth conditions when using such catalysts. Since the growth temperatures investigated are lower than the eutectic temperatures of these Si-metal alloys, VSS growth is expected and observed. Different temperatures and HCl flow rates have been tested with the aim of minimizing 2D growth which induces an important tapering of the NW. Finally, mechanical characterization of single NW has been carried out using an AFM method developed at the LTM. It consists in measuring the deflection of an AFM tip while performing approach-retract curves at various positions along the length of a cantilevered NW. This approach allows the measurement of as-grown single NW's Young modulus and spring constant, and alleviates uncertainties inherent in single point measurement.

One-dimensional germanium nanostructures--formation and their electron field emission properties

Ge nanostructures were synthesized by reduction of GeO(2) in H(2) atmosphere at various temperatures. Entangled and straight Ge nanowires with oxide shells were grown at high temperatures. Ge nanowires with various numbers of nodules were obtained at low temperatures. Ge nanowires without nodules exhibited remarkable field emission properties with a turn-on field of 4.6 V µm(-1) and field enhancement factor of 1242.

Step-flow kinetics in nanowire growth

Nanowire growth occurs by step flow at the wire-catalyst interface, with strikingly different step-flow kinetics for solid versus liquid catalysts. Here we report quantitative in situ measurements of step flow together with a kinetic model that reproduces the behavior. This allows us to identify the key parameters controlling step-flow growth, evaluate changes in the catalyst composition during growth, and identify the most favorable conditions for growing abrupt heterojunctions in nanowires.

Structure, growth kinetics, and ledge flow during vapor-solid-solid growth of copper-catalyzed silicon nanowires

We use real-time observations of the growth of copper-catalyzed silicon nanowires to determine the nanowire growth mechanism directly and to quantify the growth kinetics of individual wires. Nanowires were grown in a transmission electron microscope using chemical vapor deposition on a copper-coated Si substrate. We show that the initial reaction is the formation of a silicide, eta'-Cu(3)Si, and that this solid silicide remains on the wire tips during growth so that growth is by the vapor-solid-solid mechanism. Individual wire directions and growth rates are related to the details of orientation relation and catalyst shape, leading to a rich morphology compared to vapor-liquid-solid grown nanowires. Furthermore, growth occurs by ledge propagation at the silicide/silicon interface, and the ledge propagation kinetics suggest that the solubility of precursor atoms in the catalyst is small, which is relevant to the fabrication of abrupt heterojunctions in nanowires.