Floating-gate controlled programmable non-volatile black phosphorus PNP junction memory

An Ultrafast Multibit Memory Based on the ReS2/h-BN/Graphene Heterostructure

The exponential growth of data in the big data era has made it imperative to improve the data storage density and calculation speed. Therefore, the development of a multibit memory with an ultrafast operational speed is of great significance. In this work, a floating-gate (FG) memory based on the ReS2/h-BN/graphene van der Waals heterostructure is reported. The device exhibits ultrafast and multilevel nonvolatile memory characteristics, notably featuring an exceptionally large memory window of 113.36 V, a substantial erasing/programming current ratio of 107, an ultrafast operational speed of 30 ns, outstanding endurance exceeding 1000 cycles, and retention performance exceeding 1100 s. Furthermore, the device exhibits both electrically and optically tunable multilevel nonvolatile memory behavior. By controlling the voltage and light pulse parameters, the device achieves an electrical memory state of 130 levels (>7 bits) and an optical memory state of 45 levels (>5 bits).

2D van der Waals Heterostructure with Tellurene Floating-Gate for Wide Range and Multi-Bit Optoelectronic Memory

Intensive research on optoelectronic memory (OEM) devices based on two-dimensional (2D) van der Waals heterostructures (vdWhs) is being conducted due to their distinctive advantages for electrical-optical writing and multilevel storage. These features make OEM a promising candidate for the logic of reconfigurable operations. However, the realization of nonvolatile OEM with broadband absorption (from visible to infrared) and a high switching ratio remains challenging. Herein, we report a nonvolatile OEM based on a heterostructure consisting of rhenium disulfide (ReS2), hexagonal boron nitride (hBN) and tellurene (2D Te). The 2D Te-based floating-gate (FG) device exhibits excellent performance metrics, including a high switching on/off ratio (∼106), significant endurance (>1000 cycles) and impressive retention (>104 s). In addition, the narrow band gap of 2D Te endows the device with broadband optical programmability from the visible to near-infrared regions at room temperature. Moreover, by applying different gate voltages, light wavelengths, and laser powers, multiple bits can be successfully generated. Additionally, the device is specifically designed to enable reconfigurable inverter logic circuits (including AND and OR gates) through controlled electrical and optical inputs. These significant findings demonstrate that the 2D vdWhs with a 2D Te FG are a valuable approach in the development of high-performance OEM devices.

2D materials readiness for the transistor performance breakthrough

As the size of the transistor scales down, this strategy has confronted challenges because of the fundamental limits of silicon materials. Besides, more and more energy and time are consumed by the data transmission out of transistor computing because of the speed mismatching between the computing and memory. To meet the energy efficiency demands of big data computing, the transistor should have a smaller feature size and store data faster to overcome the energy burden of computing and data transfer. Electron transport in two-dimensional (2D) materials is constrained within a 2D plane and different materials are assembled by the van der Waals force. Owning to the atomic thickness and dangling-bond-free surface, 2D materials have demonstrated advantages in transistor scaling-down and heterogeneous structure innovation. In this review, from the performance breakthrough of 2D transistors, we discuss the opportunities, progress and challenges of 2D materials in transistor applications.

Ultrafast non-volatile flash memory based on van der Waals heterostructures

Flash memory has become a ubiquitous solid-state memory device widely used in portable digital devices, computers and enterprise applications. The development of the information age has demanded improvements in memory speed and retention performance. Here we demonstrate an ultrafast non-volatile flash memory based on MoS₂/hBN/multilayer graphene van der Waals heterostructures, which achieves an ultrafast writing/erasing speed of 20 ns through two-triangle-barrier modified Fowler-Nordheim tunnelling. Using detailed theoretical analysis and experimental verification, we postulate that a suitable barrier height, gate coupling ratio and clean interface are the main reasons for the breakthrough writing/erasing speed of our flash memory devices. Because of its non-volatility this ultrafast flash memory could provide the foundation for the next generation of high-speed non-volatile memory.

Material and Device Structure Designs for 2D Memory Devices Based on the Floating Gate Voltage Trajectory

Two-dimensional heterostructures have been extensively investigated as next-generation nonvolatile memory (NVM) devices. In the past decade, drastic performance improvements and further advanced functionalities have been demonstrated. However, this progress is not sufficiently supported by the understanding of their operations, obscuring the material and device structure design policy. Here, detailed operation mechanisms are elucidated by exploiting the floating gate (FG) voltage measurements. Systematic comparisons of MoTe₂, WSe₂, and MoS₂ channel devices revealed that the tunneling behavior between the channel and FG is controlled by three kinds of current-limiting paths, i.e., tunneling barrier, 2D/metal contact, and p-n junction in the channel. Furthermore, the control experiment indicated that the access region in the device structure is required to achieve 2D channel/FG tunneling by preventing electrode/FG tunneling. The present understanding suggests that the ambipolar 2D-based FG-type NVM device with the access region is suitable for further realizing potentially high electrical reliability.

Emerging Opportunities for Electrostatic Control in Atomically Thin Devices

Electrostatic control of charge carrier concentration underlies the field-effect transistor (FET), which is among the most ubiquitous devices in the modern world. As transistors and related electronic devices have been miniaturized to the nanometer scale, electrostatics have become increasingly important, leading to progressively sophisticated device geometries such as the finFET. With the advent of atomically thin materials in which dielectric screening lengths are greater than device physical dimensions, qualitatively different opportunities emerge for electrostatic control. In this Review, recent demonstrations of unconventional electrostatic modulation in atomically thin materials and devices are discussed. By combining low dielectric screening with the other characteristics of atomically thin materials such as relaxed requirements for lattice matching, quantum confinement of charge carriers, and mechanical flexibility, high degrees of electrostatic spatial inhomogeneity can be achieved, which enables a diverse range of gate-tunable properties that are useful in logic, memory, neuromorphic, and optoelectronic technologies.

Ultralow Power Wearable Heterosynapse with Photoelectric Synergistic Modulation

Although the energy consumption of reported neuromorphic computing devices inspired by biological systems has become lower than traditional memory, it still remains greater than bio-synapses (≈10 fJ per spike). Herein, a flexible MoS2-based heterosynapse is designed with two modulation modes, an electronic mode and a photoexcited mode. A one-step mechanical exfoliation method on flexible substrate and low-temperature atomic layer deposition process compatible with flexible electronics are developed for fabricating wearable heterosynapses. With a pre-spike of 100 ns, the synaptic device exhibits ultralow energy consumption of 18.3 aJ per spike in long-term potentiation and 28.9 aJ per spike in long-term depression. The ultrafast speed and ultralow power consumption provide a path for a neuromorphic computing system owning more excellent processing ability than the human brain. By adding optical modulation, a modulatory synapse is constructed to dynamically control correlations between pre- and post-synapses and realize complex global neuromodulations. The novel wearable heterosynapse expands the accessible range of synaptic weights (ratio of facilitation ≈228%), providing an insight into the application of wearable 2D highly efficient neuromorphic computing architectures.

Solution-processed black phosphorus nanoflakes for integrating nonvolatile resistive random access memory and the mechanism unveiled

In this study, we demonstrated the integration of black phosphorus (BP) nanoflakes in a resistive random access memory (RRAM) with a facile and complementary metal-oxide-semiconductor-compatible process. The solution-processed BP nanoflakes embedded in polystyrene (PS) as an active layer were sandwiched between aluminum electrodes (Al/BP:PS/Al). The device shows a figure of merit with typical bipolar behavior and forming-free characteristics as well as excellent memory performances such as nonvolatile, low operation voltage (1.75 V) and high ON/OFF ratio (>10²) as well as the long retention time (>1500 s). The improved device performances were attributed to the formation of effective trap sites from the hybrid structure of the active layer (BP:PS), especially the BP nanoflakes and the partly oxidized species (P _x O _y ). Moreover, the extrinsic aluminum oxide layer was observed after the device operation. The mechanism of switching behavior was further unveiled through the carrier transport models, which confirms the conductive mechanisms of space-charge-limited current and Ohmic conductance at high resistance state (HRS) and low resistance state, respectively. Additionally, in the high electric field at HRS, the transfer curve was well fitted with the Poole-Frenkel emission model, which could be attributed to the formation of the aluminum oxide layer. Accordingly, both the trapping/de-trapping of carriers and the formation/rupture of conductive filaments were introduced as transport mechanisms in our devices. Although the partial P _x O _y species on BP were inevitable during the liquid phase exfoliation process, which was regarded as the disadvantages for various applications, it turns to a key point for improving performances in memory devices. The proposed approach to integrating BP nanoflakes in the active layer of the RRAM device could pave the way for next-generation memory devices.

Anti-Ambipolar Transport with Large Electrical Modulation in 2D Heterostructured Devices

Van der Waals materials and their heterostructures provide a versatile platform to explore new device architectures and functionalities beyond conventional semiconductors. Of particular interest is anti-ambipolar behavior, which holds potentials for various digital electronic applications. However, most of the previously conducted studies are focused on hetero- or homo- p-n junctions, which suffer from a weak electrical modulation. Here, the anti-ambipolar transport behavior and negative transconductance of MoTe₂ transistors are reported using a graphene/h-BN floating-gate structure to dynamically modulate the conduction polarity. Due to the asymmetric electrical field regulating effect on the recombination and diffusion currents, the anti-ambipolar transport and negative transconductance feature can be systematically controlled. Consequently, the device shows an unprecedented peak resistance modulation factor (≈5 × 10³ ), and effective photoexcitation modulation with distinct threshold voltage shift and large photo on/off ratio (≈10⁴ ). Utilizing this large modulation effect, the voltage-transfer characteristics of an inverter circuit variant are further studied and its applications in Schmitt triggers and multivalue output are further explored. These properties, in addition to their proven nonvolatile storage, suggest that such 2D heterostructured devices display promising perspectives toward future logic applications.

Doping engineering and functionalization of two-dimensional metal chalcogenides

Two-dimensional (2D) layered metal chalcogenides (MXs) have significant potential for use in flexible transistors, optoelectronics, sensing and memory devices beyond the state-of-the-art technology. To pursue ultimate performance, precisely controlled doping engineering of 2D MXs is desired for tailoring their physical and chemical properties in functional devices. In this review, we highlight the recent progress in the doping engineering of 2D MXs, covering that enabled by substitution, exterior charge transfer, intercalation and the electrostatic doping mechanism. A variety of novel doping engineering examples leading to Janus structures, defect curing effects, zero-valent intercalation and deliberately devised floating gate modulation will be discussed together with their intriguing application prospects. The choice of doping strategies and sources for functionalizing MXs will be provided to facilitate ongoing research in this field toward multifunctional applications.