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Lee SH, Cheong S, Cho JM, Ghenzi N, Shin DH, Jang YH, Han J, Park TW, Kim DY, Shim SK, Han JK, Kim SS, Hwang CS. In-Materia Annealing and Combinatorial Optimization Based on Vertical Memristive Array. ADVANCED MATERIALS (DEERFIELD BEACH, FLA.) 2024:e2410191. [PMID: 39194394 DOI: 10.1002/adma.202410191] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Grants] [Track Full Text] [Subscribe] [Scholar Register] [Received: 07/15/2024] [Revised: 08/04/2024] [Indexed: 08/29/2024]
Abstract
Due to its area and energy efficiency, a memristive crossbar array (CBA) has been extensively studied for various combinatorial optimization applications, from network problems to circuit design. However, conventional approaches include heavily burdening software fine-tuning for the annealing process. Instead, this study introduces the "in-materia annealing" method, where the inter-layer interference of vertically stacked memristive CBA is utilized as an annealing method. When mapping combinatorial optimization problems into the configuration layer of the CBA, exponentially decaying annealing profiles are generated in nearby noise layers. Moreover, in-materia annealing profiles can be controlled by changing compliance current, read voltage, and read pulse width. Therefore, the annealing profiles can be arbitrarily controlled and generated individually for each cell, providing rich noise sources to solve the problem efficiently. Consequently, the experimental and simulation of Max-Cut and weighted Max-Cut problems achieve notable results with the minimum software burden.
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Affiliation(s)
- Soo Hyung Lee
- Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea
| | - Sunwoo Cheong
- Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea
| | - Jea Min Cho
- Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea
| | - Néstor Ghenzi
- Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea
| | - Dong Hoon Shin
- Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea
| | - Yoon Ho Jang
- Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea
| | - Janguk Han
- Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea
| | - Tae Won Park
- Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea
| | - Dong Yun Kim
- Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea
| | - Sung Keun Shim
- Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea
| | - Joon-Kyu Han
- System Semiconductor Engineering and Department of Electronic Engineering, Sogang University, 35 Baekbeom-ro, Mapo-gu, Seoul, 04107, Republic of Korea
| | - Seung Soo Kim
- Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea
| | - Cheol Seong Hwang
- Department of Materials Science and Engineering and Inter-University Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea
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2
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Li X, Yang X, Ju X. A novel fractional-order memristive Hopfield neural network for traveling salesman problem and its FPGA implementation. Neural Netw 2024; 179:106548. [PMID: 39128274 DOI: 10.1016/j.neunet.2024.106548] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Track Full Text] [Journal Information] [Subscribe] [Scholar Register] [Received: 01/24/2024] [Revised: 06/20/2024] [Accepted: 07/14/2024] [Indexed: 08/13/2024]
Abstract
This paper proposes a novel fractional-order memristive Hopfield neural network (HNN) to address traveling salesman problem (TSP). Fractional-order memristive HNN can efficiently converge to a globally optimal solution, while conventional HNN tends to become stuck at a local minimum in solving TSP. Incorporating fractional-order calculus and memristors gives the system long-term memory properties and complex chaotic characteristics, resulting in faster convergence speeds and shorter average distances in solving TSP. Moreover, a novel chaotic optimization algorithm based on fractional-order memristive HNN is designed for the calculation process to deal with mutual constraint between convergence accuracy and convergence speed, which circumvents random search and diminishes the rate of invalid solutions. Numerical simulations demonstrate the effectiveness and merits of the proposed algorithm. Furthermore, Field Programmable Gate Array (FPGA) technology is utilized to implement the proposed neural network.
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Affiliation(s)
- Xiangping Li
- College of Electronics and Information Engineering, Sichuan University, Chengdu 610065, China.
| | - Xinsong Yang
- College of Electronics and Information Engineering, Sichuan University, Chengdu 610065, China.
| | - Xingxing Ju
- College of Electronics and Information Engineering, Sichuan University, Chengdu 610065, China.
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3
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Deng Y, Zhang Y, Zhang X, Jiang Y, Chen X, Yang Y, Tong X, Cai Y, Liu W, Sun C, Shang D, Wang Q, Yu H, Wang Z. MEMS Oscillators-Network-Based Ising Machine with Grouping Method. ADVANCED SCIENCE (WEINHEIM, BADEN-WURTTEMBERG, GERMANY) 2024; 11:e2310096. [PMID: 38696663 PMCID: PMC11234442 DOI: 10.1002/advs.202310096] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Grants] [Track Full Text] [Subscribe] [Scholar Register] [Received: 12/22/2023] [Revised: 03/17/2024] [Indexed: 05/04/2024]
Abstract
Combinatorial optimization (CO) has a broad range of applications in various fields, including operations research, computer science, and artificial intelligence. However, many of these problems are classified as nondeterministic polynomial-time (NP)-complete or NP-hard problems, which are known for their computational complexity and cannot be solved in polynomial time on traditional digital computers. To address this challenge, continuous-time Ising machine solvers have been developed, utilizing different physical principles to map CO problems to ground state finding. However, most Ising machine prototypes operate at speeds comparable to digital hardware and rely on binarizing node states, resulting in increased system complexity and further limiting operating speed. To tackle these issues, a novel device-algorithm co-design method is proposed for fast sub-optimal solution finding with low hardware complexity. On the device side, a piezoelectric lithium niobate (LiNbO3) microelectromechanical system (MEMS) oscillator network-based Ising machine without second-harmonic injection locking (SHIL) is devised to solve Max-cut and graph coloring problems. The LiNbO3 oscillator operates at speeds greater than 9 GHz, making it one of the fastest oscillatory Ising machines. System-wise, an innovative grouping method is used that achieves a performance guarantee of 0.878 for Max-cut and 0.658 for graph coloring problems, which is comparable to Ising machines that utilize binarization.
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Affiliation(s)
- Yi Deng
- Department of Electrical and Electronic EngineeringThe University of Hong KongPokfulam RoadHong Kong999077China
- ACCESS ‐ AI Chip Center for Emerging Smart SystemsInnoHK CentersHong Kong Science ParkHong Kong999077China
| | - Yi Zhang
- Department of Electrical and Electronic EngineeringThe University of Hong KongPokfulam RoadHong Kong999077China
- ACCESS ‐ AI Chip Center for Emerging Smart SystemsInnoHK CentersHong Kong Science ParkHong Kong999077China
- School of MicroelectronicsSouthern University of Science and TechnologyShenzhen518055China
| | - Xinyuan Zhang
- Department of Electrical and Electronic EngineeringThe University of Hong KongPokfulam RoadHong Kong999077China
- ACCESS ‐ AI Chip Center for Emerging Smart SystemsInnoHK CentersHong Kong Science ParkHong Kong999077China
| | - Yang Jiang
- Department of Electrical and Electronic EngineeringThe University of Hong KongPokfulam RoadHong Kong999077China
- ACCESS ‐ AI Chip Center for Emerging Smart SystemsInnoHK CentersHong Kong Science ParkHong Kong999077China
- School of MicroelectronicsSouthern University of Science and TechnologyShenzhen518055China
| | - Xi Chen
- Department of Electrical and Electronic EngineeringThe University of Hong KongPokfulam RoadHong Kong999077China
- ACCESS ‐ AI Chip Center for Emerging Smart SystemsInnoHK CentersHong Kong Science ParkHong Kong999077China
| | - Yansong Yang
- Department of Electronic and Computer EngineeringHong Kong University of Science and TechnologyHong Kong999077China
| | - Xin Tong
- Institute of Technological SciencesWuhan UniversityWuhan430072China
| | - Yao Cai
- Institute of Technological SciencesWuhan UniversityWuhan430072China
| | - Wenjuan Liu
- Institute of Technological SciencesWuhan UniversityWuhan430072China
| | - Chengliang Sun
- Institute of Technological SciencesWuhan UniversityWuhan430072China
| | - Dashan Shang
- Institute of MicroelectronicsChinese Academy of SciencesBeijing100029China
| | - Qing Wang
- School of MicroelectronicsSouthern University of Science and TechnologyShenzhen518055China
| | - Hongyu Yu
- School of MicroelectronicsSouthern University of Science and TechnologyShenzhen518055China
| | - Zhongrui Wang
- Department of Electrical and Electronic EngineeringThe University of Hong KongPokfulam RoadHong Kong999077China
- ACCESS ‐ AI Chip Center for Emerging Smart SystemsInnoHK CentersHong Kong Science ParkHong Kong999077China
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4
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Wang Z, Tao P, Chen L. Brain-inspired chaotic spiking backpropagation. Natl Sci Rev 2024; 11:nwae037. [PMID: 38707198 PMCID: PMC11067972 DOI: 10.1093/nsr/nwae037] [Citation(s) in RCA: 1] [Impact Index Per Article: 1.0] [Reference Citation Analysis] [Abstract] [Key Words] [Grants] [Track Full Text] [Figures] [Journal Information] [Subscribe] [Scholar Register] [Received: 10/10/2023] [Revised: 12/19/2023] [Accepted: 01/17/2024] [Indexed: 05/07/2024] Open
Abstract
Spiking neural networks (SNNs) have superior energy efficiency due to their spiking signal transmission, which mimics biological nervous systems, but they are difficult to train effectively. Although surrogate gradient-based methods offer a workable solution, trained SNNs frequently fall into local minima because they are still primarily based on gradient dynamics. Inspired by the chaotic dynamics in animal brain learning, we propose a chaotic spiking backpropagation (CSBP) method that introduces a loss function to generate brain-like chaotic dynamics and further takes advantage of the ergodic and pseudo-random nature to make SNN learning effective and robust. From a computational viewpoint, we found that CSBP significantly outperforms current state-of-the-art methods on both neuromorphic data sets (e.g. DVS-CIFAR10 and DVS-Gesture) and large-scale static data sets (e.g. CIFAR100 and ImageNet) in terms of accuracy and robustness. From a theoretical viewpoint, we show that the learning process of CSBP is initially chaotic, then subject to various bifurcations and eventually converges to gradient dynamics, consistently with the observation of animal brain activity. Our work provides a superior core tool for direct SNN training and offers new insights into understanding the learning process of a biological brain.
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Affiliation(s)
- Zijian Wang
- Key Laboratory of Systems Health Science of Zhejiang Province, School of Life Science, Hangzhou Institute for Advanced Study, University of Chinese Academy of Sciences, Hangzhou 310024, China
| | - Peng Tao
- Key Laboratory of Systems Health Science of Zhejiang Province, School of Life Science, Hangzhou Institute for Advanced Study, University of Chinese Academy of Sciences, Hangzhou 310024, China
| | - Luonan Chen
- Key Laboratory of Systems Health Science of Zhejiang Province, School of Life Science, Hangzhou Institute for Advanced Study, University of Chinese Academy of Sciences, Hangzhou 310024, China
- Key Laboratory of Systems Biology, Shanghai Institute of Biochemistry and Cell Biology, Center for Excellence in Molecular Cell Science, Chinese Academy of Sciences, Shanghai 200031, China
- Guangdong Institute of Intelligence Science and Technology, Hengqin, Zhuhai 519031, China
- Pazhou Laboratory (Huangpu), Guangzhou 510555, China
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5
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Chen X, Yang D, Hwang G, Dong Y, Cui B, Wang D, Chen H, Lin N, Zhang W, Li H, Shao R, Lin P, Hong H, Yao Y, Sun L, Wang Z, Yang H. Oscillatory Neural Network-Based Ising Machine Using 2D Memristors. ACS NANO 2024; 18:10758-10767. [PMID: 38598699 DOI: 10.1021/acsnano.3c10559] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Track Full Text] [Subscribe] [Scholar Register] [Indexed: 04/12/2024]
Abstract
Neural networks are increasingly used to solve optimization problems in various fields, including operations research, design automation, and gene sequencing. However, these networks face challenges due to the nondeterministic polynomial time (NP)-hard issue, which results in exponentially increasing computational complexity as the problem size grows. Conventional digital hardware struggles with the von Neumann bottleneck, the slowdown of Moore's law, and the complexity arising from heterogeneous system design. Two-dimensional (2D) memristors offer a potential solution to these hardware challenges, with their in-memory computing, decent scalability, and rich dynamic behaviors. In this study, we explore the use of nonvolatile 2D memristors to emulate synapses in a discrete-time Hopfield neural network, enabling the network to solve continuous optimization problems, like finding the minimum value of a quadratic polynomial, and tackle combinatorial optimization problems like Max-Cut. Additionally, we coupled volatile memristor-based oscillators with nonvolatile memristor synapses to create an oscillatory neural network-based Ising machine, a continuous-time analog dynamic system capable of solving combinatorial optimization problems including Max-Cut and map coloring through phase synchronization. Our findings demonstrate that 2D memristors have the potential to significantly enhance the efficiency, compactness, and homogeneity of integrated Ising machines, which is useful for future advances in neural networks for optimization problems.
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Affiliation(s)
- Xi Chen
- Centre for Quantum Physics, Key Laboratory of Advanced Optoelectronic Quantum Architecture and Measurement (MOE), School of Physics, Beijing Institute of Technology, Beijing 100081, China
- Department of Electrical and Electronic Engineering, The University of Hong Kong, Pokfulam Road, Hong Kong, China
| | - Dongliang Yang
- Centre for Quantum Physics, Key Laboratory of Advanced Optoelectronic Quantum Architecture and Measurement (MOE), School of Physics, Beijing Institute of Technology, Beijing 100081, China
| | - Geunwoo Hwang
- Division of Chemical Engineering and Materials Science, Graduate Program in System Health Science and Engineering, Ewha Womans University, Seoul 03760, Korea
| | - Yujiao Dong
- Department of Electrical and Electronic Engineering, The University of Hong Kong, Pokfulam Road, Hong Kong, China
- Institute of Modern Circuit and Intelligent Information, Hangzhou Dianzi University, Hangzhou 310018, China
| | - Binbin Cui
- Department of Electrical and Electronic Engineering, The University of Hong Kong, Pokfulam Road, Hong Kong, China
| | - Dingchen Wang
- Department of Electrical and Electronic Engineering, The University of Hong Kong, Pokfulam Road, Hong Kong, China
| | - Hegan Chen
- Department of Electrical and Electronic Engineering, The University of Hong Kong, Pokfulam Road, Hong Kong, China
| | - Ning Lin
- Department of Electrical and Electronic Engineering, The University of Hong Kong, Pokfulam Road, Hong Kong, China
| | - Wenqi Zhang
- Department of Biomedical Engineering, City University of Hong Kong, Kowloon Tong, Hong Kong, China
| | - Huihan Li
- Centre for Quantum Physics, Key Laboratory of Advanced Optoelectronic Quantum Architecture and Measurement (MOE), School of Physics, Beijing Institute of Technology, Beijing 100081, China
| | - Ruiwen Shao
- Beijing Advanced Innovation Center for Intelligent Robots and Systems and Institute of Engineering Medicine, Beijing Institute of Technology, Beijing 100081, China
| | - Peng Lin
- College of Computer Science and Technology, Zhejiang University, Hang Zhou 310013, China
| | - Heemyoung Hong
- Department of Physics, Korea Advanced Institute of Science and Technology (KAIST), Daejeon 34141, Korea
| | - Yugui Yao
- Centre for Quantum Physics, Key Laboratory of Advanced Optoelectronic Quantum Architecture and Measurement (MOE), School of Physics, Beijing Institute of Technology, Beijing 100081, China
| | - Linfeng Sun
- Centre for Quantum Physics, Key Laboratory of Advanced Optoelectronic Quantum Architecture and Measurement (MOE), School of Physics, Beijing Institute of Technology, Beijing 100081, China
| | - Zhongrui Wang
- Department of Electrical and Electronic Engineering, The University of Hong Kong, Pokfulam Road, Hong Kong, China
| | - Heejun Yang
- Department of Physics, Korea Advanced Institute of Science and Technology (KAIST), Daejeon 34141, Korea
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6
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Yin X, Qian Y, Vardar A, Günther M, Müller F, Laleni N, Zhao Z, Jiang Z, Shi Z, Shi Y, Gong X, Zhuo C, Kämpfe T, Ni K. Ferroelectric compute-in-memory annealer for combinatorial optimization problems. Nat Commun 2024; 15:2419. [PMID: 38499524 PMCID: PMC10948773 DOI: 10.1038/s41467-024-46640-x] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Track Full Text] [Journal Information] [Subscribe] [Scholar Register] [Received: 10/17/2023] [Accepted: 03/05/2024] [Indexed: 03/20/2024] Open
Abstract
Computationally hard combinatorial optimization problems (COPs) are ubiquitous in many applications. Various digital annealers, dynamical Ising machines, and quantum/photonic systems have been developed for solving COPs, but they still suffer from the memory access issue, scalability, restricted applicability to certain types of COPs, and VLSI-incompatibility, respectively. Here we report a ferroelectric field effect transistor (FeFET) based compute-in-memory (CiM) annealer for solving larger-scale COPs efficiently. Our CiM annealer converts COPs into quadratic unconstrained binary optimization (QUBO) formulations, and uniquely accelerates in-situ the core vector-matrix-vector (VMV) multiplication operations of QUBO formulations in a single step. Specifically, the three-terminal FeFET structure allows for lossless compression of the stored QUBO matrix, achieving a remarkably 75% chip size saving when solving Max-Cut problems. A multi-epoch simulated annealing (MESA) algorithm is proposed for efficient annealing, achieving up to 27% better solution and ~ 2X speedup than conventional simulated annealing. Experimental validation is performed using the first integrated FeFET chip on 28nm HKMG CMOS technology, indicating great promise of FeFET CiM array in solving general COPs.
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Affiliation(s)
- Xunzhao Yin
- Zhejiang University, Hangzhou, China
- Key Laboratory of CS&AUS of Zhejiang Province, Hangzhou, China
| | - Yu Qian
- Zhejiang University, Hangzhou, China
| | | | | | | | | | | | | | - Zhiguo Shi
- Zhejiang University, Hangzhou, China
- Key Laboratory of CS&AUS of Zhejiang Province, Hangzhou, China
| | - Yiyu Shi
- University of Notre Dame, Notre Dame, USA
| | - Xiao Gong
- National University of Singapore, Singapore, Singapore
| | - Cheng Zhuo
- Zhejiang University, Hangzhou, China.
- Key Laboratory of CS&AUS of Zhejiang Province, Hangzhou, China.
| | | | - Kai Ni
- University of Notre Dame, Notre Dame, USA.
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7
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Jiang M, Shan K, He C, Li C. Efficient combinatorial optimization by quantum-inspired parallel annealing in analogue memristor crossbar. Nat Commun 2023; 14:5927. [PMID: 37739944 PMCID: PMC10516914 DOI: 10.1038/s41467-023-41647-2] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Grants] [Track Full Text] [Journal Information] [Subscribe] [Scholar Register] [Received: 04/30/2023] [Accepted: 09/11/2023] [Indexed: 09/24/2023] Open
Abstract
Combinatorial optimization problems are prevalent in various fields, but obtaining exact solutions remains challenging due to the combinatorial explosion with increasing problem size. Special-purpose hardware such as Ising machines, particularly memristor-based analog Ising machines, have emerged as promising solutions. However, existing simulate-annealing-based implementations have not fully exploited the inherent parallelism and analog storage/processing features of memristor crossbar arrays. This work proposes a quantum-inspired parallel annealing method that enables full parallelism and improves solution quality, resulting in significant speed and energy improvement when implemented in analog memristor crossbars. We experimentally solved tasks, including unweighted and weighted Max-Cut and traveling salesman problem, using our integrated memristor chip. The quantum-inspired parallel annealing method implemented in memristor-based hardware has demonstrated significant improvements in time- and energy-efficiency compared to previously reported simulated annealing and Ising machine implemented on other technologies. This is because our approach effectively exploits the natural parallelism, analog conductance states, and all-to-all connection provided by memristor technology, promising its potential for solving complex optimization problems with greater efficiency.
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Affiliation(s)
- Mingrui Jiang
- Department of Electrical and Electronic Engineering, The University of Hong Kong, Hong Kong SAR, China
| | - Keyi Shan
- Department of Electrical and Electronic Engineering, The University of Hong Kong, Hong Kong SAR, China
| | - Chengping He
- Department of Electrical and Electronic Engineering, The University of Hong Kong, Hong Kong SAR, China
| | - Can Li
- Department of Electrical and Electronic Engineering, The University of Hong Kong, Hong Kong SAR, China.
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8
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Qiu J, Shi M, Li S, Ying Q, Zhang X, Mao X, Shi S, Wu S. Artificial neural network model- and response surface methodology-based optimization of Atractylodis Macrocephalae Rhizoma polysaccharide extraction, kinetic modelling and structural characterization. ULTRASONICS SONOCHEMISTRY 2023; 95:106408. [PMID: 37088027 PMCID: PMC10457599 DOI: 10.1016/j.ultsonch.2023.106408] [Citation(s) in RCA: 7] [Impact Index Per Article: 7.0] [Reference Citation Analysis] [Abstract] [Key Words] [MESH Headings] [Track Full Text] [Subscribe] [Scholar Register] [Received: 12/31/2022] [Revised: 03/08/2023] [Accepted: 04/13/2023] [Indexed: 05/03/2023]
Abstract
Atractylodis Macrocephalae Rhizoma (AMR) is the dried rhizome of Atractylodes macrocephala Koidz, which is widely used in the development of health products. AMR contains a large number of polysaccharides, but at present there are fewer applications for these polysaccharides. In this study, the effects of different extraction methods on the Atractylodis Macrocephalae Rhizoma polysaccharide (AMRP) yield were investigated, and the conditions for ultrasound-assisted extraction were optimized by response surface methodology (RSM) and three neural network models (BP neural network, GA-BP neural network and ACO-GA-BP neural network). The best conditions were a liquid-to-solid ratio of 17 mL/g, ultrasonic power of 400 W, extraction temperature of 72 °C, and extraction time of 40 min, which yielded 31.31% AMRP. The kinetic equation of AMRP was determined and compared with the results predicted by three neural network models. It was finally determined that the extraction conditions, kinetic processes and kinetic equation predicted by the GA-ACO-BP neural network were optimal. In addition, AMRP was characterized using SEM, FTIR, HPLC, UV, XRD, and NMR, and the structural study revealed that AMRP has a rough exterior and a porous interior; moreover, it contains high levels of glucose (5.07%), arabinose (0.80%), and galactose (0.74%). AMRP has three crystal structures, consisting of two β-type monosaccharides and one α-type monosaccharide. Additionally, the effectiveness of AMRP as an antioxidant was demonstrated in an in vitro experiment.
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Affiliation(s)
- Junjie Qiu
- School of Pharmaceutical Sciences, Zhejiang Chinese Medical University, Hangzhou 310053, China
| | - Menglin Shi
- School of Pharmaceutical Sciences, Zhejiang Chinese Medical University, Hangzhou 310053, China
| | - Siqi Li
- School of Pharmaceutical Sciences, Zhejiang Chinese Medical University, Hangzhou 310053, China
| | - Qianyi Ying
- School of Pharmaceutical Sciences, Zhejiang Chinese Medical University, Hangzhou 310053, China
| | - Xinxin Zhang
- School of Pharmaceutical Sciences, Zhejiang Chinese Medical University, Hangzhou 310053, China
| | - Xinxin Mao
- School of Pharmaceutical Sciences, Zhejiang Chinese Medical University, Hangzhou 310053, China
| | - Senlin Shi
- School of Pharmaceutical Sciences, Zhejiang Chinese Medical University, Hangzhou 310053, China.
| | - Suxiang Wu
- School of Pharmaceutical Sciences, Zhejiang Chinese Medical University, Hangzhou 310053, China.
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9
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Langenegger J, Karunaratne G, Hersche M, Benini L, Sebastian A, Rahimi A. In-memory factorization of holographic perceptual representations. NATURE NANOTECHNOLOGY 2023; 18:479-485. [PMID: 36997756 DOI: 10.1038/s41565-023-01357-8] [Citation(s) in RCA: 3] [Impact Index Per Article: 3.0] [Reference Citation Analysis] [Abstract] [Track Full Text] [Subscribe] [Scholar Register] [Received: 10/17/2022] [Accepted: 02/21/2023] [Indexed: 05/21/2023]
Abstract
Disentangling the attributes of a sensory signal is central to sensory perception and cognition and hence is a critical task for future artificial intelligence systems. Here we present a compute engine capable of efficiently factorizing high-dimensional holographic representations of combinations of such attributes, by exploiting the computation-in-superposition capability of brain-inspired hyperdimensional computing, and the intrinsic stochasticity associated with analogue in-memory computing based on nanoscale memristive devices. Such an iterative in-memory factorizer is shown to solve at least five orders of magnitude larger problems that cannot be solved otherwise, as well as substantially lowering the computational time and space complexity. We present a large-scale experimental demonstration of the factorizer by employing two in-memory compute chips based on phase-change memristive devices. The dominant matrix-vector multiplication operations take a constant time, irrespective of the size of the matrix, thus reducing the computational time complexity to merely the number of iterations. Moreover, we experimentally demonstrate the ability to reliably and efficiently factorize visual perceptual representations.
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Affiliation(s)
- Jovin Langenegger
- IBM Research-Zurich, Rüschlikon, Switzerland
- Department of Information Technology and Electrical Engineering, ETH Zürich, Zürich, Switzerland
| | - Geethan Karunaratne
- IBM Research-Zurich, Rüschlikon, Switzerland
- Department of Information Technology and Electrical Engineering, ETH Zürich, Zürich, Switzerland
| | - Michael Hersche
- IBM Research-Zurich, Rüschlikon, Switzerland
- Department of Information Technology and Electrical Engineering, ETH Zürich, Zürich, Switzerland
| | - Luca Benini
- Department of Information Technology and Electrical Engineering, ETH Zürich, Zürich, Switzerland
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10
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Xiao Y, Jiang B, Zhang Z, Ke S, Jin Y, Wen X, Ye C. A review of memristor: material and structure design, device performance, applications and prospects. SCIENCE AND TECHNOLOGY OF ADVANCED MATERIALS 2023; 24:2162323. [PMID: 36872944 PMCID: PMC9980037 DOI: 10.1080/14686996.2022.2162323] [Citation(s) in RCA: 16] [Impact Index Per Article: 16.0] [Reference Citation Analysis] [Abstract] [Key Words] [Track Full Text] [Figures] [Subscribe] [Scholar Register] [Received: 10/16/2022] [Revised: 12/09/2022] [Accepted: 12/21/2022] [Indexed: 06/18/2023]
Abstract
With the booming growth of artificial intelligence (AI), the traditional von Neumann computing architecture based on complementary metal oxide semiconductor devices are facing memory wall and power wall. Memristor based in-memory computing can potentially overcome the current bottleneck of computer and achieve hardware breakthrough. In this review, the recent progress of memory devices in material and structure design, device performance and applications are summarized. Various resistive switching materials, including electrodes, binary oxides, perovskites, organics, and two-dimensional materials, are presented and their role in the memristor are discussed. Subsequently, the construction of shaped electrodes, the design of functional layer and other factors influencing the device performance are analyzed. We focus on the modulation of the resistances and the effective methods to enhance the performance. Furthermore, synaptic plasticity, optical-electrical properties, the fashionable applications in logic operation and analog calculation are introduced. Finally, some critical issues such as the resistive switching mechanism, multi-sensory fusion, system-level optimization are discussed.
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Affiliation(s)
- Yongyue Xiao
- Hubei Key Laboratory of Ferro-& Piezoelectric Materials and Devices, Faculty of Physics and Electronic Science, Hubei University, Wuhan, China
| | - Bei Jiang
- Hubei Key Laboratory of Ferro-& Piezoelectric Materials and Devices, Faculty of Physics and Electronic Science, Hubei University, Wuhan, China
| | - Zihao Zhang
- Hubei Key Laboratory of Ferro-& Piezoelectric Materials and Devices, Faculty of Physics and Electronic Science, Hubei University, Wuhan, China
| | - Shanwu Ke
- Hubei Key Laboratory of Ferro-& Piezoelectric Materials and Devices, Faculty of Physics and Electronic Science, Hubei University, Wuhan, China
| | - Yaoyao Jin
- Hubei Key Laboratory of Ferro-& Piezoelectric Materials and Devices, Faculty of Physics and Electronic Science, Hubei University, Wuhan, China
| | - Xin Wen
- Faculty of Chemical Technology and Engineering, West Pomeranian University of Technology in Szczecin, Szczecin, Poland
| | - Cong Ye
- Hubei Key Laboratory of Ferro-& Piezoelectric Materials and Devices, Faculty of Physics and Electronic Science, Hubei University, Wuhan, China
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11
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Wang S, Li Y, Wang D, Zhang W, Chen X, Dong D, Wang S, Zhang X, Lin P, Gallicchio C, Xu X, Liu Q, Cheng KT, Wang Z, Shang D, Liu M. Echo state graph neural networks with analogue random resistive memory arrays. NAT MACH INTELL 2023. [DOI: 10.1038/s42256-023-00609-5] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Track Full Text] [Journal Information] [Subscribe] [Scholar Register] [Indexed: 02/15/2023]
Abstract
AbstractRecent years have witnessed a surge of interest in learning representations of graph-structured data, with applications from social networks to drug discovery. However, graph neural networks, the machine learning models for handling graph-structured data, face significant challenges when running on conventional digital hardware, including the slowdown of Moore’s law due to transistor scaling limits and the von Neumann bottleneck incurred by physically separated memory and processing units, as well as a high training cost. Here we present a hardware–software co-design to address these challenges, by designing an echo state graph neural network based on random resistive memory arrays, which are built from low-cost, nanoscale and stackable resistors for efficient in-memory computing. This approach leverages the intrinsic stochasticity of dielectric breakdown in resistive switching to implement random projections in hardware for an echo state network that effectively minimizes the training complexity thanks to its fixed and random weights. The system demonstrates state-of-the-art performance on both graph classification using the MUTAG and COLLAB datasets and node classification using the CORA dataset, achieving 2.16×, 35.42× and 40.37× improvements in energy efficiency for a projected random resistive memory-based hybrid analogue–digital system over a state-of-the-art graphics processing unit and 99.35%, 99.99% and 91.40% reductions of backward pass complexity compared with conventional graph learning. The results point to a promising direction for next-generation artificial intelligence systems for graph learning.
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12
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A Ferroelectric Memristor-Based Transient Chaotic Neural Network for Solving Combinatorial Optimization Problems. Symmetry (Basel) 2022. [DOI: 10.3390/sym15010059] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Track Full Text] [Journal Information] [Subscribe] [Scholar Register] [Indexed: 12/28/2022] Open
Abstract
A transient chaotic neural network (TCNN) is particularly useful for solving combinatorial optimization problems, and its hardware implementation based on memristors has attracted great attention recently. Although previously used filamentary memristors could provide the desired nonlinearity for implementing the annealing function of a TCNN, the controllability of filamentary switching still remains relatively poor, thus limiting the performance of a memristor-based TCNN. Here, we propose to use ferroelectric memristor to implement the annealing function of a TCNN. In the ferroelectric memristor, the conductance can be tuned by switching the lattice non-centrosymmetry-induced polarization, which is a nonlinear switching mechanism with high controllability. We first establish a ferroelectric memristor model based on a ferroelectric tunnel junction (FTJ), which exhibits the polarization-modulated tunnel conductance and the nucleation-limited-switching (NLS) behavior. Then, the conductance of the ferroelectric memristor is used as the self-feedback connection weight that can be dynamically adjusted. Based on this, a ferroelectric memristor-based transient chaotic neural network (FM-TCNN) is further constructed and applied to solve the traveling salesman problem (TSP). In 1000 runs for 10-city TSP, the FM-TCNN achieves a shorter average path distance, a 32.8% faster convergence speed, and a 2.44% higher global optimal rate than the TCNN.
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13
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Bao H, Zhou H, Li J, Pei H, Tian J, Yang L, Ren S, Tong S, Li Y, He Y, Chen J, Cai Y, Wu H, Liu Q, Wan Q, Miao X. Toward memristive in-memory computing: principles and applications. FRONTIERS OF OPTOELECTRONICS 2022; 15:23. [PMID: 36637566 PMCID: PMC9756267 DOI: 10.1007/s12200-022-00025-4] [Citation(s) in RCA: 5] [Impact Index Per Article: 2.5] [Reference Citation Analysis] [Abstract] [Key Words] [Track Full Text] [Subscribe] [Scholar Register] [Received: 03/01/2022] [Accepted: 03/07/2022] [Indexed: 05/08/2023]
Abstract
With the rapid growth of computer science and big data, the traditional von Neumann architecture suffers the aggravating data communication costs due to the separated structure of the processing units and memories. Memristive in-memory computing paradigm is considered as a prominent candidate to address these issues, and plentiful applications have been demonstrated and verified. These applications can be broadly categorized into two major types: soft computing that can tolerant uncertain and imprecise results, and hard computing that emphasizes explicit and precise numerical results for each task, leading to different requirements on the computational accuracies and the corresponding hardware solutions. In this review, we conduct a thorough survey of the recent advances of memristive in-memory computing applications, both on the soft computing type that focuses on artificial neural networks and other machine learning algorithms, and the hard computing type that includes scientific computing and digital image processing. At the end of the review, we discuss the remaining challenges and future opportunities of memristive in-memory computing in the incoming Artificial Intelligence of Things era.
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Affiliation(s)
- Han Bao
- School of Integrated Circuits, School of Optical and Electronic Information, Wuhan National Laboratory for Optoelectronics, Optics Valley Laboratory, Huazhong University of Science and Technology, Wuhan, 430074 China
| | - Houji Zhou
- School of Integrated Circuits, School of Optical and Electronic Information, Wuhan National Laboratory for Optoelectronics, Optics Valley Laboratory, Huazhong University of Science and Technology, Wuhan, 430074 China
| | - Jiancong Li
- School of Integrated Circuits, School of Optical and Electronic Information, Wuhan National Laboratory for Optoelectronics, Optics Valley Laboratory, Huazhong University of Science and Technology, Wuhan, 430074 China
| | - Huaizhi Pei
- School of Integrated Circuits, School of Optical and Electronic Information, Wuhan National Laboratory for Optoelectronics, Optics Valley Laboratory, Huazhong University of Science and Technology, Wuhan, 430074 China
| | - Jing Tian
- School of Integrated Circuits, School of Optical and Electronic Information, Wuhan National Laboratory for Optoelectronics, Optics Valley Laboratory, Huazhong University of Science and Technology, Wuhan, 430074 China
| | - Ling Yang
- School of Integrated Circuits, School of Optical and Electronic Information, Wuhan National Laboratory for Optoelectronics, Optics Valley Laboratory, Huazhong University of Science and Technology, Wuhan, 430074 China
| | - Shengguang Ren
- School of Integrated Circuits, School of Optical and Electronic Information, Wuhan National Laboratory for Optoelectronics, Optics Valley Laboratory, Huazhong University of Science and Technology, Wuhan, 430074 China
| | - Shaoqin Tong
- School of Integrated Circuits, School of Optical and Electronic Information, Wuhan National Laboratory for Optoelectronics, Optics Valley Laboratory, Huazhong University of Science and Technology, Wuhan, 430074 China
| | - Yi Li
- School of Integrated Circuits, School of Optical and Electronic Information, Wuhan National Laboratory for Optoelectronics, Optics Valley Laboratory, Huazhong University of Science and Technology, Wuhan, 430074 China
- Hubei Yangtze Memory Laboratories, Wuhan, 430205 China
| | - Yuhui He
- School of Integrated Circuits, School of Optical and Electronic Information, Wuhan National Laboratory for Optoelectronics, Optics Valley Laboratory, Huazhong University of Science and Technology, Wuhan, 430074 China
- Hubei Yangtze Memory Laboratories, Wuhan, 430205 China
| | - Jia Chen
- AI Chip Center for Emerging Smart Systems, InnoHK Centers, Hong Kong Science Park, Hong Kong, China
| | - Yimao Cai
- School of Integrated Circuits, Peking University, Beijing, 100871 China
| | - Huaqiang Wu
- School of Integrated Circuits, Beijing National Research Center for Information Science and Technology (BNRist), Tsinghua University, Beijing, 100084 China
| | - Qi Liu
- Frontier Institute of Chip and System, Fudan University, Shanghai, 200433 China
| | - Qing Wan
- School of Electronic Science and Engineering, and Collaborative Innovation Centre of Advanced Microstructures, Nanjing University, Nanjing, 210093 China
| | - Xiangshui Miao
- School of Integrated Circuits, School of Optical and Electronic Information, Wuhan National Laboratory for Optoelectronics, Optics Valley Laboratory, Huazhong University of Science and Technology, Wuhan, 430074 China
- Hubei Yangtze Memory Laboratories, Wuhan, 430205 China
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14
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Sarwat SG, Kersting B, Moraitis T, Jonnalagadda VP, Sebastian A. Phase-change memtransistive synapses for mixed-plasticity neural computations. NATURE NANOTECHNOLOGY 2022; 17:507-513. [PMID: 35347271 DOI: 10.1038/s41565-022-01095-3] [Citation(s) in RCA: 17] [Impact Index Per Article: 8.5] [Reference Citation Analysis] [Abstract] [MESH Headings] [Track Full Text] [Subscribe] [Scholar Register] [Received: 05/23/2021] [Accepted: 01/12/2022] [Indexed: 06/14/2023]
Abstract
In the mammalian nervous system, various synaptic plasticity rules act, either individually or synergistically, over wide-ranging timescales to enable learning and memory formation. Hence, in neuromorphic computing platforms, there is a significant need for artificial synapses that can faithfully express such multi-timescale plasticity mechanisms. Although some plasticity rules have been emulated with elaborate complementary metal oxide semiconductor and memristive circuitry, device-level hardware realizations of long-term and short-term plasticity with tunable dynamics are lacking. Here we introduce a phase-change memtransistive synapse that leverages both the non-volatility of the phase configurations and the volatility of field-effect modulation for implementing tunable plasticities. We show that these mixed-plasticity synapses can enable plasticity rules such as short-term spike-timing-dependent plasticity that helps with the modelling of dynamic environments. Further, we demonstrate the efficacy of the memtransistive synapses in realizing accelerators for Hopfield neural networks for solving combinatorial optimization problems.
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15
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Lu Y, Li X, Yan B, Yan L, Zhang T, Song Z, Huang R, Yang Y. In-Memory Realization of Eligibility Traces Based on Conductance Drift of Phase Change Memory for Energy-Efficient Reinforcement Learning. ADVANCED MATERIALS (DEERFIELD BEACH, FLA.) 2022; 34:e2107811. [PMID: 34791712 DOI: 10.1002/adma.202107811] [Citation(s) in RCA: 2] [Impact Index Per Article: 1.0] [Reference Citation Analysis] [Abstract] [Key Words] [MESH Headings] [Track Full Text] [Subscribe] [Scholar Register] [Received: 09/29/2021] [Revised: 11/02/2021] [Indexed: 06/13/2023]
Abstract
Reinforcement learning (RL) has shown outstanding performance in handling complex tasks in recent years. Eligibility trace (ET), a fundamental and important mechanism in reinforcement learning, records critical states with attenuation and guides the update of policy, which plays a crucial role in accelerating the convergence of RL training. However, ET implementation on conventional digital computing hardware is energy hungry and restricted by the memory wall due to massive calculation of exponential decay functions. Here, in-memory realization of ET for energy-efficient reinforcement learning with outstanding performance in discrete- and continuous-state RL tasks is demonstrated. For the first time, the inherent conductance drift of phase change memory is exploited as physical decay function to realize in-memory eligibility trace, demonstrating excellent performance during RL training in various tasks. The spontaneous in-memory decay computing and storage of policy in the same phase change memory give rise to significantly enhanced energy efficiency compared with traditional graphics processing unit platforms. This work therefore provides a holistic energy and hardware efficient method for both training and inference of reinforcement learning.
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Affiliation(s)
- Yingming Lu
- Key Laboratory of Microelectronic Devices and Circuits (MOE), School of Integrated Circuits, Peking University, Beijing, 100871, China
| | - Xi Li
- Shanghai Key Laboratory of Nanofabrication Technology for Memory, Shanghai Institute of Micro-system and Information Technology, Chinese Academy of Sciences, Shanghai, 200050, China
| | - Bonan Yan
- Center for Brain Inspired Chips, Institute for Artificial Intelligence, Peking University, Beijing, 100871, China
| | - Longhao Yan
- Key Laboratory of Microelectronic Devices and Circuits (MOE), School of Integrated Circuits, Peking University, Beijing, 100871, China
| | - Teng Zhang
- Key Laboratory of Microelectronic Devices and Circuits (MOE), School of Integrated Circuits, Peking University, Beijing, 100871, China
| | - Zhitang Song
- Shanghai Key Laboratory of Nanofabrication Technology for Memory, Shanghai Institute of Micro-system and Information Technology, Chinese Academy of Sciences, Shanghai, 200050, China
| | - Ru Huang
- Key Laboratory of Microelectronic Devices and Circuits (MOE), School of Integrated Circuits, Peking University, Beijing, 100871, China
- Center for Brain Inspired Chips, Institute for Artificial Intelligence, Peking University, Beijing, 100871, China
- Center for Brain Inspired Intelligence, Chinese Institute for Brain Research (CIBR), Beijing, Beijing, 102206, China
| | - Yuchao Yang
- Key Laboratory of Microelectronic Devices and Circuits (MOE), School of Integrated Circuits, Peking University, Beijing, 100871, China
- Center for Brain Inspired Chips, Institute for Artificial Intelligence, Peking University, Beijing, 100871, China
- Center for Brain Inspired Intelligence, Chinese Institute for Brain Research (CIBR), Beijing, Beijing, 102206, China
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16
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Sebastian A, Das S, Das S. An Annealing Accelerator for Ising Spin Systems Based on In-Memory Complementary 2D FETs. ADVANCED MATERIALS (DEERFIELD BEACH, FLA.) 2022; 34:e2107076. [PMID: 34761447 DOI: 10.1002/adma.202107076] [Citation(s) in RCA: 4] [Impact Index Per Article: 2.0] [Reference Citation Analysis] [Abstract] [Key Words] [Track Full Text] [Subscribe] [Scholar Register] [Received: 09/07/2021] [Revised: 10/20/2021] [Indexed: 06/13/2023]
Abstract
Metaheuristic algorithms such as simulated annealing (SA) are often implemented for optimization in combinatorial problems, especially for discreet problems. SA employs a stochastic search, where high-energy transitions ("hill-climbing") are allowed with a temperature-dependent probability to escape local optima. Ising spin glass systems have properties such as spin disorder and "frustration" and provide a discreet combinatorial problem with a high number of metastable states and ground-state degeneracy. In this work, subthreshold Boltzmann transport is exploited in complementary 2D field-effect transistors (p-type WSe2 and n-type MoS2 ) integrated with an analog, nonvolatile, and programmable floating-gate memory stack to develop in-memory computing primitives necessary for energy- and area-efficient hardware acceleration of SA for Ising spin systems. Search acceleration of >800× is demonstrated for 4 × 4 ferromagnetic, antiferromagnetic, and spin glass systems using SA compared to an exhaustive search using a brute force trial at miniscule total energy expenditure of ≈120 nJ. The hardware-realistic numerical simulations further highlight the astounding benefits of SA in accelerating the search for larger spin lattices.
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Affiliation(s)
- Amritanand Sebastian
- Deparment of Engineering Science and Mechanics, Penn State University, University Park, PA, 16802, USA
| | - Sarbashis Das
- Department of Electrical Engineering, Penn State University, University Park, PA, 16802, USA
| | - Saptarshi Das
- Deparment of Engineering Science and Mechanics, Penn State University, University Park, PA, 16802, USA
- Department of Materials Science and Engineering, Penn State University, University Park, PA, 16802, USA
- Materials Research Institute, Pennsylvania State University, University Park, PA, 16802, USA
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17
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Zhou Y, Gao B, Zhang Q, Yao P, Geng Y, Li X, Sun W, Zhao M, Xi Y, Tang J, Qian H, Wu H. Application of mathematical morphology operation with memristor-based computation-in-memory architecture for detecting manufacturing defects. FUNDAMENTAL RESEARCH 2022; 2:123-130. [PMID: 38933903 PMCID: PMC11197732 DOI: 10.1016/j.fmre.2021.06.020] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Track Full Text] [Journal Information] [Subscribe] [Scholar Register] [Received: 04/24/2021] [Revised: 06/01/2021] [Accepted: 06/17/2021] [Indexed: 10/20/2022] Open
Abstract
Mathematical morphology operations are widely used in image processing such as defect analysis in semiconductor manufacturing and medical image analysis. These data-intensive applications have high requirements during hardware implementation that are challenging for conventional hardware platforms such as central processing units (CPUs) and graphics processing units (GPUs). Computation-in-memory (CIM) provides a possible solution for highly efficient morphology operations. In this study, we demonstrate the application of morphology operation with a novel memristor-based auto-detection architecture and demonstrate non-neuromorphic computation on a multi-array-based memristor system. Pixel-by-pixel logic computations with low parallelism are converted to parallel operations using memristors. Moreover, hardware-implemented computer-integrated manufacturing was used to experimentally demonstrate typical defect detection tasks in integrated circuit (IC) manufacturing and medical image analysis. In addition, we developed a new implementation scheme employing a four-layer network to realize small-object detection with high parallelism. The system benchmark based on the hardware measurement results showed significant improvement in the energy efficiency by approximately 358 times and 32 times more than when a CPU and GPU were employed, respectively, exhibiting the advantage of the proposed memristor-based morphology operation.
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Affiliation(s)
- Ying Zhou
- School of Integrated Circuits (SIC), Beijing Innovation Center for Future Chips (ICFC), Tsinghua University, Beijing, China
| | - Bin Gao
- School of Integrated Circuits (SIC), Beijing Innovation Center for Future Chips (ICFC), Tsinghua University, Beijing, China
- Beijing National Research Center for Information Science and Technology (BNRist), Tsinghua University, Beijing, China
| | - Qingtian Zhang
- School of Integrated Circuits (SIC), Beijing Innovation Center for Future Chips (ICFC), Tsinghua University, Beijing, China
| | - Peng Yao
- School of Integrated Circuits (SIC), Beijing Innovation Center for Future Chips (ICFC), Tsinghua University, Beijing, China
| | - Yiwen Geng
- School of Integrated Circuits (SIC), Beijing Innovation Center for Future Chips (ICFC), Tsinghua University, Beijing, China
| | - Xinyi Li
- School of Integrated Circuits (SIC), Beijing Innovation Center for Future Chips (ICFC), Tsinghua University, Beijing, China
| | - Wen Sun
- School of Integrated Circuits (SIC), Beijing Innovation Center for Future Chips (ICFC), Tsinghua University, Beijing, China
| | - Meiran Zhao
- School of Integrated Circuits (SIC), Beijing Innovation Center for Future Chips (ICFC), Tsinghua University, Beijing, China
| | - Yue Xi
- School of Integrated Circuits (SIC), Beijing Innovation Center for Future Chips (ICFC), Tsinghua University, Beijing, China
| | - Jianshi Tang
- School of Integrated Circuits (SIC), Beijing Innovation Center for Future Chips (ICFC), Tsinghua University, Beijing, China
- Beijing National Research Center for Information Science and Technology (BNRist), Tsinghua University, Beijing, China
| | - He Qian
- School of Integrated Circuits (SIC), Beijing Innovation Center for Future Chips (ICFC), Tsinghua University, Beijing, China
- Beijing National Research Center for Information Science and Technology (BNRist), Tsinghua University, Beijing, China
| | - Huaqiang Wu
- School of Integrated Circuits (SIC), Beijing Innovation Center for Future Chips (ICFC), Tsinghua University, Beijing, China
- Beijing National Research Center for Information Science and Technology (BNRist), Tsinghua University, Beijing, China
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18
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Caravelli F, Sheldon FC, Traversa FL. Global minimization via classical tunneling assisted by collective force field formation. SCIENCE ADVANCES 2021; 7:eabh1542. [PMID: 34936465 PMCID: PMC8694608 DOI: 10.1126/sciadv.abh1542] [Citation(s) in RCA: 1] [Impact Index Per Article: 0.3] [Reference Citation Analysis] [Abstract] [Grants] [Track Full Text] [Figures] [Subscribe] [Scholar Register] [Received: 02/19/2021] [Accepted: 11/05/2021] [Indexed: 06/14/2023]
Abstract
Simple elements interacting in networks can give rise to intricate emergent behaviors. Examples such as synchronization and phase transitions often apply in many contexts, as many different systems may reduce to the same effective model. Here, we demonstrate such a behavior in a model inspired by memristors. When weakly driven, the system is described by movement in an effective potential, but when strongly driven, instabilities cause escapes from local minima, which can be interpreted as an unstable tunneling mechanism. We dub this collective and nonperturbative effect a “Lyapunov force,” which steers the system toward the global minimum of the potential function, even if the full system has a constellation of equilibrium points growing exponentially with the system size. This mechanism is appealing for its physical relevance in nanoscale physics and for its possible applications in optimization, Monte Carlo schemes, and machine learning.
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Affiliation(s)
- Francesco Caravelli
- Theoretical Division (T4), Los Alamos National Laboratory, Los Alamos, NM 87545, USA
| | - Forrest C. Sheldon
- Theoretical Division (T4), Los Alamos National Laboratory, Los Alamos, NM 87545, USA
- Center for Nonlinear Studies, Los Alamos National Laboratory, Los Alamos, NM 87545, USA
- London Institute for Mathematical Sciences, 35a South St., London W1K 2XF, UK
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19
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Acharya SK, Galli E, Mallinson JB, Bose SK, Wagner F, Heywood ZE, Bones PJ, Arnold MD, Brown SA. Stochastic Spiking Behavior in Neuromorphic Networks Enables True Random Number Generation. ACS APPLIED MATERIALS & INTERFACES 2021; 13:52861-52870. [PMID: 34719914 DOI: 10.1021/acsami.1c13668] [Citation(s) in RCA: 6] [Impact Index Per Article: 2.0] [Reference Citation Analysis] [Abstract] [Key Words] [MESH Headings] [Track Full Text] [Subscribe] [Scholar Register] [Indexed: 06/13/2023]
Abstract
There is currently a great deal of interest in the use of nanoscale devices to emulate the behaviors of neurons and synapses and to facilitate brain-inspired computation. Here, it is shown that percolating networks of nanoparticles exhibit stochastic spiking behavior that is strikingly similar to that observed in biological neurons. The spiking rate can be controlled by the input stimulus, similar to "rate coding" in biology, and the distributions of times between events are log-normal, providing insights into the atomic-scale spiking mechanism. The stochasticity of the spiking behavior is then used for true random number generation, and the high quality of the generated random bit-streams is demonstrated, opening up promising routes toward integration of neuromorphic computing with secure information processing.
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Affiliation(s)
- Susant K Acharya
- The MacDiarmid Institute for Advanced Materials and Nanotechnology, School of Physical and Chemical Sciences, Te Kura Matu, University of Canterbury, Private Bag 4800, Christchurch 8140, New Zealand
| | - Edoardo Galli
- The MacDiarmid Institute for Advanced Materials and Nanotechnology, School of Physical and Chemical Sciences, Te Kura Matu, University of Canterbury, Private Bag 4800, Christchurch 8140, New Zealand
| | - Joshua B Mallinson
- The MacDiarmid Institute for Advanced Materials and Nanotechnology, School of Physical and Chemical Sciences, Te Kura Matu, University of Canterbury, Private Bag 4800, Christchurch 8140, New Zealand
| | - Saurabh K Bose
- The MacDiarmid Institute for Advanced Materials and Nanotechnology, School of Physical and Chemical Sciences, Te Kura Matu, University of Canterbury, Private Bag 4800, Christchurch 8140, New Zealand
| | - Ford Wagner
- The MacDiarmid Institute for Advanced Materials and Nanotechnology, School of Physical and Chemical Sciences, Te Kura Matu, University of Canterbury, Private Bag 4800, Christchurch 8140, New Zealand
| | - Zachary E Heywood
- Electrical and Computer Engineering, University of Canterbury, Private Bag 4800, Christchurch 8140, New Zealand
| | - Philip J Bones
- Electrical and Computer Engineering, University of Canterbury, Private Bag 4800, Christchurch 8140, New Zealand
| | - Matthew D Arnold
- School of Mathematical and Physical Sciences, University of Technology Sydney, P.O. Box 123, Broadway, Sydney, New South Wales 2007, Australia
| | - Simon A Brown
- The MacDiarmid Institute for Advanced Materials and Nanotechnology, School of Physical and Chemical Sciences, Te Kura Matu, University of Canterbury, Private Bag 4800, Christchurch 8140, New Zealand
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20
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Reconfigurable Stochastic neurons based on tin oxide/MoS 2 hetero-memristors for simulated annealing and the Boltzmann machine. Nat Commun 2021; 12:5710. [PMID: 34588444 PMCID: PMC8481256 DOI: 10.1038/s41467-021-26012-5] [Citation(s) in RCA: 2] [Impact Index Per Article: 0.7] [Reference Citation Analysis] [Abstract] [Track Full Text] [Download PDF] [Figures] [Journal Information] [Subscribe] [Scholar Register] [Received: 01/09/2021] [Accepted: 09/09/2021] [Indexed: 11/08/2022] Open
Abstract
Neuromorphic hardware implementation of Boltzmann Machine using a network of stochastic neurons can allow non-deterministic polynomial-time (NP) hard combinatorial optimization problems to be efficiently solved. Efficient implementation of such Boltzmann Machine with simulated annealing desires the statistical parameters of the stochastic neurons to be dynamically tunable, however, there has been limited research on stochastic semiconductor devices with controllable statistical distributions. Here, we demonstrate a reconfigurable tin oxide (SnOx)/molybdenum disulfide (MoS2) heterogeneous memristive device that can realize tunable stochastic dynamics in its output sampling characteristics. The device can sample exponential-class sigmoidal distributions analogous to the Fermi-Dirac distribution of physical systems with quantitatively defined tunable "temperature" effect. A BM composed of these tunable stochastic neuron devices, which can enable simulated annealing with designed "cooling" strategies, is conducted to solve the MAX-SAT, a representative in NP-hard combinatorial optimization problems. Quantitative insights into the effect of different "cooling" strategies on improving the BM optimization process efficiency are also provided.
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21
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Yang K, Joshua Yang J, Huang R, Yang Y. Nonlinearity in Memristors for Neuromorphic Dynamic Systems. SMALL SCIENCE 2021. [DOI: 10.1002/smsc.202100049] [Citation(s) in RCA: 16] [Impact Index Per Article: 5.3] [Reference Citation Analysis] [Track Full Text] [Journal Information] [Subscribe] [Scholar Register] [Indexed: 11/07/2022] Open
Affiliation(s)
- Ke Yang
- Department of Micro/nanoelectronics Peking University Beijing 100871 China
| | - J. Joshua Yang
- Electrical and Computer Engineering Department University of Southern California Los Angeles CA 90089 USA
| | - Ru Huang
- Department of Micro/nanoelectronics Peking University Beijing 100871 China
- Center for Brain Inspired Chips Institute for Artificial Intelligence Peking University Beijing 100871 China
- Center for Brain Inspired Intelligence Chinese Institute for Brain Research (CIBR) Beijing 102206 China
| | - Yuchao Yang
- Department of Micro/nanoelectronics Peking University Beijing 100871 China
- Center for Brain Inspired Chips Institute for Artificial Intelligence Peking University Beijing 100871 China
- Center for Brain Inspired Intelligence Chinese Institute for Brain Research (CIBR) Beijing 102206 China
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