Atomic-Scale Characterization of Graphene p-n Junctions for Electron-Optical Applications

Graphene p-n junctions offer a potentially powerful approach toward controlling electron trajectories via collimation and focusing in ballistic solid-state devices. The ability of p-n junctions to control electron trajectories depends crucially on the doping profile and roughness of the junction. Here, we use four-probe scanning tunneling microscopy and spectroscopy (STM/STS) to characterize two state-of-the-art graphene p-n junction geometries at the atomic scale, one with CMOS polySi gates and another with naturally cleaved graphite gates. Using spectroscopic imaging, we characterize the local doping profile across and along the p-n junctions. We find that realistic junctions exhibit non-ideality both in their geometry as well as in the doping profile across the junction. We show that the geometry of the junction can be improved by using the cleaved edge of van der Waals metals such as graphite to define the junction. We quantify the geometric roughness and doping profiles of junctions experimentally and use these parameters in non-equilibrium Green's function-based simulations of focusing and collimation in these realistic junctions. We find that for realizing Veselago focusing, it is crucial to minimize lateral interface roughness which only natural graphite gates achieve and to reduce junction width, in which both devices under investigation underperform. We also find that carrier collimation is currently limited by the non-linearity of the doping profile across the junction. Our work provides benchmarks of the current graphene p-n junction quality and provides guidance for future improvements.

MoS2 Field-Effect Transistor with Sub-10 nm Channel Length

Atomically thin molybdenum disulfide (MoS₂) is an ideal semiconductor material for field-effect transistors (FETs) with sub-10 nm channel lengths. The high effective mass and large bandgap of MoS₂ minimize direct source-drain tunneling, while its atomically thin body maximizes the gate modulation efficiency in ultrashort-channel transistors. However, no experimental study to date has approached the sub-10 nm scale due to the multiple challenges related to nanofabrication at this length scale and the high contact resistance traditionally observed in MoS₂ transistors. Here, using the semiconducting-to-metallic phase transition of MoS₂, we demonstrate sub-10 nm channel-length transistor fabrication by directed self-assembly patterning of mono- and trilayer MoS₂. This is done in a 7.5 nm half-pitch periodic chain of transistors where semiconducting (2H) MoS₂ channel regions are seamlessly connected to metallic-phase (1T') MoS₂ access and contact regions. The resulting 7.5 nm channel-length MoS₂ FET has a low off-current of 10 pA/μm, an on/off current ratio of >10⁷, and a subthreshold swing of 120 mV/dec. The experimental results presented in this work, combined with device transport modeling, reveal the remarkable potential of 2D MoS₂ for future sub-10 nm technology nodes.

Chiral tunneling of topological states: towards the efficient generation of spin current using spin-momentum locking

We show that the interplay between chiral tunneling and spin-momentum locking of helical surface states leads to spin amplification and filtering in a 3D topological insulator (TI). Our calculations show that the chiral tunneling across a TI pn junction allows normally incident electrons to transmit, while the rest are reflected with their spins flipped due to spin-momentum locking. The net result is that the spin current is enhanced while the dissipative charge current is simultaneously suppressed, leading to an extremely large, gate-tunable spin-to-charge current ratio (∼20) at the reflected end. At the transmitted end, the ratio stays close to 1 and the electrons are completely spin polarized.

Manipulating chiral transmission by gate geometry: switching in graphene with transmission gaps

We explore the chiral transmission of electrons across graphene heterojunctions for electronic switching using gate geometry alone. A sequence of gates is used to collimate and orthogonalize the chiral transmission lobes across multiple junctions, resulting in negligible overall current. The resistance of the device is enhanced by several orders of magnitude by biasing the gates into the bipolar npn doping regime, even as the ON state in the homogeneous nnn regime remains highly conductive. The mobility is preserved because the switching involves the suppression of transmission over a range of energy (transmission gap) instead of a structural band gap that would reduce the number of available channels of conduction. Under a different biasing scheme (npn to npp), this transmission gap can be made highly gate tunable, allowing a subthermal turn-on that beats the Landauer bound on switching energy, limiting present-day digital electronics.