Switching synchronization in one-dimensional memristive networks: An exact solution

We study a switching synchronization phenomenon taking place in one-dimensional memristive networks when the memristors switch from the high- to low-resistance state. It is assumed that the distributions of threshold voltages and switching rates of memristors are arbitrary. Using the Laplace transform, a set of nonlinear equations describing the memristors dynamics is solved exactly, without any approximations. The time dependencies of memristances are found, and it is shown that the voltage falls across memristors are proportional to their threshold voltages. A compact expression for the network switching time is derived.

Nanoscale Tipping Bucket Effect in a Quantum Dot Transistor-Based Counter

Electronic circuits composed of one or more elements with inherent memory, that is, memristors, memcapacitors, and meminductors, offer lower circuit complexity and enhanced functionality for certain computational tasks. Networks of these elements are proposed for novel computational paradigms that rely on information processing and storage on the same physical platform. We show a nanoscaled memdevice able to act as an electronic analogue of tipping buckets that allows reducing the dimensionality and complexity of a sensing problem by transforming it into a counting problem. The device offers a well adjustable, tunable, and reliable periodic reset that is controlled by the amounts of transferred quantum dot charges per gate voltage sweep. When subjected to periodic voltage sweeps, the quantum dot (bucket) may require up to several sweeps before a rapid full discharge occurs thus displaying period doubling, period tripling, and so on between self-governing reset operations.

Computing with volatile memristors: an application of non-pinched hysteresis

The possibility of in-memory computing with volatile memristive devices, namely, memristors requiring a power source to sustain their memory, is demonstrated theoretically. We have adopted a hysteretic graphene-based field emission structure as a prototype of a volatile memristor, which is characterized by a non-pinched hysteresis loop. A memristive model of the structure is developed and used to simulate a polymorphic circuit implementing stateful logic gates, such as the material implication. Specific regions of parameter space realizing useful logic functions are identified. Our results are applicable to other realizations of volatile memory devices, such as certain NEMS switches.

Memcomputing with membrane memcapacitive systems

We show theoretically that networks of membrane memcapacitive systems-capacitors with memory made out of membrane materials-can be used to perform a complete set of logic gates in a massively parallel way by simply changing the external input amplitudes, but not the topology of the network. This polymorphism is an important characteristic of memcomputing (computing with memories) that closely reproduces one of the main features of the brain. A practical realization of these membrane memcapacitive systems, using, e.g., graphene or other 2D materials, would be a step forward towards a solid-state realization of memcomputing with passive devices.

Dynamic computing random access memory

The present von Neumann computing paradigm involves a significant amount of information transfer between a central processing unit and memory, with concomitant limitations in the actual execution speed. However, it has been recently argued that a different form of computation, dubbed memcomputing (Di Ventra and Pershin 2013 Nat. Phys. 9 200-2) and inspired by the operation of our brain, can resolve the intrinsic limitations of present day architectures by allowing for computing and storing of information on the same physical platform. Here we show a simple and practical realization of memcomputing that utilizes easy-to-build memcapacitive systems. We name this architecture dynamic computing random access memory (DCRAM). We show that DCRAM provides massively-parallel and polymorphic digital logic, namely it allows for different logic operations with the same architecture, by varying only the control signals. In addition, by taking into account realistic parameters, its energy expenditures can be as low as a few fJ per operation. DCRAM is fully compatible with CMOS technology, can be realized with current fabrication facilities, and therefore can really serve as an alternative to the present computing technology.