Fermi Level Pinning at Electrical Metal Contacts of Monolayer Molybdenum Dichalcogenides

Exploring the Surface Oxidation and Environmental Instability of 2H-/1T'-MoTe2 Using Field Emission-Based Scanning Probe Lithography

An unconventional approach for the resistless nanopatterning 2H- and 1T'-MoTe2 by means of scanning probe lithography is presented. A Fowler-Nordheim tunneling current of low energetic electrons (E = 30-60 eV) emitted from the tip of an atomic force microscopy (AFM) cantilever is utilized to induce a nanoscale oxidation on a MoTe2 nanosheet surface under ambient conditions. Due to the water solubility of the generated oxide, a direct pattern transfer into the MoTe2 surface can be achieved by a simple immersion of the sample in deionized water. The tip-grown oxide is characterized using Auger electron and Raman spectroscopy, revealing it consists of amorphous MoO3 /MoOx as well as TeO2 /TeOx . With the presented technology in combination with subsequent AFM imaging it is possible to demonstrate a strong anisotropic sensitivity of 1T'-/(Td )-MoTe2 to aqueous environments. Finally the discussed approach is used to structure a nanoribbon field effect transistor out of a few-layer 2H-MoTe2 nanosheet.

Physical vapor deposition-free scalable high-efficiency electrical contacts to MoS2

Fermi-level pinning caused by the kinetic damage during metallization has been recognized as one of the major reasons for the non-ideal behavior of electrical contacts, forbidding reaching the Schottky-Mott limit. In this manuscript, we present a scalable technique wherein Indium, a low-work-function metal, is diffused to contact a few-layered MoS2flake. The technique exploits a smooth outflow of Indium over gold electrodes to make edge contacts to pre-transferred MoS2flakes. We compare the performance of three pairs of contacts made onto the same MoS2flake, the bottom-gold, top-gold, and Indium contacts, and find that the Indium contacts are superior to other contacts. The Indium contacts maintain linearI-Vcharacteristics down to cryogenic temperatures with an extracted Schottky barrier height of ∼2.1 meV. First-principle calculations show the induced in-gap states close to the Fermi level, and the damage-free contact interface could be the reason for the nearly Ohmic behavior of the Indium/MoS2interface.

Manipulation of the electrical and memory properties of MoS2 field-effect transistors by highly charged ion irradiation

Field-effect transistors based on molybdenum disulfide (MoS2) exhibit a hysteresis in their transfer characteristics, which can be utilized to realize 2D memory devices. This hysteresis has been attributed to charge trapping due to adsorbates, or defects either in the MoS2 lattice or in the underlying substrate. We fabricated MoS2 field-effect transistors on SiO2/Si substrates, irradiated these devices with Xe30+ ions at a kinetic energy of 180 keV to deliberately introduce defects and studied the resulting changes of their electrical and hysteretic properties. We find clear influences of the irradiation: while the charge carrier mobility decreases linearly with increasing ion fluence (up to only 20% of its initial value) the conductivity actually increases again after an initial drop of around two orders of magnitude. We also find a significantly reduced n-doping (≈1012 cm-2) and a well-developed hysteresis after the irradiation. The hysteresis height increases with increasing ion fluence and enables us to characterize the irradiated MoS2 field-effect transistor as a memory device with remarkably longer relaxation times (≈ minutes) compared to previous works.

Self-Driven Gr/WSe2/Gr Photodetector with High Performance Based on Asymmetric Schottky van der Waals Contacts

Two-dimensional (2D) self-driven photodetectors have a wide range of applications in wearable, imaging, and flexible electronics. However, the preparation of most self-powered photodetectors is still complex and time-consuming. Simultaneously, the constant work function of a metal, numerous defects, and a large Schottky barrier at the 2D/metal interface hinder the transmission and collection of optical carriers, which will suppress the optical responsivity of the device. This paper proposed a self-driven graphene/WSe2/graphene (Gr/WSe2/Gr) photodetector with asymmetric Schottky van der Waals (vdWs) contacts. The vdWs contacts are formed by transferring Gr as electrodes using the dry-transfer method, obviating the limitations of defects and Fermi-level pinning at the interface of electrodes made by conventional metal deposition methods to a great extent and resulting in superior dynamic response, which leads to a more efficient and faster collection of photogenerated carriers. This work also demonstrates that the significant surface potential difference of Gr electrodes is a crucial factor to ensure their superior performance. The self-driven Gr/WSe2/Gr photodetector exhibits an ultrahigh Ilight/Idark ratio of 106 with a responsivity value of 20.31 mA/W and an open-circuit voltage of 0.37 V at zero bias. The photodetector also has ultrafast response speeds of 42.9 and 56.0 μs. This paper provides a feasible way to develop self-driven optoelectronic devices with a simple structure and excellent performance.

Engineering electrode interfaces for telecom-band photodetection in MoS2/Au heterostructures via sub-band light absorption

Transition metal dichalcogenide (TMD) layered semiconductors possess immense potential in the design of photonic, electronic, optoelectronic, and sensor devices. However, the sub-bandgap light absorption of TMD in the range from near-infrared (NIR) to short-wavelength infrared (SWIR) is insufficient for applications beyond the bandgap limit. Herein, we report that the sub-bandgap photoresponse of MoS2/Au heterostructures can be robustly modulated by the electrode fabrication method employed. We observed up to 60% sub-bandgap absorption in the MoS2/Au heterostructure, which includes the hybridized interface, where the Au layer was applied via sputter deposition. The greatly enhanced absorption of sub-bandgap light is due to the planar cavity formed by MoS2 and Au; as such, the absorption spectrum can be tuned by altering the thickness of the MoS2 layer. Photocurrent in the SWIR wavelength range increases due to increased absorption, which means that broad wavelength detection from visible toward SWIR is possible. We also achieved rapid photoresponse (~150 µs) and high responsivity (17 mA W-1) at an excitation wavelength of 1550 nm. Our findings demonstrate a facile method for optical property modulation using metal electrode engineering and for realizing SWIR photodetection in wide-bandgap 2D materials.

Self-Aligned Top-Gate Structure in High-Performance 2D p-FETs via van der Waals Integration and Contact Spacer Doping

The potential of 2D materials in future CMOS technology is hindered by the lack of high-performance p-type field effect transistors (p-FETs). While utilization of the top-gate (TG) structure with a p-doped spacer area offers a solution to this challenge, the design and device processing to form gate stacks pose serious challenges in realization of ideal p-FETs and PMOS inverters. This study presents a novel approach to address these challenges by fabricating lateral p+-p-p+ junction WSe2 FETs with self-aligned TG stacks in which desired junction is formed by van der Waals (vdW) integration and selective oxygen plasma-doping into spacer regions. The exceptional electrostatic controllability with a high on/off current ratio and small subthreshold swing (SS) of plasma doped p-FETs is achieved with the self-aligned metal/hBN gate stacks. To demonstrate the effectiveness of our approach, we construct a PMOS inverter using this device architecture, which exhibits a remarkably low power consumption of approximately 4.5 nW.

Epitaxial van der Waals contacts of 2D TaSe2-WSe2 metal-semiconductor heterostructures

The electronic contact between two-dimensional (2D) transition metal dichalcogenide (TMD) semiconductors and metal electrodes is a formidable challenge due to the undesired Schottky barrier, which severely limits the electrical performance of TMD devices and impedes the exploration of their unconventional physical properties and potential electronic applications. In this study, we report a two-step chemical vapor deposition (CVD) growth of 2D TaSe2-WSe2 metal-semiconductor heterostructures. Raman mapping confirms the precise spatial modulation of the as-grown 2D TaSe2-WSe2 heterostructures. Transmission electron microscopy (TEM) characterization reveals that this two-step method provides a high-quality and clean interface of the 2D TaSe2-WSe2 heterostructures. Meanwhile, the upper 1T-TaSe2 is formed heteroepitaxially on/around the pre-synthesized 2H-WSe2 monolayers, exhibiting an epitaxial relationship of (20-20)TaSe2//(20-20)WSe2 and [0001]TaSe2//[0001]WSe2. Furthermore, characterization studies using a Kelvin probe force microscope (KPFM) and electrical transport measurements present compelling evidence that the 2D metal-semiconductor heterostructures under investigation can improve the performance of electrical devices. These results bear substantial significance in augmenting the properties of field-effect transistors (FETs), leading to notable improvements in FET mobility and on/off ratio. Our study not only broadens the horizons of direct growth of high-quality 2D metal-semiconductor heterostructures but also sheds light on potential applications in future high-performance integrated circuits.

Probing charge traps at the 2D semiconductor/dielectric interface

The family of 2-dimensional (2D) semiconductors is a subject of intensive scientific research due to their potential in next-generation electronics. While offering many unique properties like atomic thickness and chemically inert surfaces, the integration of 2D semiconductors with conventional dielectric materials is challenging. The charge traps at the semiconductor/dielectric interface are among many issues to be addressed before these materials can be of industrial relevance. Conventional electrical characterization methods remain inadequate to quantify the traps at the 2D semiconductor/dielectric interface since the estimations of the density of interface traps, Dit, by different techniques may yield more than an order-of-magnitude discrepancy, even when extracted from the same device. Therefore, the challenge to quantify Dit at the 2D semiconductor/dielectric interface is about finding an accurate and reliable measurement method. In this review, we discuss characterization techniques which have been used to study the 2D semiconductor/dielectric interface. Specifically, we discuss the methods based on small-signal AC measurements, subthreshold slope measurements and low-frequency noise measurements. While these approaches were developed for silicon-based technology, 2D semiconductor devices possess a set of unique challenges requiring a careful re-evaluation when using these characterization techniques. We examine the conventional methods based on their efficacy and accuracy in differentiating various types of trap states and provide guidance to find an appropriate method for charge trap analysis and estimation of Dit at 2D semiconductor/dielectric interfaces.

Temperature-Dependent Conduction and Photoresponse in Few-Layer ReS2

The electrical behavior and the photoresponse of rhenium disulfide field-effect transistors (FETs) have been widely studied; however, only a few works have investigated the photocurrent as a function of temperature. In this paper, we perform the electrical characterization of few-layer ReS2-based FETs with Cr-Au contacts over a wide temperature range. We exploit the temperature-dependent transfer and output characteristics to estimate the effective Schottky barrier at the Cr-Au/ReS2 interface and to investigate the temperature behavior of parameters, such as the threshold voltage, carrier concentration, mobility, and subthreshold swing. Through time-resolved photocurrent measurements, we show that the photocurrent increases with temperature and exhibits a linear dependence on the incident light power at both low and room temperatures and a longer rise/decay time at higher temperatures. We surmise that the photocurrent is affected by the photobolometric effect and light-induced desorption of adsorbates which are facilitated by the high temperature and the low pressure.

Investigating charge traps in MoTe2field-effect transistors: SiO2insulator traps and MoTe2bulk traps

Two-dimensional material-based field-effect transistors are promising for future use in electronic and optoelectronic applications. However, trap states existing in the transistors are known to hinder device performance. They capture/release carriers in the channel and lead to hysteresis in the transfer characteristics. In this work, we fabricated MoTe2field-effect transistors on two different gate dielectrics, SiO2and h-BN, and investigated temperature-dependent charge trapping behavior on the hysteresis in their transfer curves. We observed that devices with SiO2back-gate dielectric are affected by both SiO2insulator traps and MoTe2intrinsic bulk traps, with the latter becoming prominent at temperatures above 310 K. Conversely, devices with h-BN back-gate dielectric, which host a negligible number of insulator traps, primarily exhibit MoTe2bulk traps at high temperatures, enabling us to estimate the trap energy level at 389 meV below the conduction band edge. A similar energy level of 396 meV below the conduction band edge was observed from the emission current transient measurement. From a previous computational study, we expect these trap states to be the tellurium vacancy. Our results suggest that charge traps in MoTe2field-effect transistors can be reduced by careful selection of gate insulators, thus providing guidelines for device fabrication.

Origins of Fermi Level Pinning for Ni and Ag Metal Contacts on Tungsten Dichalcogenides

Tungsten transition metal dichalcogenides (W-TMDs) are intriguing due to their properties and potential for application in next-generation electronic devices. However, strong Fermi level (EF) pinning manifests at the metal/W-TMD interfaces, which could tremendously restrain the carrier injection into the channel. In this work, we illustrate the origins of EF pinning for Ni and Ag contacts on W-TMDs by considering interface chemistry, band alignment, impurities, and imperfections of W-TMDs, contact metal adsorption mechanism, and the resultant electronic structure. We conclude that the origins of EF pinning at a covalent contact metal/W-TMD interface, such as Ni/W-TMDs, can be attributed to defects, impurities, and interface reaction products. In contrast, for a van der Waals contact metal/TMD system such as Ag/W-TMDs, the primary factor responsible for EF pinning is the electronic modification of the TMDs resulting from the defects and impurities with the minor impact of metal-induced gap states. The potential strategies for carefully engineering the metal deposition approach are also discussed. This work unveils the origins of EF pinning at metal/TMD interfaces experimentally and theoretically and provides guidance on further enhancing and improving the device performance.

One-Step Passivation of Both Sulfur Vacancies and SiO2 Interface Traps of MoS2 Device

Transition metal dichalcogenides (TMDs) benefit electrical devices with spin-orbit coupling and valley- and topology-related properties. However, TMD-based devices suffer from traps arising from defect sites inside the channel and the gate oxide interface. Deactivating them requires independent treatments, because the origins are dissimilar. This study introduces a single treatment to passivate defects in a multilayer MoS2 FET. By applying back-gate bias, protons from an H-TFSI droplet are injected into the MoS2, penetrating deeply enough to reach the SiO2 gate oxide. The characterizations employing low-temperature transport and deep-level transient spectroscopy (DLTS) studies reveal that the trap density of S vacancies in MoS2 drops to the lowest detection level. The temperature-dependent mobility plot on the SiO2 substrate resembles that of the h-BN substrate, implying that dangling bonds in SiO2 are passivated. The carrier mobility on the SiO2 substrate is enhanced by approximately 2200% after the injection.

Fabrication of a Field-Effect Transistor Based on 2D Novel Ternary Chalcogenide PdPS

Two-dimensional (2D) palladium phosphide sulfide (PdPS) has garnered significant attention, owing to its exotic physical properties originating from the distinct Cairo pentagonal tiling topology. Nevertheless, the properties of PdPS remain unexplored, especially for electronic devices. In this study, we introduce the thickness-dependent electrical characteristics of PdPS flakes into fabricated field-effect transistors (FETs). The broad thickness variation of the PdPS flakes, ranging from 0.7-306 nm, is prepared by mechanical exfoliation, utilizing large bulk crystals synthesized via chemical vapor transport. We evaluate this variation and confirm a high electron mobility of 14.4 cm2 V-1 s-1 and Ion/Ioff > 107. Furthermore, the 6.8 nm-thick PdPS FET demonstrates a negligible Schottky barrier height at the gold electrode contact, as evidenced by the measurement of the temperature-dependent transfer characteristics. Consequently, we adjusted the Fowler-Nordheim tunneling mechanism to elucidate the charge-transport mechanism, revealing a modulated mobility variation from 14.4 to 41.2 cm2 V-1 s-1 with an increase in the drain voltage from 1 to 5 V. The present findings can broaden the understanding of the unique properties of PdPS, highlighting its potential as a 2D ternary chalcogenide in future electronic device applications.

Nitrogen Pretreatment of Growth Substrates for Vacancy-Saturated MoS2

Two-dimensional transition-metal dichalcogenides (2D TMDCs) are considered promising materials for optoelectronics due to their unique optical and electric properties. However, their potential has been limited by the occurrence of atomic vacancies during synthesis. While post-treatment processes have demonstrated the passivation of such vacancies, they increase process complexity and affect the TMDC's quality. We here introduce the concept of pretreatment as a facile and powerful route to solve the problem of vacancies in MoS2. Low-temperature nitridation of the sapphire substrate prior to growth provides a nondestructive method to MoS2 modification without introducing new processing steps or increasing the thermal budget. Spectroscopic characterization and atomic-resolution microscopy reveal the incorporation of nitrogen from the sapphire surface layer into chalcogen vacancies. The resulting MoS2 with nitrogen-saturated defects shows a decrease in midgap states and more intrinsic doping as confirmed by ab initio calculations and optoelectronic measurements. The demonstrated pretreatment method opens up new routes toward future, high-performance 2D electronics, as evidenced by a 3-fold reduction in contact resistance and a 10-fold improved performance of 2D photodetectors.

Realizing On/Off Ratios over 104 for Sub-2 nm Vertical Transistors

Vertical transistors hold promise for the development of ultrascaled transistors. However, their on/off ratios are limited by a strong source-drain tunneling current in the off state, particularly for vertical devices with a sub-5 nm channel length. Here, we report an approach for suppressing the off-state tunneling current by designing the barrier height via a van der Waals metal contact. Via lamination of the Pt electrode on a MoS2 vertical transistor, a high Schottky barrier is observed due to their large work function difference, thus suppressing direct tunneling currents. Meanwhile, this "low-energy" lamination process ensures an optimized metal/MoS2 interface with minimized interface states and defects. Together, the highest on/off ratios of 5 × 105 and 104 are realized in vertical transistors with 5 and 2 nm channel lengths, respectively. Our work not only pushes the on/off ratio limit of vertical transistors but also provides a general rule for reducing short-channel effects in ultrascaled devices.

ALD-grown two-dimensional TiSx metal contacts for MoS2 field-effect transistors

Metal contacts to MoS2 field-effect transistors (FETs) play a determinant role in the device electrical characteristics and need to be chosen carefully. Because of the Schottky barrier (SB) and the Fermi level pinning (FLP) effects that occur at the contact/MoS2 interface, MoS2 FETs often suffer from high contact resistance (Rc). One way to overcome this issue is to replace the conventional 3D bulk metal contacts with 2D counterparts. Herein, we investigate 2D metallic TiSx (x ∼ 1.8) as top contacts for MoS2 FETs. We employ atomic layer deposition (ALD) for the synthesis of both the MoS2 channels as well as the TiSx contacts and assess the electrical performance of the fabricated devices. Various thicknesses of TiSx are grown on MoS2, and the resultant devices are electrically compared to the ones with the conventional Ti metal contacts. Our findings show that the replacement of 5 nm Ti bulk contacts with only ∼1.2 nm of 2D TiSx is beneficial in improving the overall device metrics. With such ultrathin TiSx contacts, the ON-state current (ION) triples and increases to ∼35 μA μm-1. Rc also reduces by a factor of four and reaches ∼5 MΩ μm. Such performance enhancements were observed despite the SB formed at the TiSx/MoS2 interface is believed to be higher than the SB formed at the Ti/MoS2 interface. These device metric improvements could therefore be mainly associated with an increased level of electrostatic doping in MoS2, as a result of using 2D TiSx for contacting the 2D MoS2. Our findings are also well supported by TCAD device simulations.

Low Ohmic contact resistance and high on/off ratio in transition metal dichalcogenides field-effect transistors via residue-free transfer

Beyond-silicon technology demands ultrahigh performance field-effect transistors. Transition metal dichalcogenides provide an ideal material platform, but the device performances such as the contact resistance, on/off ratio and mobility are often limited by the presence of interfacial residues caused by transfer procedures. Here, we show an ideal residue-free transfer approach using polypropylene carbonate with a negligible residue coverage of ~0.08% for monolayer MoS2 at the centimetre scale. By incorporating a bismuth semimetal contact with an atomically clean monolayer MoS2 field-effect transistor on hexagonal boron nitride substrate, we obtain an ultralow Ohmic contact resistance of ~78 Ω µm, approaching the quantum limit, and a record-high on/off ratio of ~1011 at 15 K. Such an ultra-clean fabrication approach could be the ideal platform for high-performance electrical devices using large-area semiconducting transition metal dichalcogenides.

Forming Stable van der Waals Contacts between Metals and 2D Semiconductors

High-performing 2D electrical and optical devices can be realized by forming an ideal van der Waals (vdW) metal contact with weak interactions and stable interface states. However, the methods for applying metal contacts while avoiding damage from metal deposition present challenges in realizing a uniform, stable vdW interface. To overcome this problem, this study develops a method for forming vdW contacts using a sacrificial Se buffer layer. This study explores this method by investigating the difference in the Schottky barrier height between the vdW metal contact deposited using a buffer layer, a transferred metal contact, and a conventional directly deposited metal contact using rectification and photovoltaic characteristics of a Schottky diode structure with graphite. Evidently, the Se buffer layer method forms the most stable and ideal vdW contact while preventing Fermi-level pinning. A tungsten diselenide Schottky diode fabricated using these vdW contacts with Au and graphite as the top and bottom electrodes, respectively, exhibits excellent operation with an ideality factor of ≈1, an on/off ratio of > 107 , and coherent properties. Additionally, when using only the vdW Au contact, the electrical and optical properties of the device can be minutely modulated by changing the structure of the Schottky diode.

Mechanistic understanding of the interfacial properties of metal-PtSe2 contacts

With the advantages of a moderate band gap, high carrier mobility and good environmental stability, two-dimensional (2D) semiconductors show promising applications in next-generation electronics. However, the accustomed metal-2D semiconductor contact may lead to a strong Fermi level pinning (FLP) effect, which severely limits the practical performance of 2D electronics. Herein, the interfacial properties of the contacts between a promising 2D semiconductor, PtSe2, and a sequence of metal electrodes are systematically investigated. The strong interfacial interactions formed in all metal-PtSe2 contacts lead to chemical bonds and a significant interfacial dipole, resulting in a vertical Schottky barrier for Ag, Au, Pd and Pt-based systems and a lateral Schottky barrier for Al, Cu, Sc and Ti-based systems, with a strong FLP effect. Remarkably, the tunneling probability for most metal-PtSe2 is significantly high and the tunneling-specific resistivity is two orders of magnitude lower than that of the state-of-the-art contacts, demonstrating the high efficiency for electron injection from metals to PtSe2. Moreover, the introduction of h-BN as a buffer layer leads to a weakened FLP effect (S = 0.50) and the transformation into p-type Schottky contact for Pt-PtSe2 contacts. These results reveal the underlying mechanism of the interfacial properties of metal-PtSe2 contacts, which is useful for designing advanced 2D semiconductor-based electronics.

Fabrication of p-type 2D single-crystalline transistor arrays with Fermi-level-tuned van der Waals semimetal electrodes

High-performance p-type two-dimensional (2D) transistors are fundamental for 2D nanoelectronics. However, the lack of a reliable method for creating high-quality, large-scale p-type 2D semiconductors and a suitable metallization process represents important challenges that need to be addressed for future developments of the field. Here, we report the fabrication of scalable p-type 2D single-crystalline 2H-MoTe2 transistor arrays with Fermi-level-tuned 1T'-phase semimetal contact electrodes. By transforming polycrystalline 1T'-MoTe2 to 2H polymorph via abnormal grain growth, we fabricated 4-inch 2H-MoTe2 wafers with ultra-large single-crystalline domains and spatially-controlled single-crystalline arrays at a low temperature (~500 °C). Furthermore, we demonstrate on-chip transistors by lithographic patterning and layer-by-layer integration of 1T' semimetals and 2H semiconductors. Work function modulation of 1T'-MoTe2 electrodes was achieved by depositing 3D metal (Au) pads, resulting in minimal contact resistance (~0.7 kΩ·μm) and near-zero Schottky barrier height (~14 meV) of the junction interface, and leading to high on-state current (~7.8 μA/μm) and on/off current ratio (~105) in the 2H-MoTe2 transistors.

Overcoming the Fermi-Level Pinning Effect in the Nanoscale Metal and Silicon Interface

Silicon-based photodetectors are attractive as low-cost and environmentally friendly optical sensors. Also, their compatibility with complementary metal-oxide-semiconductor (CMOS) technology is advantageous for the development of silicon photonics systems. However, extending optical responsivity of silicon-based photodetectors to the mid-infrared (mid-IR) wavelength range remains challenging. In developing mid-IR infrared Schottky detectors, nanoscale metals are critical. Nonetheless, one key factor is the Fermi-level pinning effect at the metal/silicon interface and the presence of metal-induced gap states (MIGS). Here, we demonstrate the utilization of the passivated surface layer on semiconductor materials as an insulating material in metal-insulator-semiconductor (MIS) contacts to mitigate the Fermi-level pinning effect. The removal of Fermi-level pinning effectively reduces the Schottky barrier height by 12.5% to 16%. The demonstrated devices exhibit a high responsivity of up to 234 μA/W at a wavelength of 2 μm, 48.2 μA/W at 3 μm, and 1.75 μA/W at 6 μm. The corresponding detectivities at 2 and 3 μm are 1.17 × 108 cm Hz1/2 W-1 and 2.41 × 107 cm Hz1/2 W-1, respectively. The expanded sensing wavelength range contributes to the application development of future silicon photonics integration platforms.

Transition from Schottky to ohmic contacts in the C31 and MoS2 van der Waals heterostructure

The utilization of conventional metal contacts has restricted the industrial implementation of two-dimensional channel materials. To address this issue, we conducted first-principles calculations to investigate the interface properties of C₃₁ and MoS₂ contacts. An ohmic contact and a low van der Waals barrier were found in the C₃₁/MoS₂ heterostructure. Our findings provide a promising new contact metal material for two-dimensional nanodevices based on MoS₂.

Oxygen-Induced Barrier Lowering for High-Performance Organic Field-Effect Transistors

Organic field-effect transistors (OFETs) have the advantages of low-cost, large-area processing and could be utilized in a variety of emerging applications. However, the generally large contact resistance (R_c) limits the integration and miniaturization of OFETs. The R_c is difficult to reduce due to an incompatibility between obtaining strong orbit coupling and the barrier height reduction. In this study, we developed an oxygen-induced barrier lowering strategy by introducing oxygen (O₂) into the nanointerface between the electrodes and organic semiconductors layer and achieved an ultralow channel width-normalized R_c (R_c·W) of 89.8 Ω·cm and a high mobility of 11.32 cm² V^-1 s^-1. This work demonstrates that O₂ adsorbed at the nanointerface of metal-semiconductor contact can significantly reduce the R_c from both experiments and theoretical simulations and provides guidance for the construction of high-performance OFETs, which is conducive to the integration and miniaturization of OFETs.

Ohmic contacts of the two-dimensional Ca2N/MoS2 donor-acceptor heterostructure

In the current stage, conventional silicon-based devices are suffering from the scaling limits and the Fermi level pinning effect. Therefore, looking for low-resistance metal contacts for semiconductors has become one of the most important topics, and two-dimensional (2D) metal/semiconductor contacts turn out to be highly interesting. Alternatively, the Schottky barrier and the tunneling barrier impede their practical applications. In this work, we propose a new strategy for reducing the contact potential barrier by constructing a donor-acceptor heterostructure, that is, Ca₂N/MoS₂ with Ca₂N being a 2D electrene material with a significantly small work function and a rather high carrier concentration. The quasi-bond interaction of the heterostructure avoids the formation of a Fermi level pinning effect and gives rise to high tunneling probability. An excellent n-type Ohmic contact form between Ca₂N and MoS₂ monolayers, with a 100% tunneling probability and a perfect linear I-V curve, and large lateral band bending also demonstrates the good performance of the contact. We verify a fascinating phenomenon that Ca₂N can trigger the phase transition of MoS₂ from 2H to 1T'. In addition, we also identify that Ohmic contacts can be formed between Ca₂N and other 2D transition metal dichalcogenides (TMDCs), including WS₂, MoSe₂, WSe₂, and MoTe₂.

Modulation of Contact Resistance of Dual-Gated MoS2 FETs Using Fermi-Level Pinning-Free Antimony Semi-Metal Contacts

Achieving low contact resistance (R_C ) is one of the major challenges in producing 2D FETs for future CMOS technology applications. In this work, the electrical characteristics for semimetal (Sb) and normal metal (Ti) contacted MoS₂ devices are systematically analyzed as a function of top and bottom gate-voltages (V_TG and V_BG ). The semimetal contacts not only significantly reduce R_C but also induce a strong dependence of R_C on V_TG , in sharp contrast to Ti contacts that only modulate R_C by varying V_BG . The anomalous behavior is attributed to the strongly modulated pseudo-junction resistance (R_jun ) by V_TG , resulting from weak Fermi level pinning (FLP) of Sb contacts. In contrast, the resistances under both metallic contacts remain unchanged by V_TG as metal screens the electric field from the applied V_TG . Technology computer aided design simulations further confirm the contribution of V_TG to R_jun , which improves overall R_C of Sb-contacted MoS₂ devices. Consequently, the Sb contact has a distinctive merit in dual-gated (DG) device structure, as it greatly reduces R_C and enables effective gate control by both V_BG and V_TG . The results offer new insight into the development of DG 2D FETs with enhanced contact properties realized by using semimetals.

All-Transfer Electrode Interface Engineering Toward Harsh-Environment-Resistant MoS2 Field-Effect Transistors

Nanoscale electronic devices that can work in harsh environments are in high demand for wearable, automotive, and aerospace electronics. Clean and defect-free interfaces are of vital importance for building nanoscale harsh-environment-resistant devices. However, current nanoscale devices are subject to failure in these environments, especially at defective electrode-channel interfaces. Here, harsh-environment-resistant MoS₂ transistors are developed by engineering electrode-channel interfaces with an all-transfer of van der Waals electrodes. The delivered defect-free, graphene-buffered electrodes keep the electrode-channel interfaces intact and robust. As a result, the as-fabricated MoS₂ devices have reduced Schottky barrier heights, leading to a very large on-state current and high carrier mobility. More importantly, the defect-free, hydrophobic graphene buffer layer prevents metal diffusion from the electrodes to MoS₂ and the intercalation of water molecules at the electrode-MoS₂ interfaces. This enables high resistances of MoS₂ devices with all-transfer electrodes to various harsh environments, including humid, oxidizing, and high-temperature environments, surpassing the devices with other kinds of electrodes. The work deepens the understanding of the roles of electrode-channel interfaces in nanoscale devices and provides a promising interface engineering strategy to build nanoscale harsh-environment-resistant devices.

Distinct Contact Scaling Effects in MoS2 Transistors Revealed with Asymmetrical Contact Measurements

2D semiconducting materials have immense potential for future electronics due to their atomically thin nature, which enables better scalability. While the channel scalability of 2D materials has been extensively studied, the current understanding of contact scaling in 2D devices is inconsistent and oversimplified. Here physically scaled contacts and asymmetrical contact measurements (ACMs) are combined to investigate the contact scaling behavior in 2D field-effect transistors. The ACMs directly compare electron injection at different contact lengths while using the exact same MoS₂  channel, eliminating channel-to-channel variations. The results show that scaled source contacts can limit the drain current, whereas scaled drain contacts do not. Compared to devices with long contact lengths, devices with short contact lengths (scaled contacts) exhibit larger variations, 15% lower drain currents at high drain-source voltages, and a higher chance of early saturation and negative differential resistance. Quantum transport simulations reveal that the transfer length of Ni-MoS₂  contacts can be as short as 5 nm. Furthermore, it is clearly identified that the actual transfer length depends on the quality of the metal-2D interface. The ACMs demonstrated here will enable further understanding of contact scaling behavior at various interfaces.

DFT Simulation of a Gold Electrode Vapor-Deposition Growth Process and the Effect of Defects on the Electrode Work Function

While two-dimensional (2D) semiconductors are explored as field-effect transistor (FET) channel materials for decreasing the short channel effects, electrical contact with 2D semiconductors is a major issue. Many efforts have been made toward this issue. However, the discrepancy in the contact type and the Schottky barrier height from the same contact is present in experiments. This discrepancy supposedly should be associated with the vapor-deposition electrode structures, on which little attention had been focused. Here, the crystal growth of the gold vapor-deposition electrode is simulated by adding gold atoms to the gold substrate one by one in the framework of density functional theory, and for every step, the spontaneously searching adsorption site method is used to find thermodynamically stable adsorption sites and the climbing nudged elastic band method is used to find kinetically stable ones. Simulation shows that the Au(111) face grows according to the ABC sequence packing, and possible defects are interstitial, vacancy, and the partly filled nascent layer (PFNL). These defects have an unequal effect on the electrode work function. The PFNL may be a non-negligible factor responsible for the discrepancy.

Chemical Dopant-Free Controlled MoTe2/MoSe2 Heterostructure toward a Self-Driven Photodetector and Complementary Logic Circuits

Two-dimensional (2D) van der Waals heterostructures based on transition metal dichalcogenides are expected to be unique building blocks for next-generation nanoscale electronics and optoelectronics. The ability to control the properties of 2D heterostructures is the key for practical applications. Here, we report a simple way to fabricate a high-performance self-driven photodetector based on the MoTe₂/MoSe₂ p-n heterojunction, in which the hole-dominated transport polarity of MoTe₂ is easily achieved via a straightforward thermal annealing treatment in air without any chemical dopants or special gases needed. A high photoresponsivity of 0.72 A W^-1, an external quantum efficiency up to 41.3%, a detectivity of 7 × 10¹¹ Jones, and a response speed of 120 μs are obtained at zero bias voltage. Additionally, this doping method is also utilized to realize a complementary inverter with a voltage gain of 24. By configuring 2D p-MoTe₂ and n-MoSe₂ on demand, logic functions of NAND and NOR gates are also accomplished successfully. These results present a significant potential toward future larger-scale heterogeneously integrated 2D electronics and optoelectronics.

Resolving Interface Barrier Deviation from the Schottky-Mott Rule: A Mitigation Strategy via Engineering MoS2-Metal van der Waals Contact

The Schottky barrier (SB) in the ultraclean van der Waals contact between two-dimensional (2D) MoS₂ and three-dimensional (3D) indium (In) strikingly deviates from the Schottky-Mott limit (SML). Herein, on the basis of first-principles calculation, the origin of the SB deviation is brought to bear, as well as a strategy for mitigating the SB deviation. In light of the good agreement between the SB and the corrected SB by interface potential difference (ΔV) and Fermi -level shift (ΔE_F) based on the SML, the SB deviation is attributed to the combined effects of ΔV and ΔE_F. Furthermore, when a Au, Sc, or Ti thin film is coated on the back side of In, the SB deviation and the sum of ΔV and ΔE_F decrease similarly. Importantly, in the Ti coating situation, the SB is reduced to 0.12 eV, notably smaller than the value of 0.30 eV in the Au coating case. This interface engineering can be generalized to regulate the SB between a 2D semiconductor and a 3D alloy.

2D SiP2/h-BN for a Gate-Controlled Phototransistor with Ultrahigh Sensitivity

Two-dimensional (2D) materials are extremely attractive for the construction of highly sensitive photodetectors due to their unique electronic and optical properties. However, developing 2D photodetectors with ultrahigh sensitivity for extremely low-light-level detection is still a challenge owing to the limitation of high dark current and low detectivity. Herein, a gate-controlled phototransistor based on 2D SiP₂/hexagonal boron nitride (h-BN) was rationally designed and demonstrated ultrahigh sensitivity for the first time. With a back-gate device geometry, the SiP₂/h-BN phototransistor exhibits an ultrahigh detectivity of 3.4 × 10¹³ Jones, which is one of the highest values among 2D material-based photodetectors. In addition, the phototransistor also shows a gate tunable responsivity of ≤43.5 A/W at a gate voltage of 30 V due to the photogating effect. The ultrahigh sensitivity of the SiP₂-based phototransistor is attributed to the extremely low dark current suppressed by the phototransistor configuration and the improved photocurrent by using h-BN as a substrate to reduce charge scattering. This work provides a facile strategy for improving the detectivity of photodetectors and validates the great potential of 2D SiP₂ phototransistors for ultrasensitive optoelectronic applications.

Suppressed Fermi Level Pinning and Wide-Range Tunable Schottky Barrier in CrX3 (X = I, Br)/2D Metal Contacts

CrX₃ (X = I, Br) monolayers exhibit outstanding performance in spintronic devices. However, the Schottky barrier at the CrX₃/electrode interface severely impedes the charge injection efficiency. Herein, we propose two-dimensional (2D) metals as electrodes to form van der Waals (vdW) contact with CrX₃ monolayers and systematically explore the contact properties of CrX₃/metal by density functional theory (DFT) calculations. The results demonstrate that the strongly suppressed Fermi level pinning (FLP) effect and the wide-range tunable Schottky barrier can be achieved in CrX₃/metal contacts. Specifically, the n-type and the p-type Schottky contacts can be realized in CrX₃/metal contacts by choosing 2D metal electrodes with different work functions. Importantly, the pinning factors for CrX₃/metal contacts are exceptionally larger than other commonly studied 2D semiconductors, indicating the strongly suppressed FLP in CrX₃/metal contacts, which leads to the wide-range tunable Schottky barrier. Our findings provide guidance to the choice of electrodes and promote the development of CrX₃-based spin devices.

Percolation-Based Metal-Insulator Transition in Black Phosphorus Field Effect Transistors

The existence of a novel phenomenon, such as the metal-insulator transition (MIT) in two-dimensional (2D) systems, affords emerging functional properties that provide new aspects for future electronics and optoelectronics. Here, we report the observation of the MIT in black phosphorus field effect transistors by tuning the carrier density (n) controlled by back-gate bias. We find that the conductivity follows an n dependence as σ(n) ∝ n^α with α ∼ 1, which indicates the presence of screened Coulomb impurity scattering at high carrier densities in the temperature range of 10-300 K. As n decreases, the screened Coulomb impurity scattering breaks down, developing strong charge density inhomogeneity leading to a percolation-based transition at the critical carrier density (n_C). At low carrier densities (n < n_C), the system is in the insulating regime, which is expressed by Mott variable range hopping that demonstrates the role of disorder in the system. In addition, the extracted average values of critical exponent δ are ∼1.29 ± 0.01 and ∼1.14 ± 0.01 for devices A and B, respectively, consistent with the 2D percolation exponent of ⁴/₃, confirming the 2D percolation-based MIT in BP devices. Our findings strongly suggest that the 2D MIT observed in BP is a classical percolation-based transition caused by charge inhomogeneity induced by screened Coulomb charge impurity scattering around a transition point controlled by n through back-gate bias.

Reconfigurable Two-Dimensional Air-Gap Barristors

Reconfigurable logic circuits implemented by two-dimensional (2D) ambipolar semiconductors provide a prospective solution for the post-Moore era. It is still a challenge for ambipolar nanomaterials to realize reconfigurable polarity control and rectification with a simplified device structure. Here, an air-gap barristor based on an asymmetric stacking sequence of the electrode contacts was developed to resolve these issues. For the 2D ambipolar channel of WSe₂, the barristor can not only be reconfigured as an n- or p-type unipolar transistor but also work as a switchable diode. The air gap around the bottom electrode dominates the reconfigurable behaviors by widening the Schottky barrier here, thus blocking the injection of both electrons and holes. The electrical performances can be improved by optimizing the electrode materials, which achieve an on/off ratio of 10⁴ for the transistor and a rectifying ratio of 10⁵ for the diode. A complementary inverter and a switchable AND/OR logic gate were constructed by using the air-gap barristors as building blocks. This work provides an efficient approach with great potential for low-dimensional reconfigurable electronics.

Non-Destructive Low-Temperature Contacts to MoS2 Nanoribbon and Nanotube Quantum Dots

Molybdenum disulfide nanoribbons and nanotubes are quasi-1D semiconductors with strong spin-orbit interaction, a nanomaterial highly promising for quantum electronic applications. Here, it is demonstrated that a bismuth semimetal layer between the contact metal and this nanomaterial strongly improves the properties of the contacts. Two-point resistances on the order of 100 kΩ are observed at room temperature. At cryogenic temperature, Coulomb blockade is visible. The resulting stability diagrams indicate a marked absence of trap states at the contacts and the corresponding disorder, compared to previous devices that use low-work-function metals as contacts. Single-level quantum transport is observed at temperatures below 100 mK.

Improvements in 2D p-type WSe2 transistors towards ultimate CMOS scaling

This paper provides comprehensive experimental analysis relating to improvements in the two-dimensional (2D) p-type metal-oxide-semiconductor (PMOS) field effect transistors (FETs) by pure van der Waals (vdW) contacts on few-layer tungsten diselenide (WSe₂) with high-k metal gate (HKMG) stacks. Our analysis shows that standard metallization techniques (e.g., e-beam evaporation at moderate pressure ~ 10^-5 torr) results in significant Fermi-level pinning, but Schottky barrier heights (SBH) remain small (< 100 meV) when using high work function metals (e.g., Pt or Pd). Temperature-dependent analysis uncovers a more dominant contribution to contact resistance from the channel access region and confirms significant improvement through less damaging metallization techniques (i.e., reduced scattering) combined with strongly scaled HKMG stacks (enhanced carrier density). A clean contact/channel interface is achieved through high-vacuum evaporation and temperature-controlled stepped deposition providing large improvements in contact resistance. Our study reports low contact resistance of 5.7 kΩ-µm, with on-state currents of ~ 97 µA/µm and subthreshold swing of ~ 140 mV/dec in FETs with channel lengths of 400 nm. Furthermore, theoretical analysis using a Landauer transport ballistic model for WSe₂ SB-FETs elucidates the prospects of nanoscale 2D PMOS FETs indicating high-performance (excellent on-state current vs subthreshold swing benchmarks) towards the ultimate CMOS scaling limit.

Wafer-scale and universal van der Waals metal semiconductor contact

Van der Waals (vdW) metallic contacts have been demonstrated as a promising approach to reduce the contact resistance and minimize the Fermi level pinning at the interface of two-dimensional (2D) semiconductors. However, only a limited number of metals can be mechanically peeled and laminated to fabricate vdW contacts, and the required manual transfer process is not scalable. Here, we report a wafer-scale and universal vdW metal integration strategy readily applicable to a wide range of metals and semiconductors. By utilizing a thermally decomposable polymer as the buffer layer, different metals were directly deposited without damaging the underlying 2D semiconductor channels. The polymer buffer could be dry-removed through thermal annealing. With this technique, various metals could be vdW integrated as the contact of 2D transistors, including Ag, Al, Ti, Cr, Ni, Cu, Co, Au, Pd. Finally, we demonstrate that this vdW integration strategy can be extended to bulk semiconductors with reduced Fermi level pinning effect.

Hysteresis-Free Contact Doping for High-Performance Two-Dimensional Electronics

Contact doping is considered crucial for reducing the contact resistance of two-dimensional (2D) transistors. However, a process for achieving robust contact doping for 2D electronics is lacking. Here, we developed a two-step doping method for effectively doping 2D materials through a defect-repairing process. The method achieves strong and hysteresis-free doping and is suitable for use with the most widely used transition-metal dichalcogenides. Through our method, we achieved a record-high sheet conductance (0.16 mS·sq^-1 without gating) of monolayer MoS₂ and a high mobility and carrier concentration (4.1 × 10¹³ cm^-2). We employed our robust method for the successful contact doping of a monolayer MoS₂ Au-contact device, obtaining a contact resistance as low as 1.2 kΩ·μm. Our method represents an effective means of fabricating high-performance 2D transistors.

Insulator-to-metal phase transition in a few-layered MoSe2 field effect transistor

The metal-to-insulator phase transition (MIT) in low-dimensional materials and particularly two-dimensional layered semiconductors is exciting to explore due to the fact that it challenges the prediction that a two-dimensional system must be insulating at low temperatures. Thus, the exploration of MITs in 2D layered semiconductors expands the understanding of the underlying physics. Here we report the MIT of a few-layered MoSe₂ field effect transistor under a gate bias (electric field) applied perpendicular to the MoSe₂ layers. With low applied gate voltage, the conductivity as a function of temperature from 150 K to 4 K shows typical semiconducting to insulating character. Above a critical applied gate voltage, V_c, the conductivity becomes metallic (i.e., the conductivity increases continuously as a function of decreasing temperature). Evidence of a metallic state was observed using an applied gate voltage or, equivalently, increasing the density of charge carriers within the 2D channel. We analyzed the nature of the phase transition using percolation theory, where conductivity scales with the density of charge carriers as σ ∝ (n - n_c)^δ. The critical exponent for a percolative phase transition, δ(T), has values ranging from 1.34 (at T = 150 K) to 2 (T = 20 K), which is close to the theoretical value of 1.33 for percolation to occur. Thus we conclude that the MIT in few-layered MoSe₂ is driven by charge carrier percolation. Furthermore, the conductivity does not scale with temperature, which is a hallmark of a quantum critical phase transition.

Quasi-van der Waals Epitaxial Recrystallization of a Gold Thin Film into Crystallographically Aligned Single Crystals

Heterointerfaces between two-dimensional (2D) materials and bulk metals determine the electrical and optical properties of their heterostructures. Although deposition of various metals on 2D materials has been studied, there is still a lack of studies on the interaction at the van der Waals (vdW) heterointerface between 2D materials and metals. Here, we report quasi-van der Waals (qvdW) epitaxial recrystallization of a gold thin film into crystallographically aligned single crystals by encapsulation annealing of a gold thin film with hexagonal boron nitride (hBN). When a polycrystalline gold thin film passivated with hBN was annealed, it was recrystallized into single gold crystals with a planar shape and crystallographic alignment with hBN due to a strong interaction between the gold film and hBN at the heterointerface. This reflects that a weak vdW force at the heterointerface is sufficiently strong to induce epitaxial recrystallization. Using this method, we fabricated a gold nanocrystal array with the same crystalline orientation and smooth top surface. Our work demonstrates a new method for epitaxial recrystallization of bulk crystals and provides a deep understanding of the interaction at the vdW heterointerface of 2D materials and metals.

Recent Advances in Rolling 2D TMDs Nanosheets into 1D TMDs Nanotubes/Nanoscrolls

Transition metal dichalcogenides (TMDs) van der Waals (vdW) 1D heterostructures are recently synthesized from 2D nanosheets, which open up new opportunities for potential applications in electronic and optoelectronic devices. The most recent and promising strategies in regards to forming 1D TMDs nanotubes (NTs) or nanoscrolls (NSs) in this review article as well as their heterostructures that are produced from 2D TMDs are summarized. In order to improve the functionality of ultrathin 1D TMDs that are coaxially combined with boron nitride nanotubes and single-walled carbon nanotubes. 1D heterostructured devices perform better than 2D TMD nanosheets when the two devices are compared. The photovoltaic effect in WS₂ or MoS₂ NTs without a junction may exceed the Shockley-Queisser limit for the above-band-gap photovoltage generation. Photoelectrochemical hydrogen evolution is accelerated when monolayer WS₂ or MoS₂ NSs are incorporated into a heterojunction. In addition, the photovoltaic performance of the WSe₂ /MoS₂  NSs junction is superior to that of the performance of MoS₂ NSs. The summary of the current research about 1D TMDs can be used in a variety of ways, which assists in the development of new types of nanoscale optoelectronic devices. Finally, it also summarizes the current challenges and prospects.

Modifying the Power and Performance of 2-Dimensional MoS2 Field Effect Transistors

Over the past 60 years, the semiconductor industry has been the core driver for the development of information technology, contributing to the birth of integrated circuits, Internet, artificial intelligence, and Internet of Things. Semiconductor technology has been evolving in structure and material with co-optimization of performance-power-area-cost until the state-of-the-art sub-5-nm node. Two-dimensional (2D) semiconductors are recognized by the industry and academia as a hopeful solution to break through the quantum confinement for the future technology nodes. In the recent 10 years, the key issues on 2D semiconductors regarding material, processing, and integration have been overcome in sequence, making 2D semiconductors already on the verge of application. In this paper, the evolution of transistors is reviewed by outlining the potential of 2D semiconductors as a technological option beyond the scaled metal oxide semiconductor field-effect transistors. We mainly focus on the optimization strategies of mobility (μ), equivalent oxide thickness (EOT), and contact resistance (R_C ), which enables high ON current (I_on ) with reduced driving voltage (V_dd ). Finally, we prospect the semiconductor technology roadmap by summarizing the technological development of 2D semiconductors over the past decade.

Multiwavelength High-Detectivity MoS2 Photodetectors with Schottky Contacts

Photodetection is one of the vital functions for the multifunctional "More than Moore" (MtM) microchips urgently required by Internet of Things (IoT) and artificial intelligence (AI) applications. The further improvement of the performance of photodetectors faces various challenges, including materials, fabrication processes, and device structures. We demonstrate in this work MoS₂ photodetectors with a nanoscale channel length and a back-gate device structure. With the mechanically exfoliated six-monolayer-thick MoS₂, a Schottky contact between source/drain electrodes and MoS₂, a high responsivity of 4.1 × 10³ A W^-1, and a detectivity of 1.34 × 10¹³ cm Hz^1/2 W^-1 at 650 nm were achieved. The devices are also sensitive to multiwavelength lights, including 520 and 405 nm. The electrical and optoelectronic properties of the MoS₂ photodetectors were studied in depth, and the working mechanism of the devices was analyzed. The photoinduced Schottky barrier lowering (PIBL) was found to be important for the high performance of the phototransistor.

A "Click" Reaction to Engineer MoS2 Field-Effect Transistors with Low Contact Resistance

Two-dimensional (2D) materials with the atomically thin thickness have attracted great interest in the post-Moore's Law era because of their tremendous potential to continue transistor downscaling and offered advances in device performance at the atomic limit. However, the metal-semiconductor contact is the bottleneck in field-effect transistors (FETs) integrating 2D semiconductors as channel materials. A robust and tunable doping method at the source and drain region of 2D transistors to minimize the contact resistance is highly sought after. Here we report a stable carrier doping method via the mild covalent grafting of maleimides on the surface of 2D transition metal dichalcogenides. The chemisorbed interaction contributes to the efficient carrier doping without degrading the high-performance carrier transport. Density functional theory results further illustrate that the molecular functionalization leads to the mild hybridization and the negligible impact on the conduction bands of monolayer MoS₂, avoiding the random scattering from the dopants. Differently from reported molecular treatments, our strategy displays high thermal stability (above 300 °C) and it is compatible with micro/nano processing technology. The contact resistance of MoS₂ FETs can be greatly reduced by ∼12 times after molecular functionalization. The Schottky barrier of 44 meV is achieved on monolayer MoS₂ FETs, demonstrating efficient charge injection between metal and 2D semiconductor. The mild covalent functionalization of molecules on 2D semiconductors represents a powerful strategy to perform the carrier doping and the device optimization.

Improvement of Visible Photodetection of Chemical Vapor Deposition-Grown MoS2 Devices via Graphene/Au Contacts

Two-dimensional (2D) molybdenum disulfide (MoS₂) is a promising material for constructing high-performance visible photosensor arrays because of its high mobility and scale-up process. These distinct properties enable the construction of practical optoelectrical sensor arrays. However, contact engineering for MoS₂ films is not still optimized. In this work, we inserted a graphene interlayer between the MoS₂ films and Au contacts (graphene/Au) via the wet-transfer method to boost the device performance. Using graphene/Au contacts, outstanding electrical properties, namely field-effect mobility of 12.06 cm²/V∙s, on/off current ratio of 1.0 × 10⁷, and responsivity of 610 A/W under illumination at 640 nm, were achieved. These favorable results were from the Fermi-level depinning effect induced by the graphene interlayer. Our results may help to construct large-area photonic sensor arrays based on 2D materials.

Two-dimensional wide-bandgap GeSe2 vertical ultraviolet photodetectors with high responsivity and ultrafast response speed

Germanium selenide (GeSe2), as a typical member of 2D wide bandgap semiconductors (WBSs), shows great potential in ultraviolet (UV) optoelectronics due to its excellent flexibility, superior environmental stability, competitive UV absorption coefficient, and significant spectral selectivity. However, the GeSe2-based UV photodetector suffers from high operation voltages and low photocurrent, which prevents its practical imaging applications. In this work, we report an elevated photocurrent generation in a vertical stacking graphene/GeSe2/graphene heterostructure with low operation voltage and low power consumption. Efficient collection of photoexcited carriers in GeSe2 through graphene electrodes results in outstanding UV detection properties, including a pronounced responsivity of 37.1 A W-1, a specific detectivity of 8.83 × 1011 Jones, and an ultrahigh on/off ratio (∼105) at 355 nm. In addition, building a Schottky barrier between GeSe2 and graphene and reducing the channel length can increase the photoresponse speed to ∼300 μs. These accomplishments set the stage for future optoelectronic applications of vertical 2D WBS heterostructure UV photodetectors.

The Trend of 2D Transistors toward Integrated Circuits: Scaling Down and New Mechanisms

2D transition metal chalcogenide (TMDC) materials, such as MoS₂ , have recently attracted considerable research interest in the context of their use in ultrascaled devices owing to their excellent electronic properties. Microprocessors and neural network circuits based on MoS₂ have been developed at a large scale but still do not have an advantage over silicon in terms of their integrated density. In this study, the current structures, contact engineering, and doping methods for 2D TMDC materials for the scaling-down process and performance optimization are reviewed. Devices are introduced according to a new mechanism to provide the comprehensive prospects for the use of MoS₂ beyond the traditional complementary-metal-oxide semiconductor in order to summarize obstacles to the goal of developing high-density and low-power integrated circuits (ICs). Finally, prospects for the use of MoS₂ in large-scale ICs from the perspectives of the material, system performance, and application to nonlogic functionalities such as sensor circuits and analogous circuits, are briefly analyzed. The latter issue is along the direction of "more than Moore" research.

Tunneling Spectroscopy of Two-Dimensional Materials Based on Via Contacts

We introduce a novel planar tunneling architecture for van der Waals heterostructures based on via contacts, namely, metallic contacts embedded into through-holes in hexagonal boron nitride (hBN). We use the via-based tunneling method to study the single-particle density of states of two different two-dimensional (2D) materials, NbSe₂ and graphene. In NbSe₂ devices, we characterize the barrier strength and interface disorder for barrier thicknesses of 0, 1, and 2 layers of hBN and study the dependence on the tunnel-contact area down to (44 ± 14)² nm². For 0-layer hBN devices, we demonstrate a crossover from diffusive to point contacts in the small-contact-area limit. In graphene, we show that reducing the tunnel barrier thickness and area can suppress effects due to phonon-assisted tunneling and defects in the hBN barrier. This via-based architecture overcomes limitations of other planar tunneling designs and produces high-quality, ultraclean tunneling structures from a variety of 2D materials.

Van der Waals-Interface-Dominated All-2D Electronics

The interface is the device. As the feature size rapidly shrinks, silicon-based electronic devices are facing multiple challenges of material performance decrease and interface quality degradation. Ultrathin 2D materials are considered as potential candidates in future electronics by their atomically flat surfaces and excellent immunity to short-channel effects. Moreover, due to naturally terminated surfaces and weak van der Waals (vdW) interactions between layers, 2D materials can be freely stacked without the lattice matching limit to form high-quality heterostructure interfaces with arbitrary components and twist angles. Controlled interlayer band alignment and optimized interfacial carrier behavior allow all-2D electronics based on 2D vdW interfaces to exhibit more comprehensive functionality and better performance. Especially, achieving the same computing capacity of multiple conventional devices with small footprint all-2D devices is considered to be the key development direction of future electronics. Herein, the unique properties of all-2D vdW interfaces and their construction methods are systematically reviewed and the main performance contributions of different vdW interfaces in 2D electronics are summarized, respectively. Finally, the recent progress and challenges for all-2D vdW electronics are discussed, and how to improve the compatibility of 2D material devices with silicon-based industrial technology is pointed out as a critical challenge.