Highly Uniform Carbon Nanotube Field-Effect Transistors and Medium Scale Integrated Circuits

Ku-Band Mixers Based on Random-Oriented Carbon Nanotube Films

Carbon nanotubes (CNTs) are a type of nanomaterial that have excellent electrical properties such as high carrier mobility, high saturation velocity, and small inherent capacitance, showing great promise in radio frequency (RF) applications. Decades of development have been made mainly on cut-off frequency and amplification; however, frequency conversion for RF transceivers, such as CNT-based mixers, has been rarely reported. In this work, based on randomly oriented carbon nanotube films, we focused on exploring the frequency conversion capability of CNT-based RF mixers. CNT-based RF transistors were designed and fabricated with a gate length of 50 nm and gate width of 100 μm to obtain nearly 30 mA of total current and 34 mS of transconductance. The Champion RF transistor has demonstrated cut-off frequencies of 78 GHz and 60 GHz for fT and fmax, respectively. CNT-based mixers achieve high conversion gain from -11.4 dB to -17.5 dB at 10 to 15 GHz in the X and Ku bands. Additionally, linearity is achieved with an input third intercept (IIP3) of 18 dBm. It is worth noting that the results from this work have no matching technology or tuning instrument assistance, which lay the foundations for the application of Ku band transceivers integrated with CNT amplifiers.

Heavy Ion Displacement Damage Effect in Carbon Nanotube Field Effect Transistors

Recent advances in carbon nanotube (CNT)-based integrated circuits have shown their potential in deep space exploration. In this work, the mechanism governing the heavy-ion-induced displacement damage (DD) effect in semiconducting single-walled CNT field effect transistors (FETs), which is one of the factors limiting device robustness in space, was first and thoroughly investigated. CNT FETs irradiated by a Xe ion fluence of 10¹² ions/cm² can maintain a high on/off current ratio, while transistors' performance failure is observed as the ion fluence increased to 5 × 10¹² ions/cm². Controllable experiments combined with numerical simulations revealed that the degradation mechanism changed as the nonionizing radiation energy built up. The trap generation in the gate dielectric, instead of the CNT channel, was identified as the dominating factor for the high-energy-radiation-induced device failure. Therefore, CNT FETs exhibited a >10× higher DD tolerance than that of Si devices, which was limited by the channel damage under irradiation. More importantly, the distinct failure mechanism determined that CNT FETs can maintain a high DD tolerance of 2.8 × 10¹³ MeV/g as the technology node scales down to 45 nm node, suggesting the potential of CNT-based VLSI for high-performance and high-robustness space applications.

Toward the Commercialization of Carbon Nanotube Field Effect Transistor Biosensors

The development of biosensors based on field-effect transistors (FETs) using atomically thick carbon nanotubes (CNTs) as a channel material has the potential to revolutionize the related field due to their small size, high sensitivity, label-free detection, and real-time monitoring capabilities. Despite extensive research efforts to improve the sensitivity, selectivity, and practicality of CNT FET-based biosensors, their commercialization has not yet been achieved due to the non-uniform and unstable device performance, difficulties in their fabrication, the immaturity of sensor packaging processes, and a lack of reliable modification methods. This review article focuses on the practical applications of CNT-based FET biosensors for the detection of ultra-low concentrations of biologically relevant molecules. We discuss the various factors that affect the sensors' performance in terms of materials, device architecture, and sensor packaging, highlighting the need for a robust commercial process that prioritizes product performance. Additionally, we review recent advances in the application of CNT FET biosensors for the ultra-sensitive detection of various biomarkers. Finally, we examine the key obstacles that currently hinder the large-scale deployment of these biosensors, aiming to identify the challenges that must be addressed for the future industrialization of CNT FET sensors.

Complementary Transistors Based on Aligned Semiconducting Carbon Nanotube Arrays

High-density semiconducting aligned carbon nanotube (A-CNT) arrays have been demonstrated with wafer-scale preparation of materials and have shown high performance in P-type field-effect transistors (FETs) and great potential for applications in future digital integrated circuits (ICs). However, high-performance N-type FETs (N-FETs) have not yet been implemented with A-CNTs, making development of complementary metal-oxide-semiconductor (CMOS) technology, a necessary component for modern digital ICs, impossible. In this work, we reveal the mechanism hindering the realization of A-CNT N-FETs contacted by low-work-function metals and develop corresponding solutions to promote the performance of N-FETs to that of P-type FETs (P-FETs). The fabricated scandium (Sc)-contacted A-CNT N-FET with a 100 nm gate length exhibits an on-state current (I_on) of 800 μA/μm and a peak transconductance (g_m) of 250 μS/μm, representing the highest performance of CNT-based N-FETs to date. Moreover, CMOS technology has been developed to realize N- and P-FETs with symmetric high performance based on A-CNTs. The fabricated A-CNT CMOS FETs show electron and hole mobilities of 325 and 241 cm² V^-1 s^-1, respectively, which are slightly higher than the corresponding values of Si CMOS transistors. Our scalable fabrication of A-CNT CMOS FETs with comparable electronic performance to Si CMOS will promote the application of CNT-based electronics in digital ICs.

Subthreshold Schottky-contacted carbon nanotube network film field-effect transistors for ultralow-power electronic applications

Ultralow-power electronics is critical to wearable, portable, and implantable applications where the systems could only have access to very limited electrical power supply or even be self-powered. Here, we report on a type of Schottky barrier (SB) contacted single-walled carbon nanotube (SWCNT) network film field-effect-transistors (FETs) that are operated in the subthreshold region to achieve ultralow-power applications. The thin high-k gate dielectric and the overlap between the gate and the source electrodes offer highly efficient gate electrostatic control over the SWCNT channel and the SB at the source contact, resulting in steep subthreshold switching characteristics with a small subthreshold swing (∼67 mV dec^-1), a large current on/off ratio (∼10⁶), and a low off-state current (∼0.5 pA). Ap-channel metal-oxide-semiconductor inverter built with the subthreshold SB-SWCNT-FETs exhibits a well-defined logic functionality and small-signal amplification capability under a low supply voltage (∼0.5 V) and an ultralow power (∼0.05 pWμm^-1). The low-voltage and deep subthreshold operations reported here could lay an essential foundation for high-performance and ultralow-power SWCNTs-based electronics.

Recent Advances in Structure Separation of Single-Wall Carbon Nanotubes and Their Application in Optics, Electronics, and Optoelectronics

Structural control of single-wall carbon nanotubes (SWCNTs) with uniform properties is critical not only for their property modulation and functional design but also for applications in electronics, optics, and optoelectronics. To achieve this goal, various separation techniques have been developed in the past 20 years through which separation of high-purity semiconducting/metallic SWCNTs, single-chirality species, and even their enantiomers have been achieved. This progress has promoted the property modulation of SWCNTs and the development of SWCNT-based optoelectronic devices. Here, the recent advances in the structure separation of SWCNTs are reviewed, from metallic/semiconducting SWCNTs, to single-chirality species, and to enantiomers by several typical separation techniques and the application of the corresponding sorted SWCNTs. Based on the separation procedure, efficiency, and scalability, as well as, the separable SWCNT species, purity, and quantity, the advantages and disadvantages of various separation techniques are compared. Combined with the requirements of SWCNT application, the challenges, prospects, and development direction of structure separation are further discussed.

Advances and Frontiers in Single-Walled Carbon Nanotube Electronics

Single-walled carbon nanotubes (SWCNTs) have been considered as one of the most promising electronic materials for the next-generation electronics in the more Moore era. Sub-10 nm SWCNT-field effect transistors (FETs) have been realized with several performances exceeding those of Si-based FETs at the same feature size. Several industrial initiatives have attempted to implement SWCNT electronics in integrated circuit (IC) chips. Here, the recent advances in SWCNT electronics are reviewed from in-depth understanding of the fundamental electronic structures, the carrier transport mechanisms, and the metal/SWCNT contact properties. In particular, the subthreshold switching properties are highlighted for low-power, energy-efficient device operations. State-of-the-art low-power SWCNT-based electronics and the key strategies to realize low-voltage and low-power operations are outlined. Finally, the essential challenges and prospects from the material preparation, device fabrication, and large-scale ICs integration for future SWCNT-based electronics are foregrounded.

Analyzing Gamma-Ray Irradiation Effects on Carbon Nanotube Top-Gated Field-Effect Transistors

Carbon nanotube (CNT) field-effect transistors (FETs) and integrated circuits (ICs) have been predicted and demonstrated to be some of the most promising candidates for radiation-hardened electronics. The studies mainly focused on the radiation response of the whole transistors, and experiments or analyses to reveal the detailed radiation responses of different components of the FET were absent. Here, we use a controllable experimental method to decouple the total ionizing dose (TID) radiation effects on different individual components of top-gate CNT FETs, including the CNT channel, gate dielectric, and substrate. The substrate is found to be more vulnerable to radiation damage than the gate dielectric and CNT film in FETs. Furthermore, the CNT film not only acts as a radiation-hardened semiconducting channel but also protects the channel/substrate interface by partially shielding the substrate from radiation damage. On the basis of the experimental data, a model is built to predict the irradiation resistance limit of CNT top-gated FETs, which can withstand at least 155 kGy irradiation.

Wafer-scale functional circuits based on two dimensional semiconductors with fabrication optimized by machine learning

Triggered by the pioneering research on graphene, the family of two-dimensional layered materials (2DLMs) has been investigated for more than a decade, and appealing functionalities have been demonstrated. However, there are still challenges inhibiting high-quality growth and circuit-level integration, and results from previous studies are still far from complying with industrial standards. Here, we overcome these challenges by utilizing machine-learning (ML) algorithms to evaluate key process parameters that impact the electrical characteristics of MoS₂ top-gated field-effect transistors (FETs). The wafer-scale fabrication processes are then guided by ML combined with grid searching to co-optimize device performance, including mobility, threshold voltage and subthreshold swing. A 62-level SPICE modeling was implemented for MoS₂ FETs and further used to construct functional digital, analog, and photodetection circuits. Finally, we present wafer-scale test FET arrays and a 4-bit full adder employing industry-standard design flows and processes. Taken together, these results experimentally validate the application potential of ML-assisted fabrication optimization for beyond-silicon electronic materials.

Here, the authors demonstrate the application of machine learning to optimize the device fabrication process for wafer-scale 2D semiconductors, and eventually fabricate digital, analog, and optoelectrical circuits.

Toward Unusual-High Hole Mobility of p-Channel Field-Effect-Transistors

The relative low hole mobility of p-channel building block device challenges the continued miniaturization of modern electronic chips. Metal-semiconductor junction is always an efficient strategy to control the carrier concentration of channel semiconductor, benefiting the carrier mobility regulation of building block device. In this work, complementary metal oxide semiconductor (CMOS)-compatible metals are selected to deposit on the surface of the important p-channel building block of GaSb nanowire field-effect-transistors (NWFETs), demonstrating the efficient strategy of hole mobility enhancement by metal-semiconductor junction. When deposited with lower work function metal of Al, the peak hole mobility of GaSb NWFET can be enhanced to as high as ≈3372 cm² V^-1 s^-1 , showing three times than the un-deposited one. The as-studied metal-semiconductor junction is also efficient for the hole mobility enhancement of other p-channel devices, such as GaAs NWFET, GaAs film FET, and WSe₂ FET. With the enhanced mobility, the as-constructed CMOS inverter shows good invert characteristics, showing a relatively high gain of ≈18.1. All results may be regarded as important advances to the next-generation electronics.

Carbon Nanotube Based Radio Frequency Transistors for K-Band Amplifiers

Owing to the combination of high carrier mobility and saturation velocity, low intrinsic capacitance, and excellent stability, the carbon nanotube (CNT) has been considered as a perfect semiconductor to construct radio frequency (RF) field-effect transistors (FETs) and circuits with an ultrahigh frequency band. However, the reported CNT RF FETs usually exhibited poor real performance indicated by the as-measured maximum oscillation frequency (f_max), and then the amplifiers, which are the most important and fundamental RF circuits, suffered from a low power gain and a low frequency band. In this work, we build RF transistors on solution-derived randomly orientated CNT films with improved quality and uniformity. The randomly orientated CNT film FETs exhibit the record as-measured maximum f_max of 90 GHz, demonstrating the potential for over 28 GHz (at least one-third of 90 GHz) 5G mmWave (frequency range 2) applications. Benefiting from the large-scale uniformity of CNT films, FETs are designed and fabricated with a large channel width to present low internal resistance for the standard 50 Ω impedance matching guide line, which is critical to construct an RF amplifier. Furthermore, we first demonstrate amplifiers with a maximum power gain up to 11 dB and output third-order intercept point (OIP3) of 15 dBm, both at the K-band, which represents the record of a CNT amplifier and is even comparable with a commercial amplifier based on III-V RF transistors.

Synaptic transistors and neuromorphic systems based on carbon nano-materials

Carbon-based materials possessing a nanometer size and unique electrical properties perfectly address the two critical issues of transistors, the low power consumption and scalability, and are considered as a promising material in next-generation synaptic devices. In this review, carbon-based synaptic transistors were systematically summarized. In the carbon nanotube section, the synthesis of carbon nanotubes, purification of carbon nanotubes, the effect of architecture on the device performance and related carbon nanotube-based devices for neuromorphic computing were discussed. In the graphene section, the synthesis of graphene and its derivative, as well as graphene-based devices for neuromorphic computing, was systematically studied. Finally, the current challenges for carbon-based synaptic transistors were discussed.

Strengthened Complementary Metal-Oxide-Semiconductor Logic for Small-Band-Gap Semiconductor-Based High-Performance and Low-Power Application

Silicon-based complementary metal-oxide-semiconductor (CMOS) has been the mainstream logic style for modern digital integrated circuits (ICs) for decades but will meet its performance limits soon. Extensive investigations have thus been carried out using other semiconductors, especially those with extremely high carrier mobility. However, these materials usually have small or even zero band gap, which leads inevitably to large leakage current or voltage loss in ICs based on these semiconductors. In this work, we propose and demonstrate a strengthened CMOS (SCMOS) logic style using modified field-effect transistors (FETs) to solve this problem, that is, to achieve high performance, utilizing the high carrier mobility in these materials, and to reduce the current leakage resulting from their small band gap. Conventional CMOS FETs are modified to have an asymmetric structure where an additional assistant gate is introduced near the drain to further lower the potential barrier in on-state and to increase the barrier in off-state. SCMOS ICs are constructed using these modified asymmetric CMOS FETs, which demonstrate perfect rail-to-rail output with negligible voltage loss and 3 orders of magnitude suppression of the static power consumption and an operating speed similar to or even higher than that of CMOS ICs. Here, SCMOS is demonstrated using carbon nanotubes, but, in principle, this logic style can be used in ICs based on any small-band-gap semiconductors to provide simultaneously high performance and low power consumption.

Wafer-Scale Uniform Carbon Nanotube Transistors for Ultrasensitive and Label-Free Detection of Disease Biomarkers

Carbon nanotube (CNT) field-effect transistor (FET)-based biosensors have shown great potential for ultrasensitive biomarker detection, but challenges remain, which include unsatisfactory sensitivity, difficulty in stable functionalization, incompatibility with scalable fabrication, and nonuniform performance. Here, we describe ultrasensitive, label-free, and stable FET biosensors built on polymer-sorted high-purity semiconducting CNT films with wafer-scale fabrication and high uniformity. With a floating gate (FG) structure using an ultrathin Y₂O₃ high-κ dielectric layer, the CNT FET biosensors show amplified response and improved sensitivity compared with those sensors without Y₂O₃, which is attributed to the chemical gate-coupling effect dominating the sensor response. The CNT FG-FETs are modified to selectively detect specific disease biomarkers, namely, DNA sequences and microvesicles, with theoretical record detection limits as low as 60 aM and 6 particles/mL, respectively. Furthermore, the biosensors exhibit highly uniform performance over the 4 in. wafer as well as superior bias stress stability. The FG CNT FET biosensors could be extended as a universal biosensor platform for the ultrasensitive detection of multiple biological molecules and applied in highly integrated and multiplexed all CNT-FET-based sensor architectures.

Planar Growth, Integration, and Applications of Semiconducting Nanowires

Silicon and other inorganic semiconductor nanowires (NWs) have been extensively investigated in the last two decades for constructing high-performance nanoelectronics, sensors, and optoelectronics. For many of these applications, these tiny building blocks have to be integrated into the existing planar electronic platform, where precise location, orientation, and layout controls are indispensable. In the advent of More-than-Moore's era, there are also emerging demands for a programmable growth engineering of the geometry, composition, and line-shape of NWs on planar or out-of-plane 3D sidewall surfaces. Here, the critical technologies established for synthesis, transferring, and assembly of NWs upon planar surface are examined; then, the recent progress of in-plane growth of horizontal NWs directly upon crystalline or patterned substrates, constrained by using nanochannels, an epitaxial interface, or amorphous thin film precursors is discussed. Finally, the unique capabilities of planar growth of NWs in achieving precise guided growth control, programmable geometry, composition, and line-shape engineering are reviewed, followed by their latest device applications in building high-performance field-effect transistors, photodetectors, stretchable electronics, and 3D stacked-channel integration.

Silicon-Waveguide-Integrated Carbon Nanotube Optoelectronic System on a Single Chip

Monolithic optoelectronic integration based on a single material is a major pursuit in the fields of nanophotonics and nanoelectronics in order to meet the requirements of future fiber-optic telecommunication systems and on-chip optical interconnection systems. However, the incompatibility between silicon-based electronics and germanium or compound semiconductor-based photonics makes it very challenging to realize optoelectronic integration based on a single material. Here, the integration between silicon waveguides and a carbon nanotube (CNT) optoelectronic system is demonstrated. Waveguide-integrated photodetectors based on the CNT exhibit 12.5 mA/W photoresponsivity at 1530 nm, which presents an improvement of 97.6 times enhanced absorption efficiency compared to that without the waveguide. Multiplied output signals of cascading photodetectors are used to control the output of CNT-based logic gates, thereby demonstrating that the CNT-based optoelectronic integration system is compatible with silicon photonics. Our work indicates that carbon nanotubes have the potential for future integration between nanophotonics and nanoelectronics on a single chip.

Evaporated tellurium thin films for p-type field-effect transistors and circuits

There is an emerging need for semiconductors that can be processed at near ambient temperature with high mobility and device performance. Although multiple n-type options have been identified, the development of their p-type counterparts remains limited. Here, we report the realization of tellurium thin films through thermal evaporation at cryogenic temperatures for fabrication of high-performance wafer-scale p-type field-effect transistors. We achieve an effective hole mobility of ~35 cm²V^-1s^-1, on/off current ratio of ~10⁴ and subthreshold swing of 108 mV dec^-1 on an 8-nm-thick film. High-performance tellurium p-type field-effect transistors are fabricated on a wide range of substrates including glass and plastic, further demonstrating the broad applicability of this material. Significantly, three-dimensional circuits are demonstrated by integrating multi-layered transistors on a single chip using sequential lithography, deposition and lift-off processes. Finally, various functional logic gates and circuits are demonstrated.

Nanoscale Patterning of Carbon Nanotubes: Techniques, Applications, and Future

Carbon nanotube (CNT) devices and electronics are achieving maturity and directly competing or surpassing devices that use conventional materials. CNTs have demonstrated ballistic conduction, minimal scaling effects, high current capacity, low power requirements, and excellent optical/photonic properties; making them the ideal candidate for a new material to replace conventional materials in next-generation electronic and photonic systems. CNTs also demonstrate high stability and flexibility, allowing them to be used in flexible, printable, and/or biocompatible electronics. However, a major challenge to fully commercialize these devices is the scalable placement of CNTs into desired micro/nanopatterns and architectures to translate the superior properties of CNTs into macroscale devices. Precise and high throughput patterning becomes increasingly difficult at nanoscale resolution, but it is essential to fully realize the benefits of CNTs. The relatively long, high aspect ratio structures of CNTs must be preserved to maintain their functionalities, consequently making them more difficult to pattern than conventional materials like metals and polymers. This review comprehensively explores the recent development of innovative CNT patterning techniques with nanoscale lateral resolution. Each technique is critically analyzed and applications for the nanoscale-resolution approaches are demonstrated. Promising techniques and the challenges ahead for future devices and applications are discussed.

Solution-processed thin films of semiconducting carbon nanotubes and their application to soft electronics

Semiconducting single-walled carbon nanotube (SWNT) networks are promising for use as channel materials in field-effect transistors (FETs) in next-generation soft electronics, owing to their high intrinsic carrier mobility, mechanical flexibility, potential for low-cost production, and good processability. In this article, we review the recent progress related to carbon nanotube (CNT) devices in soft electronics by describing the materials and devices, processing methods, and example applications in soft electronic systems. First, solution-processed semiconducting SWNT deposition methods along with doping techniques used to achieve stable complementary metal-oxide-semiconductor devices are discussed. Various strategies for developing high-performance SWNT-based FETs, such as the proper material choices for the gates, dielectrics, and sources/drains of FETs, and methods of improving FET performance, such as hysteresis repression in SWNT-based FETs, are described next. These SWNT-based FETs have been used in flexible, stretchable, and wearable electronic devices to realize functionalities that could not be achieved using conventional silicon-based devices. We conclude this review by discussing the challenges faced by and outlook for CNT-based soft electronics.

Improving the Performance and Uniformity of Carbon-Nanotube-Network-Based Photodiodes via Yttrium Oxide Coating and Decoating

Semiconducting single-walled carbon nanotube thin films can be obtained by conjugated polymer wrapping sorting technique followed by solution deposition and can be utilized as channel materials of field-effect transistors and absorbing layers of photodiodes. However, after the deposition process, there are still polymer molecules wrapping around nanotubes, remaining between nanotubes, and remaining on the thin-film surface, which will cause large nanotube-electrode resistance and tube-tube resistance. Here, we demonstrate an yttrium oxide coating-and-decoating technique that can remove polymers only around electrodes and thus improve the performance of photodiodes without inducing new defects in the device channel. After the treatment of only the contact area, the average short-circuit current of a photodiode increases from 9.1 to 10.7 nA, whereas the average open-circuit voltage increases from 0.25 to 0.30 V. This method also improves device uniformity significantly.

Solution-Processing of High-Purity Semiconducting Single-Walled Carbon Nanotubes for Electronics Devices

High-purity semiconducting single-walled carbon nanotubes (s-SWCNTs) are of paramount significance for the construction of next-generation electronics. Until now, a number of elaborate sorting and purification techniques for s-SWCNTs have been developed, among which solution-based sorting methods show unique merits in the scale production, high purity, and large-area film formation. Here, the recent progress in the solution processing of s-SWCNTs and their application in electronic devices is systematically reviewed. First, the solution-based sorting and purification of s-SWCNTs are described, and particular attention is paid to the recent advance in the conjugated polymer-based sorting strategy. Subsequently, the solution-based deposition and morphology control of a s-SWCNT thin film on a surface are introduced, which focus on the strategies for network formation and alignment of SWCNTs. Then, the recent advances in electronic devices based on s-SWCNTs are reviewed with emphasis on nanoscale s-SWCNTs' high-performance integrated circuits and s-SWCNT-based thin-film transistors (TFT) array and circuits. Lastly, the existing challenges and development trends for the s-SWCNTs and electronic devices are briefly discussed. The aim is to provide some useful information and inspiration for the sorting and purification of s-SWCNTs, as well as the construction of electronic devices with s-SWCNTs.

Origins of the variability of the electrical characteristics of solution-processed carbon nanotube thin-film transistors and integrated circuits

Carbon nanotube (CNT) thin-film transistors based on solution processing have great potential for use in future flexible and wearable device technologies. However, the considerable variability of their electrical characteristics remains a significant obstacle to their practical use. In this work, we investigated the origins of the variability of these electrical characteristics by performing statistical analysis based on spatial autocorrelation and Monte Carlo simulation. The spatial autocorrelation of the on-current decreased with increasing distance on the order of millimetres, showing that macroscopic non-uniformity of the CNT density was one of the causes of the characteristic variability. In addition, even in the local regime where the macroscopic variability is negligible, the variability was greater than that expected based on the Monte Carlo simulation. The CNT aggregation could be attributed to microscopic variability. We also investigated the variability of the properties of integrated circuits such as inverters and ring oscillators fabricated on flexible plastic film. All of the inverters worked well, and their threshold voltage variations were fairly small. As the number of stages in the ring oscillator increased, the yield decreased, although the oscillation frequency variability improved.

Carbon Nanotube Thin Films for High-Performance Flexible Electronics Applications

Carbon nanotube thin films have attracted considerable attention because of their potential use in flexible/stretchable electronics applications, such as flexible displays and wearable health monitoring devices. Due to recent progress in the post-purification processes of carbon nanotubes, high-purity semiconducting carbon nanotubes can be obtained for thin-film transistor applications. One of the key challenges for the practical use of carbon nanotube thin-film transistors is the thin-film formation technology, which is required for achieving not only high performance but also uniform device characteristics. In this paper, after describing the fundamental thin-film formation techniques, we review the recent progress of thin-film formation technologies for carbon nanotube-based flexible electronics.

Obtaining high mechanical performance silk fibers by feeding purified carbon nanotube/lignosulfonate composite to silkworms

Silkworm fibers have attracted widespread attention for their superb glossy texture and promising mechanical performance. The mechanical properties can be reinforced with carbon nanofillers, particularly carbon nanotubes (CNTs), depending on the CNT content in the silk fibers. In order to increase the CNT content, lignosulfonate (LGS) was used as a surfactant to ameliorate the CNT solubility, dispersibility, and biocompatibility. The resulting CNT/LGS nano-composite was further processed through an additional purification method to remove excess surfactant and enhance the CNT/LGS ratio. Then the purified biocompatible single and multiple-walled CNTs were fed to silkworms, leading to a large CNT content in the resulting silk fibers. Reinforced silk fibers were produced with a mechanical strength as high as 1.07 GPa and a strain of 16.8%. The toughness modulus is 1.69 times than that of the unpurified group. The CNT-embedded silk fibers were characterized via Raman spectrometry and thermogravimetric analysis (TGA), demonstrating that the CNT content in the silk fibers increased 1.5-fold in comparison to the unpurified group. The increased CNT content not only contributed to the self-assembly into buffering knots of silk fibers, but it also enhanced the conductivity of graphitized silk. Our coating and purification strategies provide a potential facile way to obtain natural silk fibers with high mechanical performance.

Silkworm fibers have attracted widespread attention for their superb glossy texture and promising mechanical performance.

Controllable etching-induced contact enhancement for high-performance carbon nanotube thin-film transistors

Semiconducting single-walled carbon nanotubes (s-SWNTs) show great promises in advanced electronics. However, contact resistance between the nanotubes and metal electrode has long been a bottleneck to the development of s-SWNTs in high-performance electronic devices. Here we demonstrate a simple and controllable strategy for enhancing the electrode contact and therefore the performance of s-SWNT thin film transistors by plasma etching treatment, which effectively removes the polymer residues, including the photoresist and the conjugated molecules, adsorbed on the surface of s-SWNTs. As a result, the contact resistance is reduced by 3 times and the carrier mobility rises by up to 70%. Our method is compatible with current silicon semiconductor processing technology, making it a viable effective approach to large-scale application of s-SWNTs in the electronics industry.

Controllable plasma etching induced contact enhancement for high-performance carbon nanotube thin-film transistors and analysis of the mechanism.

Aligning Solution-Derived Carbon Nanotube Film with Full Surface Coverage for High-Performance Electronics Applications

The main challenge for application of solution-derived carbon nanotubes (CNTs) in high performance field-effect transistor (FET) is how to align CNTs into an array with high density and full surface coverage. A directional shrinking transfer method is developed to realize high density aligned array based on randomly orientated CNT network film. Through transferring a solution-derived CNT network film onto a stretched retractable film followed by a shrinking process, alignment degree and density of CNT film increase with the shrinking multiple. The quadruply shrunk CNT films present well alignment, which is identified by the polarized Raman spectroscopy and electrical transport measurements. Based on the high quality and high density aligned CNT array, the fabricated FETs with channel length of 300 nm present ultrahigh performance including on-state current I_on of 290 µA µm^-1 (V_ds = -1.5 V and V_gs = -2 V) and peak transconductance g_m of 150 µS µm^-1 , which are, respectively, among the highest corresponding values in the reported CNT array FETs. High quality and high semiconducting purity CNT arrays with high density and full coverage obtained through this method promote the development of high performance CNT-based electronics.

Scalable Preparation of High-Density Semiconducting Carbon Nanotube Arrays for High-Performance Field-Effect Transistors

Although chemical vapor deposition (CVD)-grown carbon nanotube (CNT) arrays are considered ideal materials for constructing high-performance field-effect transistors (FETs) and integrated circuits (ICs), a significant gap remains between the required and achieved densities and purities of CNT arrays. Here, we develop a directional shrinking transfer method to realize up to 10-fold density amplification of CNT array films without introducing detectable damage or defects. In addition, the method improves the film uniformity while retaining the perfect alignment and high carrier mobility of 1600 cm² V^-1 s^-1 of CVD-grown CNT arrays. By combining the density amplification method with the thermocapillary flow method developed by Rogers et al., semiconducting CNT arrays with high densities and high qualities are obtained. High-performance FETs with a channel length of 200 nm are demonstrated using these high-density semiconducting CNT arrays, yielding a record-high on-state current density of 150 μA/μm, a peak transconductance of 80 μS/μm, and a current on/off ratio of more than 10⁴ among the CVD-grown CNT-based FETs.

Wearable Electrocardiogram Monitor Using Carbon Nanotube Electronics and Color-Tunable Organic Light-Emitting Diodes

With the rapid advances in wearable electronics, the research on carbon-based and/or organic materials and devices has become increasingly important, owing to their advantages in terms of cost, weight, and mechanical deformability. Here, we report an effective material and device design for an integrative wearable cardiac monitor based on carbon nanotube (CNT) electronics and voltage-dependent color-tunable organic light-emitting diodes (CTOLEDs). A p-MOS inverter based on four CNT transistors allows high amplification and thereby successful acquisition of the electrocardiogram (ECG) signals. In the CTOLEDs, an ultrathin exciton block layer of bis[2-(diphenylphosphino)phenyl]ether oxide is used to manipulate the balance of charges between two adjacent emission layers, bis[2-(4,6-difluorophenyl)pyridinato-C²,N](picolinato)iridium(III) and bis(2-phenylquinolyl-N,C(2'))iridium(acetylacetonate), which thereby produces different colors with respect to applied voltages. The ultrathin nature of the fabricated devices supports extreme wearability and conformal integration of the sensor on human skin. The wearable CTOLEDs integrated with CNT electronics are used to display human ECG changes in real-time using tunable colors. These materials and device strategies provide opportunities for next generation wearable health indicators.

Investigating Limiting Factors in Stretchable All-Carbon Transistors for Reliable Stretchable Electronics

Stretchable form factors enable electronic devices to conform to irregular 3D structures, including soft and moving entities. Intrinsically stretchable devices have potential advantages of high surface coverage of active devices, improved durability, and reduced processing costs. This work describes intrinsically stretchable transistors composed of single-walled carbon nanotube (SWNT) electrodes and semiconductors and a dielectric that consists of a nonpolar elastomer. The use of a nonpolar elastomer dielectric enabled hysteresis-free device characteristics. Compared to devices on SiO₂ dielectrics, stretchable devices with nonpolar dielectrics showed lower mobility in ambient conditions because of the absence of doping from water. The effect of a SWNT band gap on device characteristics was investigated by using different SWNT sources as the semiconductor. Large-band-gap SWNTs exhibited trap-limited behavior caused by the low capacitance of the dielectric. In contrast, high-current devices based on SWNTs with smaller band gaps were more limited by contact resistance. Of the tested SWNT sources, SWNTs with a maximum diameter of 1.5 nm performed the best, with a mobility of 15.4 cm²/Vs and an on/off ratio >10³ for stretchable transistors. Large-band-gap devices showed increased sensitivity to strain because of a pronounced dependence on the dielectric thickness, whereas contact-limited devices showed substantially less strain dependence.

Spatially Selective, High-Density Placement of Polyfluorene-Sorted Semiconducting Carbon Nanotubes in Organic Solvents

High-performance logic based on carbon nanotubes (CNTs) requires high-density arrays of selectively placed semiconducting CNTs. Although polymer-wrapping methods can allow CNTs to be sorted to a >99.9% semiconducting purity, patterning these polymer-wrapped CNTs is an outstanding problem. We report the directed self-assembly of polymer-coated semiconducting CNTs using self-assembled monolayers that bind CNTs into arrays of patterned trenches. We demonstrate that CNTs can be placed into 100 nm wide HfO₂ trenches with an electrical connection yield as high as 90% and into 50 nm wide trenches with a yield as high as 70%. Our directed self-assembly method is an important step forward in pitch scaling.

Exploring the upper limit of single-walled carbon nanotube purity by multiple-cycle aqueous two-phase separation

Ultrahigh purity semiconducting single-walled carbon nanotubes (S-SWCNTs) are required for high-performance transistors. Aqueous two-phase (ATP) separation is an attractive method to obtain such SWCNTs due to its simplicity and scalability. This work targeted two questions; namely what is the upper limit of S-SWCNT purity that can be achieved by multiple cycles of ATP separation from the most commonly used polyethylene glycol and dextran system and how accurately can commonly used methods characterize the improvement in purity? SWCNT purity in nanotube dispersions obtained by multi-cycle ATP separation (2, 4, 6 and 8 cycles) was evaluated by three methods, including UV-vis-NIR absorption spectroscopy analysis, performance of thin-film field effect transistors (FETs) prepared by drop casting and short-channel FET devices prepared by dielectrophoresis deposition. Absorption spectroscopic analysis and the performance of the thin-film FET devices can hardly differentiate metallic SWCNT residues in the dispersions obtained after 4 cycles with the purity above 99.5%, and the short channel FET devices prepared by dielectrophoresis deposition are more sensitive towards tiny metallic SWCNT residues. A new method was also demonstrated to visualize the minor metallic content in the nanotube suspension using voltage contrast imaging in a scanning electron microscope, which enables rapid screening of many devices and the accurate obtainment of metallic content without performing a large number of individual transconductance measurements.

Universal Selective Dispersion of Semiconducting Carbon Nanotubes from Commercial Sources Using a Supramolecular Polymer

Selective extraction of semiconducting carbon nanotubes is a key step in the production of high-performance, solution-processed electronics. Here, we describe the ability of a supramolecular sorting polymer to selectively disperse semiconducting carbon nanotubes from five commercial sources with diameters ranging from 0.7 to 2.2 nm. The sorting purity of the largest-diameter nanotubes (1.4 to 2.2 nm; from Tuball) was confirmed by short channel measurements to be 97.5%. Removing the sorting polymer by acid-induced disassembly increased the transistor mobility by 94 and 24% for medium-diameter and large-diameter carbon nanotubes, respectively. Among the tested single-walled nanotube sources, the highest transistor performance of 61 cm²/V·s and on/off ratio >10⁴ were realized with arc discharge carbon nanotubes with a diameter range from 1.2 to 1.7 nm. The length and quality of nanotubes sorted from different sources is compared using measurements from atomic force microscopy and Raman spectroscopy. The transistor mobility is found to correlate with the G/D ratio extracted from the Raman spectra.

Influence of Asymmetric Contact Form on Contact Resistance and Schottky Barrier, and Corresponding Applications of Diode

We have fabricated carbon nanotube and MoS₂ field-effect transistors with asymmetric contact forms of source-drain electrodes, from which we found the current directionality of the devices and different contact resistances under the two current directions. By designing various structures, we can conclude that the asymmetric electrical performance was caused by the difference in the effective Schottky barrier height (Φ_SB) caused by the different contact forms. A detailed temperature-dependent study was used to extract and compare the Φ_SB for both contact forms of CNT and MoS₂ devices; we found that the Φ_SB for the metal-on-semiconductor form was much lower than that of the semiconductor-on-metal form and is suitable for all p-type, n-type, or ambipolar semiconductors. This conclusion is meaningful with respect to the design and application of nanomaterial electronic devices. Additionally, using the difference in barrier height caused by the contact forms, we have also proposed and fabricated Schottky barrier diodes with a current ratio up to 10⁴; rectifying circuits consisting of these diodes were able to work in a wide frequency range. This design avoided the use of complex chemical doping or heterojunction methods to achieve fundamental diodes that are relatively simple and use only a single material; these may be suitable for future application in nanoelectronic radio frequency or integrated circuits.

Carbon nanotube radio-frequency electronics

Carbon nanotube (CNT) is considered a promising material for radio-frequency (RF) applications, owing to its high carrier mobility and saturated drift velocity, as well as ultra-small intrinsic gate capacitance. Here, we review progress on CNT-based devices and integrated circuits for RF applications, including theoretical projection of RF performance of CNT-based devices, preparation of CNT materials, fabrication, optimization of RF field-effect transistors (FETs) structures, and ambipolar FET-based RF applications, and we outline challenges and prospects of CNT-based RF applications.

Hysteresis-Free Carbon Nanotube Field-Effect Transistors

While carbon nanotube (CNT) field-effect transistors (CNFETs) promise high-performance and energy-efficient digital systems, large hysteresis degrades these potential CNFET benefits. As hysteresis is caused by traps surrounding the CNTs, previous works have shown that clean interfaces that are free of traps are important to minimize hysteresis. Our previous findings on the sources and physics of hysteresis in CNFETs enabled us to understand the influence of gate dielectric scaling on hysteresis. To begin with, we validate through simulations how scaling the gate dielectric thickness results in greater-than-expected benefits in reducing hysteresis. Leveraging this insight, we experimentally demonstrate reducing hysteresis to <0.5% of the gate-source voltage sweep range using a very large-scale integration compatible and solid-state technology, simply by fabricating CNFETs with a thin effective oxide thickness of 1.6 nm. However, even with negligible hysteresis, large subthreshold swing is still observed in the CNFETs with multiple CNTs per transistor. We show that the cause of large subthreshold swing is due to threshold voltage variation between individual CNTs. We also show that the source of this threshold voltage variation is not explained solely by variations in CNT diameters (as is often ascribed). Rather, other factors unrelated to the CNTs themselves (i.e., process variations, random fixed charges at interfaces) are a significant factor in CNT threshold voltage variations and thus need to be further improved.

Recycling Strategy for Fabricating Low-Cost and High-Performance Carbon Nanotube TFT Devices

High-purity semiconducting single-walled carbon nanotubes (s-SWNTs) can be obtained by conjugated polymer wrapping. However, further purification of sorted s-SWNTs and high costs of raw materials are still challenges to practical applications. It is inevitable that a lot of polymers still cover the surface of s-SWNTs after separation, and the cost of the polymer is relatively higher than that of SWNTs. Here, we demonstrated a facile isolated process to improve the quality of s-SWNT solutions and films significantly. Compared with the untreated s-SWNTs, the contact resistance between the s-SWNT and the electrode is reduced by 20 times, and the thin-film transistors show 300% enhancement of current density. In this process, most of the polymers can be recycled and reused directly without any purification, which can greatly decrease the cost for s-SWNT separation. The results presented herein demonstrate a new scalable and low-cost approach for large-scale application of s-SWNTs in the electronics industry.

Low Hysteresis Carbon Nanotube Transistors Constructed via a General Dry-Laminating Encapsulation Method on Diverse Surfaces

Electrical hysteresis in carbon nanotube thin-film transistor (CNTTFT) due to surface adsorption of H₂O/O₂ is a severe obstacle for practical applications. The conventional encapsulation methods based on vacuum-deposited inorganic materials or wet-coated organic materials have some limitations. In this work, we develop a general and highly efficient dry-laminating encapsulation method to reduce the hysteresis of CNTTFTs, which may simultaneously realize the construction and encapsulation of CNTTFT. Furthermore, by virtue of dry procedure and wide compatibility of PMMA, this method is suitable for the construction of CNTTFT on diverse surface including both inorganic and organic dielectric materials. Significantly, the dry-encapsulated CNTTFT exhibits very low or even negligible hysteresis with good repeatability and air stability, which is greatly superior to the nonencapsulated and wet-encapsulated CNTTFT with spin-coated PMMA. The dry-laminating encapsulation strategy, a kind of technological innovation, resolves a significant problem of CNTTFT and therefore will be promising in facile transferring and packaging the CNT films for high-performance optoelectronic devices.

High-Performance Complementary Transistors and Medium-Scale Integrated Circuits Based on Carbon Nanotube Thin Films

Solution-derived carbon nanotube (CNT) network films with high semiconducting purity are suitable materials for the wafer-scale fabrication of field-effect transistors (FETs) and integrated circuits (ICs). However, it is challenging to realize high-performance complementary metal-oxide semiconductor (CMOS) FETs with high yield and stability on such CNT network films, and this difficulty hinders the development of CNT-film-based ICs. In this work, we developed a doping-free process for the fabrication of CMOS FETs based on solution-processed CNT network films, in which the polarity of the FETs was controlled using Sc or Pd as the source/drain contacts to selectively inject carriers into the channels. The fabricated top-gated CMOS FETs showed high symmetry between the characteristics of n- and p-type devices and exhibited high-performance uniformity and excellent scalability down to a gate length of 1 μm. Many common types of CMOS ICs, including typical logic gates, sequential circuits, and arithmetic units, were constructed based on CNT films, and the fabricated ICs exhibited rail-to-rail outputs because of the high noise margin of CMOS circuits. In particular, 4-bit full adders consisting of 132 CMOS FETs were realized with 100% yield, thereby demonstrating that this CMOS technology shows the potential to advance the development of medium-scale CNT-network-film-based ICs.

Radiation-Hard Complementary Integrated Circuits Based on Semiconducting Single-Walled Carbon Nanotubes

Increasingly complex demonstrations of integrated circuit elements based on semiconducting single-walled carbon nanotubes (SWCNTs) mark the maturation of this technology for use in next-generation electronics. In particular, organic materials have recently been leveraged as dopant and encapsulation layers to enable stable SWCNT-based rail-to-rail, low-power complementary metal-oxide-semiconductor (CMOS) logic circuits. To explore the limits of this technology in extreme environments, here we study total ionizing dose (TID) effects in enhancement-mode SWCNT-CMOS inverters that employ organic doping and encapsulation layers. Details of the evolution of the device transport properties are revealed by in situ and in operando measurements, identifying n-type transistors as the more TID-sensitive component of the CMOS system with over an order of magnitude larger degradation of the static power dissipation. To further improve device stability, radiation-hardening approaches are explored, resulting in the observation that SWNCT-CMOS circuits are TID-hard under dynamic bias operation. Overall, this work reveals conditions under which SWCNTs can be employed for radiation-hard integrated circuits, thus presenting significant potential for next-generation satellite and space applications.

Carbon Nanotube Thin Film Transistors for Flat Panel Display Application

Carbon nanotubes (CNTs) are promising materials for both high performance transistors for high speed computing and thin film transistors for macroelectronics, which can provide more functions at low cost. Among macroelectronics applications, carbon nanotube thin film transistors (CNT-TFT) are expected to be used soon for backplanes in flat panel displays (FPDs) due to their superior performance. In this paper, we review the challenges of CNT-TFT technology for FPD applications. The device performance of state-of-the-art CNT-TFTs are compared with the requirements of TFTs for FPDs. Compatibility of the fabrication processes of CNT-TFTs and current TFT technologies are critically examined. Though CNT-TFT technology is not yet ready for backplane production line of FPDs, the challenges can be overcome by close collaboration between research institutes and FPD manufacturers in the short term.