Vertically stacked multi-heterostructures of layered materials for logic transistors and complementary inverters

Recent advances in CMOS-compatible synthesis and integration of 2D materials

The upcoming generation of functional electronics in the era of artificial intelligence, and IoT requires extensive data storage and processing, necessitating further device miniaturization. Conventional Si CMOS technology is struggling to enhance integration density beyond a certain limit to uphold Moore's law, primarily due to performance degradation at smaller dimensions caused by various physical effects, including surface scattering, quantum tunneling, and other short-channel effects. The two-dimensional materials have emerged as highly promising alternatives, which exhibit excellent electrical and mechanical properties at atomically thin thicknesses and show exceptional potential for future CMOS technology. This review article presents the chronological progress made in the development of two-dimensional materials-based CMOS devices with comprehensively discussing the advancements made in material production, device development, associated challenges, and the strategies to address these issues. The future prospects for the use of two-dimensional materials in functional CMOS circuitry are outlooked, highlighting key opportunities and challenges toward industrial adaptation.

Enormous Out-of-Plane Charge Rectification and Conductance through Two-Dimensional Monolayers

Heterogeneous integration of emerging two-dimensional (2D) materials with mature three-dimensional (3D) silicon-based semiconductor technology presents a promising approach for the future development of energy-efficient, function-rich nanoelectronic devices. In this study, we designed a mixed-dimensional junction structure in which a 2D monolayer (e.g., graphene, MoS2, and h-BN) is sandwiched between a metal (e.g., Ti, Au, and Pd) and a 3D semiconductor (e.g., p-Si) to investigate charge transport properties exclusively in an out-of-plane (OoP) direction. The role of 2D monolayers as either an OoP metal-to-semiconductor charge injection barrier or an OoP semiconductor-to-metal charge collection barrier was comparatively evaluated. Compared to monolayer graphene, monolayer MoS2 and h-BN effectively modulate OoP metal-to-semiconductor charge injection through a barrier tunneling effect. Their effective OoP resistance and resistivity were extracted using a resistors-in-series model. Intriguingly, when functioning as a semiconductor-to-metal charge collection barrier, all 2D monolayers become electronically "transparent" (close to zero resistance) when a high OoP voltage (greater than the built-in voltage) is applied. As a mixed-dimensional integrated diode, the Ti/MoS2/p-Si and Au/MoS2/p-Si configurations exhibit both high OoP rectification ratios (5.4 × 104) and conductance (1.3 × 105 S/m2). Our work demonstrates the tunable OoP charge transport characteristics at a 2D/3D interface, suggesting the opportunity for 2D/3D heterogeneous integration, even with sub-1 nm thick 2D monolayers, to enhance modern Si-based electronic devices.

High Current Gain MoS2 Bipolar Junction Transistor Based on Metal-Semiconductor Schottky Contacts

Bipolar junction transistors (BJTs) are crucial components in high-power electronic applications. However, while two-dimensional (2D) semiconductors with exceptional electrical properties have been extensively studied in field-effect transistors, their application in BJTs has received far less attention. In this study, we demonstrate high-gain MoS2 BJTs based on metal-semiconductor Schottky contacts. The emitter-base junction uses the thermal ionization properties of a Schottky diode to emit electrons, while the collector-base junction leverages the Schottky barrier to collect electrons. This design enables thermal ionization of electrons into the base region, where they are subsequently accelerated and transferred to the collector region under the influence of the collector-base junction voltage. Our MoS2 BJTs achieves a common-base current gain 0.99 and a remarkable common-emitter current gain of 1967, representing the highest performance reported for BJTs based on 2D semiconductors to date, which is comparable to traditional silicon-based BJTs.

P-Type Vertical FETs Realized by Using Fermi-Level Pinning-Free 2D Metallic Electrodes

In two-dimensional (2D) nanomaterial electronics, vertical field-effect transistors (VFETs), where charges flow perpendicular to the channel materials, hold promise due to the ease of forming ultrashort channel lengths by utilizing the thinness of 2D materials. However, the poor performance of p-type VFET arises from the lack of a gate-field-penetrating electrode with suitable work functions, which is essential for VFET operation. This motivated us to replace graphene (work function of ∼4.5 eV) with a high-work-function electrode to achieve the desired VFET characteristics. In this study, we demonstrate that WSe2-based p-type VFETs with a high on/off ratio of ∼105 can be realized using van-der-Waals contacts formed with high-work-function 2D metals (i.e., 2H-TaS2, NbSe2, and NbS2), which form a p-type ohmic contact to the WSe2 channel by suppressing Fermi-level pinning. Furthermore, we successfully fabricate a 2D metal-incorporating pseudocomplementary FET structure, demonstrating a great potential to significantly reduce the scaling factor by dense structure and vertical operation.

High Electrical Conductance in Magnetic Emission Junction of Fe3GeTe2/ZnO/Ni Heterostructure via Selective Spin Emission through ZnO Ohmic Barrier

The insulator is essential for magnetic tunneling junction (MTJ) that increases magnetoresistance (MR) by decoupling magnetization directions between two ferromagnets. However, wide bandgap tunnel barrier blocks the thermionic emission of electrons, significantly reducing electrical conductance through MTJ. Here, a magnetic emission junction (MEJ) is demonstrated for the first time using an Fe3GeTe2 (FGT)/ZnO/Ni heterostructure with very high electrical conductance. The conduction band of ZnO (electron affinity 4.6 eV) aligns with Fermi levels (EF) of FGT (4.47 eV) and Ni (4.58 eV) ferromagnets and forms an Ohmic barrier, enabling free spin-electron emission through ZnO barrier and high electrical conductance. In contrast to the typical positive MR in MTJ by majority spin tunneling, negative MR is observed in FGT/ZnO/Ni MEJ. The minority spin electrons of Ni, with maximum states near the EF, are dominantly emitted to FGT over the ZnO barrier, while majority spin electrons of Ni, with maximum states below the EF, are blocked by it. In the FGT/FGT/ZnO/Ni heterostructure, the MR ratio is further increased by combining positive and negative MR at the MTJ (FGT/FGT) and MEJ (FGT/ZnO/Ni), respectively. As a result, FGT-MEJ exhibits 10-1000 orders higher conductance than other 2D-MTJs, while MR ratio remains similar to other 2D-MTJs.

Molecular Reconfiguration of Disordered Tellurium Oxide Transistors with Biomimetic Spectral Selectivity

Reconfigurable devices with field-effect transistor features and neuromorphic behaviors are promising for enhancing data processing capability and reducing power consumption in next-generation semiconductor platforms. However, commonly used 2D materials for reconfigurable devices require additional modulation terminals and suffer from complex and stringent operating rules to obtain specific functionalities. Here, a p-type disordered tellurium oxide is introduced that realizes dual-mode reconfigurability as a logic transistor and a neuromorphic device. Due to the disordered film surface, the enhanced adsorption of oxygen molecules and laser-induced desorption concurrently regulate the carrier concentration in the channel. The device exhibits high-performance p-type characteristics with a field-effect hole mobility of 10.02 cm2 V-1 s-1 and an Ion/Ioff ratio exceeding 106 in the transistor mode. As a neuromorphic device, the vision system exhibits biomimetic bee vision, explicitly responding to the blue-to-ultraviolet light. Finally, in-sensor denoising and invisible image recognition in static and dynamic scenarios are achieved.

Nanomaterials for Flexible Neuromorphics

The quest to imbue machines with intelligence akin to that of humans, through the development of adaptable neuromorphic devices and the creation of artificial neural systems, has long stood as a pivotal goal in both scientific inquiry and industrial advancement. Recent advancements in flexible neuromorphic electronics primarily rely on nanomaterials and polymers owing to their inherent uniformity, superior mechanical and electrical capabilities, and versatile functionalities. However, this field is still in its nascent stage, necessitating continuous efforts in materials innovation and device/system design. Therefore, it is imperative to conduct an extensive and comprehensive analysis to summarize current progress. This review highlights the advancements and applications of flexible neuromorphics, involving inorganic nanomaterials (zero-/one-/two-dimensional, and heterostructure), carbon-based nanomaterials such as carbon nanotubes (CNTs) and graphene, and polymers. Additionally, a comprehensive comparison and summary of the structural compositions, design strategies, key performance, and significant applications of these devices are provided. Furthermore, the challenges and future directions pertaining to materials/devices/systems associated with flexible neuromorphics are also addressed. The aim of this review is to shed light on the rapidly growing field of flexible neuromorphics, attract experts from diverse disciplines (e.g., electronics, materials science, neurobiology), and foster further innovation for its accelerated development.

Two-Dimensional Vertical Transistor with One-Dimensional van der Waals Contact

Two-dimensional (2D) materials enable vertical field effect transistors (VFETs), which provide an alternative path for scaling down the channels of transistors. The challenge is the short channel effect when the thickness of the 2D channel decreases to ∼10 nm. Here, we show that a VFET with an ultrashort channel can be accomplished by employing a semimetal carbon nanotube (CNT) as a 1D van der Waals (vdW) contact. The CNT-VFETs with 5-10 nm MoS2 channels exhibit high on/off ratios exceeding 105, low subthreshold swing values of 160-120 mV/dec, and high current densities over 104 A/cm2. Such a switch even works with an ∼ 3.4 nm thick channel. The excellent comprehensive performance can be ascribed to the reduced short channel effect as the sub-2 nm CNT contact has weaker electrostatic screening to the gate, a reduced Fermi level pinning effect, and a highly tunable barrier. The VFETs with 1D vdW contacts hold great promise for ultrascaled transistors and are prospective in future nanoelectronics and nano-optoelectronics.

Topological van der Waals Contact for Two-Dimensional Semiconductors

The relentless miniaturization inherent in complementary metal-oxide semiconductor technology has created challenges at the interface of two-dimensional (2D) materials and metal electrodes. These challenges, predominantly stemming from metal-induced gap states (MIGS) and Schottky barrier heights (SBHs), critically impede device performance. This work introduces an innovative implementation of damage-free Sb2Te3 topological van der Waals (T-vdW) contacts, representing an ultimate contact electrode for 2D materials. We successfully fabricate p-type and n-type transistors using monolayer and multilayer WSe2, achieving ultralow SBH (∼24 meV) and contact resistance (∼0.71 kΩ·μm). Simulations highlight the role of topological surface states in Sb2Te3, which effectively mitigate the MIGS effect, thereby significantly elevating device efficiency. Our experimental insights revealed the semiohmic behavior of Sb2Te3 T-vdW contacts, with an exceptional photoresponsivity of 716 A/W and rapid response times of approximately 60 μs. The findings presented herein herald topological contacts as a superior alternative to traditional metal contacts, potentially revolutionizing the performance of miniaturized electronic and optoelectronic devices.

Thermally tunable anti-ambipolar heterojunction devices

Two-dimensional materials and their van der Waals heterostructures have emerged as a research focal point for constructing various innovative electronic devices due to their distinct photonic and electronic properties. Among them, anti-ambipolar devices, characterized by their unique nonlinear electrical behavior, have garnered attention as novel multifunctional components, positioning them as potential contenders for building multi-state logic devices. Utilizing the properties of few-layer As0.4P0.6 and PdSe2, we have constructed an anti-ambipolar heterojunction device. At 300 K, the device exhibits a peak voltage (Vpeak) of -3 V and a peak-to-valley ratio (PVR) close to 8 × 103, and the PVR can be modulated by bias voltage. Furthermore, by characterizing the anti-ambipolar attributes at different temperatures ranging from 80 K to 330 K, we have elucidated the thermally tunable feature of the device. At 330 K, a certain PVR (∼103) and a large Vpeak (∼-16 V) are obtained, while a PVR exceeding 108 has been achieved at 80 K. This temperature-related sensitivity empowers the device with significant potential and thermal tunability in various applications.

Synthesis, Modulation, and Application of Two-Dimensional TMD Heterostructures

Two-dimensional (2D) transition metal dichalcogenide (TMD) heterostructures have attracted a lot of attention due to their rich material diversity and stack geometry, precise controllability of structure and properties, and potential practical applications. These heterostructures not only overcome the inherent limitations of individual materials but also enable the realization of new properties through appropriate combinations, establishing a platform to explore new physical and chemical properties at micro-nano-pico scales. In this review, we systematically summarize the latest research progress in the synthesis, modulation, and application of 2D TMD heterostructures. We first introduce the latest techniques for fabricating 2D TMD heterostructures, examining the rationale, mechanisms, advantages, and disadvantages of each strategy. Furthermore, we emphasize the importance of characteristic modulation in 2D TMD heterostructures and discuss some approaches to achieve novel functionalities. Then, we summarize the representative applications of 2D TMD heterostructures. Finally, we highlight the challenges and future perspectives in the synthesis and device fabrication of 2D TMD heterostructures and provide some feasible solutions.

Large-scale sub-5-nm vertical transistors by van der Waals integration

Vertical field effect transistor (VFET), in which the semiconductor is sandwiched between source/drain electrodes and the channel length is simply determined by the semiconductor thickness, has demonstrated promising potential for short channel devices. However, despite extensive efforts over the past decade, scalable methods to fabricate ultra-short channel VFETs remain challenging. Here, we demonstrate a layer-by-layer transfer process of large-scale indium gallium zinc oxide (IGZO) semiconductor arrays and metal electrodes, and realize large-scale VFETs with ultra-short channel length and high device performance. Within this process, the oxide semiconductor could be pre-deposited on a sacrificial wafer, and then physically released and sandwiched between metals, maintaining the intrinsic properties of ultra-scaled vertical channel. Based on this lamination process, we realize 2 inch-scale VFETs with channel length down to 4 nm, on-current over 800 A/cm2, and highest on-off ratio up to 2 × 105, which is over two orders of magnitude higher compared to control samples without laminating process. Our study not only represents the optimization of VFETs performance and scalability at the same time, but also offers a method of transfer large-scale oxide arrays, providing interesting implication for ultra-thin vertical devices.

Small Feature-Size Transistors Based on Low-Dimensional Materials: From Structure Design to Nanofabrication Techniques

For several decades after Moore's Law is proposed, there is a continuous effort to reduce the feature-size of transistors. However, as the size of transistors continues to decrease, numerous challenges and obstacles including severe short channel effects (SCEs) are emerging. Recently, low-dimensional materials have provided new opportunities for constructing small feature-size transistors due to their superior electrical properties compared to silicon. Here, state-of-the-art low-dimensional materials-based transistors with small feature-sizes are reviewed. Different from other works that mainly focus on material characteristics of a specific device structure, the discussed topics are utilizing device structure design including vertical structure and nano-gate structure, and nanofabrication techniques to achieve small feature-sizes of transistors. A comprehensive summary of these small feature-size transistors is presented by illustrating their operation mechanism, relevant fabrication processes, and corresponding performance parameters. Besides, the role of small feature-size transistors based on low-dimensional materials in further reducing the small footprint is also clarified and their cutting-edge applications are highlighted. Finally, a comparison and analysis between state-of-art transistors is made, as well as a glimpse into the future research trajectory of low dimensional materials-based small feature-size transistors is briefly outlined.

Enhancing 2D Photonics and Optoelectronics with Artificial Microstructures

By modulating subwavelength structures and integrating functional materials, 2D artificial microstructures (2D AMs), including heterostructures, superlattices, metasurfaces and microcavities, offer a powerful platform for significant manipulation of light fields and functions. These structures hold great promise in high-performance and highly integrated optoelectronic devices. However, a comprehensive summary of 2D AMs remains elusive for photonics and optoelectronics. This review focuses on the latest breakthroughs in 2D AM devices, categorized into electronic devices, photonic devices, and optoelectronic devices. The control of electronic and optical properties through tuning twisted angles is discussed. Some typical strategies that enhance light-matter interactions are introduced, covering the integration of 2D materials with external photonic structures and intrinsic polaritonic resonances. Additionally, the influences of external stimuli, such as vertical electric fields, enhanced optical fields and plasmonic confinements, on optoelectronic properties is analysed. The integrations of these devices are also thoroughly addressed. Challenges and future perspectives are summarized to stimulate research and development of 2D AMs for future photonics and optoelectronics.

The Rise of Xene Hybrids

Xenes, mono-elemental atomic sheets, exhibit Dirac/Dirac-like quantum behavior. When interfaced with other 2D materials such as boron nitride, transition metal dichalcogenides, and metal carbides/nitrides/carbonitrides, it enables them with unique physicochemical properties, including structural stability, desirable bandgap, efficient charge carrier injection, flexibility/breaking stress, thermal conductivity, chemical reactivity, catalytic efficiency, molecular adsorption, and wettability. For example, BN acts as an anti-oxidative shield, MoS2 injects electrons upon laser excitation, and MXene provides mechanical flexibility. Beyond precise compositional modulations, stacking sequences, and inter-layer coupling controlled by parameters, achieving scalability and reproducibility in hybridization is crucial for implementing these quantum materials in consumer applications. However, realizing the full potential of these hybrid materials faces challenges such as air gaps, uneven interfaces, and the formation of defects and functional groups. Advanced synthesis techniques, a deep understanding of quantum behaviors, precise control over interfacial interactions, and awareness of cross-correlations among these factors are essential. Xene-based hybrids show immense promise for groundbreaking applications in quantum computing, flexible electronics, energy storage, and catalysis. In this timely perspective, recent discoveries of novel Xenes and their hybrids are highlighted, emphasizing correlations among synthetic parameters, structure, properties, and applications. It is anticipated that these insights will revolutionize diverse industries and technologies.

Effect of doping and defects on the electronic properties of MoS2/WSe2 bilayer heterostructure: a first-principles study

This work studies the effect of Nb, Mo, Re dopant, and Se vacancy in WSe2 on the electronic and optical properties of the MoS2/WSe2 bilayer heterostructure based on first-principles calculations. Our research shows that the MoS2/WSe2 bilayer heterostructure exhibits a type-II band alignment with a valence band offset (VBO) of 1.07 eV and a conduction band offset (CBO) of 1.00 eV. It also shows that different dopants or defects can considerably modulate the energy band alignment and interlayer charge transfer of the heterostructure. Owing to the orbital hybridization of the dopant atoms with other atoms and the consequent enhancement of the coupling between the two structural layers, a transition of the band alignment from type-II to type-I is realized with the Re dopant. The effect of doping and defects on the electronic properties of heterojunctions contributes to applications in high-performance optoelectronic devices.

Ultrafast Non-Volatile Floating-Gate Memory Based on All-2D Materials

The explosive growth of massive-data storage and the demand for ultrafast data processing require innovative memory devices with exceptional performance. 2D materials and their van der Waal heterostructures with atomically sharp interfaces hold great promise for innovations in memory devices. Here, this work presents non-volatile, floating-gate memory devices with all functional layers made of 2D materials, achieving ultrafast programming/erasing speeds (20 ns), high extinction ratios (up to 108), and multi-bit storage capability. These devices also exhibit long-term data retention exceeding 10 years, facilitated by a high gate-coupling ratio (GCR) and atomically sharp interfaces between functional layers. Additionally, this work demonstrates the realization of an "OR" logic gate on a single-device unit by synergistic electrical and optical operations. The present results provide a solid foundation for next-generation ultrahigh-speed, ultralong lifespan, non-volatile memory devices, with a potential for scale-up manufacturing and flexible electronics applications.

Two-Dimensional Semiconductors and Transistors for Future Integrated Circuits

Silicon transistors are approaching their physical limit, calling for the emergence of a technological revolution. As the acknowledged ultimate version of transistor channels, 2D semiconductors are of interest for the development of post-Moore electronics due to their useful properties and all-in-one potentials. Here, the promise and current status of 2D semiconductors and transistors are reviewed, from materials and devices to integrated applications. First, we outline the evolution and challenges of silicon-based integrated circuits, followed by a detailed discussion on the properties and preparation strategies of 2D semiconductors and van der Waals heterostructures. Subsequently, the significant progress of 2D transistors, including device optimization, large-scale integration, and unconventional devices, are presented. We also examine 2D semiconductors for advanced heterogeneous and multifunctional integration beyond CMOS. Finally, the key technical challenges and potential strategies for 2D transistors and integrated circuits are also discussed. We envision that the field of 2D semiconductors and transistors could yield substantial progress in the upcoming years and hope this review will trigger the interest of scientists planning their next experiment.

van der Waals Contact for Two-Dimensional Transition Metal Dichalcogenides

Two-dimensional (2D) transition metal dichalcogenides (TMDs) have emerged as highly promising candidates for next-generation electronics owing to their atomically thin structures and surfaces devoid of dangling bonds. However, establishing high-quality metal contacts with TMDs presents a critical challenge, primarily attributed to their ultrathin bodies and delicate lattices. These distinctive characteristics render them susceptible to physical damage and chemical reactions when conventional metallization approaches involving "high-energy" processes are implemented. To tackle this challenge, the concept of van der Waals (vdW) contacts has recently been proposed as a "low-energy" alternative. Within the vdW geometry, metal contacts can be physically laminated or gently deposited onto the 2D channel of TMDs, ensuring the formation of atomically clean and electronically sharp contact interfaces while preserving the inherent properties of the 2D TMDs. Consequently, a considerable number of vdW contact devices have been extensively investigated, revealing unprecedented transport physics or exceptional device performance that was previously unachievable. This review presents recent advancements in vdW contacts for TMD transistors, discussing the merits, limitations, and prospects associated with each device geometry. By doing so, our purpose is to offer a comprehensive understanding of the current research landscape and provide insights into future directions within this rapidly evolving field.

Steep-slope vertical-transport transistors built from sub-5 nm Thin van der Waals heterostructures

Two-dimensional (2D) semiconductor-based vertical-transport field-effect transistors (VTFETs) - in which the current flows perpendicularly to the substrate surface direction - are in the drive to surmount the stringent downscaling constraints faced by the conventional planar FETs. However, low-power device operation with a sub-60 mV/dec subthreshold swing (SS) at room temperature along with an ultra-scaled channel length remains challenging for 2D semiconductor-based VTFETs. Here, we report steep-slope VTFETs that combine a gate-controllable van der Waals heterojunction and a metal-filamentary threshold switch (TS), featuring a vertical transport channel thinner than 5 nm and sub-thermionic turn-on characteristics. The integrated TS-VTFETs were realised with efficient current switching behaviours, exhibiting a current modulation ratio exceeding 1 × 108 and an average sub-60 mV/dec SS over 6 decades of drain current. The proposed TS-VTFETs with excellent area- and energy-efficiency could help to tackle the performance degradation-device downscaling dilemma faced by logic transistor technologies.

Lateral junctions of transition metal dichalcogenides as ballistic channels for straintronic applications

In the context of advanced nanoelectronics, two-dimensional semiconductors such as transition metal dichalcogenides (TMDs) are gaining considerable interest due to their ultimate thinness, clean surface and high carrier mobility. The engineering prospects offered by those materials are further enlarged by the recent realization of atomically sharp TMD-based lateral junctions, whose electronic properties are governed by strain effects arising from the constituents lattice mismatch. Although most theoretical studies considered only misfit strain, first-principles simulations are employed here to investigate the transport properties under external deformation of a three-terminal device constructed from a MoS2/WSe2/MoS2junction. Large modulation of the current is reported owing to the change in band offset, illustrating the importance of strain on the p-n junction characteristics. The device operation is demonstrated for both local and global deformations, even for ultra-short channels, suggesting potential applications for ultra-thin body straintronics.

Towards large scale integration of MoS2/graphene heterostructure with ALD-grown MoS2

In the pursuit of ultrathin and highly sensitive photodetectors, a promising approach involves leveraging the combination of light-sensitive two-dimensional (2D) semiconducting transition-metal dichalcogenides, such as MoS2and the high electrical conductivity of graphene. Over the past decade, exfoliated 2D materials and electron-beam lithography have been used extensively to demonstrate feasibility on single devices. But for these devices to be used in the real-world systems, it is necessary to demonstrate good device performance similar to lab-based devices with repeatability of the results from device to device and a path to large scale manufacturing. To work in this way, a fabrication process of MoS2/graphene vertical heterostructures with a wafer-scale integration in a CMOS compatible foundry environment is evaluated here. Large-scale atomic layer deposition on 8 inch silicon wafers is used for the growth of MoS2layers which are then transferred on a 4 inch graphene-based wafer. The MoS2/graphene phototransistors are fabricated collectively, achieving a minimum channel length of 10μm. The results measured on dozen of devices demonstrate a photoresponsivity of 50 A W-1and a remarkable sensitivity as low as 10 nW at 660 nm. These results not only compete with lab-based photodetectors made of chemical vapor deposition grown MoS2layers transferred on graphene, but also pave the way for the large-scale integration of these emerging 2D heterostructures in optoelectronic devices and sensors.

Ultrashort vertical-channel MoS2 transistor using a self-aligned contact

Two-dimensional (2D) semiconductors hold great promises for ultra-scaled transistors. In particular, the gate length of MoS2 transistor has been scaled to 1 nm and 0.3 nm using single wall carbon nanotube and graphene, respectively. However, simultaneously scaling the channel length of these short-gate transistor is still challenging, and could be largely attributed to the processing difficulties to precisely align source-drain contact with gate electrode. Here, we report a self-alignment process for realizing ultra-scaled 2D transistors. By mechanically folding a graphene/BN/MoS2 heterostructure, source-drain metals could be precisely aligned around the folded edge, and the channel length is only dictated by heterostructure thickness. Together, we could realize sub-1 nm gate length and sub-50 nm channel length for vertical MoS2 transistor simultaneously. The self-aligned device exhibits on-off ratio over 105 and on-state current of 250 μA/μm at 4 V bias, which is over 40 times higher compared to control sample without self-alignment process.

Ultrahigh-gain organic transistors based on van der Waals metal-barrier interlayer-semiconductor junction

Intrinsic gain is a vital figure of merit in transistors, closely related to signal amplification, operation voltage, power consumption, and circuit simplification. However, organic thin-film transistors (OTFTs) targeted at high gain have suffered from challenges such as narrow subthreshold operating voltage, low-quality interface, and uncontrollable barrier. Here, we report a van der Waals metal-barrier interlayer-semiconductor junction-based OTFT, which shows ultrahigh performance including ultrahigh gain of ~104, low saturation voltage, negligible hysteresis, and good stability. The high-quality van der Waals-contacted junctions are mainly attributed to patterning EGaIn liquid metal electrodes by low-energy microfluidic processes. The wide-bandgap semiconductor Ga2O3 as barrier interlayer is achieved by in situ surface oxidation of EGaIn electrodes, allowing for an adjustable barrier height and expected thermionic emission properties. The organic inverters with a high gain of 5130 and a simplified current stabilizer are further demonstrated, paving a way for high-gain and low-power organic electronics.

Polymer-Waveguide-Integrated 2D Semiconductor Heterostructures for Optical Communications

The demand for high-speed and low-loss interconnects in modern computer architectures is difficult to satisfy by using traditional Si-based electronics. Although optical interconnects offer a promising solution owing to their high bandwidth, low energy dissipation, and high-speed processing, integrating elements such as a light source, detector, and modulator, comprising different materials with optical waveguides, presents many challenges in an integrated platform. Two-dimensional (2D) van der Waals (vdW) semiconductors have attracted considerable attention in vertically stackable optoelectronics and advanced flexible photonics. In this study, optoelectronic components for exciton-based photonic circuits are demonstrated by integrating lithographically patterned poly(methyl methacrylate) (PMMA) waveguides on 2D vdW devices. The excitonic signals generated from the 2D materials by using laser excitation were transmitted through patterned PMMA waveguides. By introducing an external electric field and combining vdW heterostructures, an excitonic switch, phototransistor, and guided-light photovoltaic device on SiO2/Si substrates were demonstrated.

Bio-inspired synaptic behavior simulation in thin-film transistors based on molybdenum disulfide

Synaptic behavior simulation in transistors based on MoS2 has been reported. MoS2 was utilized as the active layer to prepare ambipolar thin-film transistors. The excitatory postsynaptic current phenomenon was simulated, observing a gradual voltage decay following the removal of applied pulses, ultimately resulting in a response current slightly higher than the initial current. Subsequently, ±5 V voltages were separately applied for ten consecutive pulse voltage tests, revealing short-term potentiation and short-term depression behaviors. After 92 consecutive positive pulses, the device current transitioned from an initial value of 0.14 to 28.3 mA. Similarly, following 88 consecutive negative pulses, the device current changed, indicating long-term potentiation and long-term depression behaviors. We also employed a pair of continuous triangular wave pulses to evaluate paired-pulse facilitation behavior, observing that the response current of the second stimulus pulse was ∼1.2× greater than that of the first stimulus pulse. The advantages and prospects of using MoS2 as a material for thin-film transistors were thoroughly displayed.

The influence of twist angle on the electronic and phononic band of 2D twisted bilayer SiC

Silicon carbide has a planar two-dimensional structure; therefore it is a potential material for constructing twisted bilayer systems for applications. In this study, DFT calculations were performed on four models with different twist angles. We chose angles of 21.8°, 17.9°, 13.2°, and 5.1° to estimate the dependence of the electronic and phononic properties on the twist angle. The results show that the band gap of bilayer SiC can be changed proportionally by changing the twist angle. However, there are only small variations in the band gaps, with an increment of 0.24 eV by changing the twist angle from 5.1° to 21.8°. At four considered twist angles, the band gaps decrease significantly when fixing the structure of each layer and pressing the separation distance down to 3.5 Å, 3.0 Å, 2.7 Å, and 2.5 Å. A noteworthy point is that the pressing also makes the band linearly smaller at a certain rate regardless of the twist angles. Meanwhile, the phonon bands are not affected by the value of the twist angle. The optical bands are between 900 cm-1 and 1100 cm-1 and the acoustic bands are between 0 cm-1 and 650 cm-1 at four twist angles.

Porous crystalline materials for memories and neuromorphic computing systems

Porous crystalline materials usually include metal-organic frameworks (MOFs), covalent organic frameworks (COFs), hydrogen-bonded organic frameworks (HOFs) and zeolites, which exhibit exceptional porosity and structural/composition designability, promoting the increasing attention in memory and neuromorphic computing systems in the last decade. From both the perspective of materials and devices, it is crucial to provide a comprehensive and timely summary of the applications of porous crystalline materials in memory and neuromorphic computing systems to guide future research endeavors. Moreover, the utilization of porous crystalline materials in electronics necessitates a shift from powder synthesis to high-quality film preparation to ensure high device performance. This review highlights the strategies for preparing porous crystalline materials films and discusses their advancements in memory and neuromorphic electronics. It also provides a detailed comparative analysis and presents the existing challenges and future research directions, which can attract the experts from various fields (e.g., materials scientists, chemists, and engineers) with the aim of promoting the applications of porous crystalline materials in memory and neuromorphic computing systems.

Three-Dimensional MoS2/MXene Heterostructure Aerogel for Chemical Gas Sensors with Superior Sensitivity and Stability

The concept of integrating diverse functional 2D materials into a heterostructure provides platforms for exploring physics that cannot be accessed in a single 2D material. Here, physically mixing two 2D materials, MXene and MoS2, followed by freeze-drying is utilized to successfully fabricate a 3D MoS2/MXene van der Waals heterostructure aerogel. The low-temperature synthetic approach effectively suppresses significant oxidation of the Ti3C2Tx MXene and results in a hierarchical and freestanding 3D heterostructure composed of high-quality MoS2 and MXene nanosheets. Functionalization of MXene with a MoS2 catalytic layer substantially improves sensitivity and long-term stability toward detection of NO2 gas, and computational studies are coupled with experimental results to elucidate that the mechanism behind enhancements in the gas-sensing properties is effective inhibition of HNO2 formation on the MXene surface, due to the presence of MoS2. Overall, this study has a great potential for expansion of applicability to other classes of two-dimensional materials as a general synthesis method, to be applied in future fields of catalysis and electronics.

High-Density Vertical Transistors with Pitch Size Down to 20 nm

Vertical field effect transistors (VFETs) have attracted considerable interest for developing ultra-scaled devices. In particular, individual VFET can be stacked on top of another and does not consume additional chip footprint beyond what is needed for a single device at the bottom, representing another dimension for high-density transistors. However, high-density VFETs with small pitch size are difficult to fabricate and is largely limited by the trade-offs between drain thickness and its conductivity. Here, a simple approach is reported to scale the drain to sub-10 nm. By combining 7 nm thick Au with monolayer graphene, the hybrid drain demonstrates metallic behavior with low sheet resistance of ≈100 Ω sq-1 . By van der Waals laminating the hybrid drain on top of 3 nm thick channel and scaling gate stack, the total VFET pitch size down to 20 nm and demonstrates a higher on-state current of 730 A cm-2 . Furthermore, three individual VFETs together are vertically stacked within a vertical distance of 59 nm, representing the record low pitch size for vertical transistors. The method pushes the scaling limit and pitch size limit of VFET, opening up a new pathway for high-density vertical transistors and integrated circuits.

First-principles studies on the structural, electronic, and optical properties of 2D transition metal dichalcogenide (TMDC) and Janus TMDCs heterobilayers

Van der Waals heterobilayers formed by vertically stacked two-dimensional materials could be a viable candidate for optoelectronics. This study carried out first-principles calculations to study the geometrical, electronic and optical properties of heterobilayers consisting transition metal dichalcogenide (TMDC) SnSe2and Janus TMDCs ZrSSe and SnSSe. Eight possible configurations SeSnSe-SSnSe (I), SeSnSe-SeSnS (II), SeSnSe-SZrSe (III), SeSnSe-SeZrS (IV), SSnSe-SZrSe (V), SSnSe-SeZrS (VI), SeSnS-SZrSe (VII) and SeSnS-SeZrS (VIII) are dynamically, thermally, energetically and mechanical stable. Six configurations, (I, II, III, IV, V and VI) have indirect band gaps with type-II band alignments, enhancing carrier lifetime an essential feature for potential applications in photovoltaic and nanoelectronics devices. In contrast, VII and VIII have indirect band gap with a type-I band alignment, facilitating efficient recombination of electron-hole pairs under high irradiation. All heterobilayers demonstrated significant optical absorption in the visible region. These findings highlight the potential utilization of heterobilayers in electronic and optoelectronic devices.

Visualized and Nondestructive Quality Identification of Two-Dimensional MoS2 Based on Principal Component Analysis

To date, the common quality characterizations for MoS2 are inefficient or cause irreversible damage to the samples, which have limited scalability and low throughput. Here, we propose a visualized and nondestructive approach to evaluate the quality of MoS2 based on the PCA machine learning method. Through PCA processing of PL mapping, the CVD grown MoS2 with different edge defect densities can be well distinguished. Furthermore, six twin GBs along the sulfur zigzag direction of the six pointed MoS2 stars are also successfully identified. To verify the correctness of the identification results, we measured the lifetime mapping and thermal expansion coefficient of the synthesized MoS2 samples. It is found that the high quality MoS2 samples have a shorter carrier lifetime (∼0.291 ns) and lower thermal expansion coefficient (∼2.03 × 10-5K-1). Therefore, our work offers a new approach to evaluate the quality of MoS2 to drive their practical application.

Realizing On/Off Ratios over 104 for Sub-2 nm Vertical Transistors

Vertical transistors hold promise for the development of ultrascaled transistors. However, their on/off ratios are limited by a strong source-drain tunneling current in the off state, particularly for vertical devices with a sub-5 nm channel length. Here, we report an approach for suppressing the off-state tunneling current by designing the barrier height via a van der Waals metal contact. Via lamination of the Pt electrode on a MoS2 vertical transistor, a high Schottky barrier is observed due to their large work function difference, thus suppressing direct tunneling currents. Meanwhile, this "low-energy" lamination process ensures an optimized metal/MoS2 interface with minimized interface states and defects. Together, the highest on/off ratios of 5 × 105 and 104 are realized in vertical transistors with 5 and 2 nm channel lengths, respectively. Our work not only pushes the on/off ratio limit of vertical transistors but also provides a general rule for reducing short-channel effects in ultrascaled devices.

PVA-assisted metal transfer for vertical WSe2 photodiode with asymmetric van der Waals contacts

The vertical electronic and optoelectronic devices based on 2D materials have shown great advantages over lateral devices, such as higher current density, faster switch speed, and superior short-channel control. However, it is difficult to fabricate vertical device with conventional metal deposition methods due to the aggressive process usually results in damage to the contact region. Here, we develop a simple and effective metal transfer technique and fabricate p-type and n-type WSe2 transistors by using metals with different work functions and subsequently create a vertical WSe2 transistors with a 18-nm-thick channel, which retain good gate coupling effect. Furthermore, a vertical WSe2 photodiode is constructed with graphene and Pt as asymmetric van der Waals (vdW) contacts. The work-function difference between graphene and Pt generates a built-in electric filed, leading to a high current rectification over 105. Under 405 nm laser illumination, the device exhibits excellent self-powered photodetection properties, including a high responsivity of 0.28 A W-1, fast response speed of 24 μs, and large light on/off ratio exceeding 105 at zero bias, which surpass most of the vdW photodiodes. This work demonstrates that the metal transfer technique is a promising strategy for the construction of high-performance vertical optoelectronic devices.

Research Progress of Vertical Channel Thin Film Transistor Device

Thin film transistors (TFTs) as the core devices for displays, are widely used in various fields including ultra-high-resolution displays, flexible displays, wearable electronic skins and memory devices, especially in terms of sensors. TFTs have now started to move towards miniaturization. Similarly to MOSFETs problem, traditional planar structure TFTs have difficulty in reducing the channel's length sub-1μm under the existing photolithography technology. Vertical channel thin film transistors (V-TFTs) are proposed. It is an effective solution to overcome the miniaturization limit of traditional planar TFTs. So, we summarize the different aspects of VTFTs. Firstly, this paper introduces the structure types, key parameters, and the impact of different preparation methods in devices of V-TFTs. Secondly, an overview of the research progress of V-TFTs' active layer materials in recent years, the characteristics of V-TFTs and their application in examples has proved the enormous application potential of V-TFT in sensing. Finally, in addition to the advantages of V-TFTs, the current technical challenge and their potential solutions are put forward, and the future development trend of this new structure of V-TFTs is proposed.

Controllable Doping Characteristics for WSxSey Monolayers Based on the Tunable S/Se Ratio

Transition metal dichalcogenides (TMDs) have attracted much attention because of their unique characteristics and potential applications in electronic devices. Recent reports have successfully demonstrated the growth of 2-dimensional MoS_xSe_y, Mo_xW_yS₂, Mo_xW_ySe₂, and WS_xSe_y monolayers that exhibit tunable band gap energies. However, few works have examined the doping behavior of those 2D monolayers. This study synthesizes WS_xSe_y monolayers using the CVD process, in which different heating temperatures are applied to sulfur powders to control the ratio of S to Se in WS_xSe_y. Increasing the Se component in WS_xSe_y monolayers produced an apparent electronic state transformation from p-type to n-type, recorded through energy band diagrams. Simultaneously, p-type characteristics gradually became clear as the S component was enhanced in WS_xSe_y monolayers. In addition, Raman spectra showed a red shift of the WS₂-related peaks, indicating n-doping behavior in the WS_xSe_y monolayers. In contrast, with the increase of the sulfur component, the blue shift of the WSe₂-related peaks in the Raman spectra involved the p-doping behavior of WS_xSe_y monolayers. In addition, the optical band gap of the as-grown WS_xSe_y monolayers from 1.97 eV to 1.61 eV is precisely tunable via the different chalcogenide heating temperatures. The results regarding the doping characteristics of WS_xSe_y monolayers provide more options in electronic and optical design.

Near-infrared polarization-sensitive photodetection via interfacial symmetry engineering of an Si/MAPbI3 heterostructural single crystal

Methylammonium lead iodide (MAPbI₃) single crystals (SCs) have drawn particular attention in the optoelectronics field, due to their outstanding photoelectric performance. However, the structures of those MAPbI₃ SCs are isotropic, which limits the further application of the materials for polarization-sensitive photodetection. Here, we propose a strategy of symmetry modulation by heterogeneously integrating large-sized MAPbI₃ SCs with silicon (Si) wafers and we give the first demonstration of self-powered near-infrared (NIR) polarization-sensitive photodetection using MAPbI₃ SCs. Created via a delicate solution method, the MAPbI₃/Si heterostructures show a high crystalline quality and a solid interfacial connection. More importantly, the built-in electric field resulting from the band bending at the MAPbI₃/Si heterostructure interface generates polar symmetry, which enables directional transport of photogenerated carriers, making the MAPbI₃/Si heterostructures highly polarization-sensitive. Consequently, in the self-powered mode, NIR photodetectors of MAPbI₃/Si heterostructures exhibit large polarization ratios of 3.3 at 785 nm and 2.8 at 940 nm. Moreover, a high detectivity of 7.35 × 10¹² Jones of the present devices is also achieved. Our work gives the first demonstration of self-powered polarization-sensitive photodetection of MAPbI₃ SCs and provides a strategy to design polarization-sensitive materials beyond the conventional limitations induced by isotropic structures.

Hybrid Heterostructures to Generate Long-Lived and Mobile Photocarriers in Graphene

We report the generation of long-lived and highly mobile photocarriers in hybrid van der Waals heterostructures that are formed by monolayer graphene, few-layer transition metal dichalcogenides, and the organic semiconductor F₈ZnPc. Samples are fabricated by dry transfer of mechanically exfoliated MoS₂ or WS₂ few-layer flakes on a graphene film, followed by deposition of F₈ZnPc. Transient absorption microscopy measurements are performed to study the photocarrier dynamics. In heterostructures of F₈ZnPc/few-layer-MoS₂/graphene, electrons excited in F₈ZnPc can transfer to graphene and thus be separated from the holes that reside in F₈ZnPc. By increasing the thickness of MoS₂, these electrons acquire long recombination lifetimes of over 100 ps and a high mobility of 2800 cm² V^-1 s^-1. Graphene doping with mobile holes is also demonstrated with WS₂ as the middle layers. These artificial heterostructures can improve the performance of graphene-based optoelectronic devices.

Highly Sensitive MoS2 Photodetectors Enabled with a Dry-Transferred Transparent Carbon Nanotube Electrode

Fabricating electronic and optoelectronic devices by transferring pre-deposited metal electrodes has attracted considerable attention, owing to the improved device performance. However, the pre-deposited metal electrode typically involves complex fabrication procedures. Here, we introduce our facile electrode fabrication process which is free of lithography, lift-off, and reactive ion etching by directly press-transferring a single-walled carbon nanotube (SWCNT) film. We fabricated Schottky diodes for photodetector applications using dry-transferred SWCNT films as the transparent electrode to increase light absorption in photoactive MoS₂ channels. The MoS₂ flake vertically stacked with an SWCNT electrode can exhibit excellent photodetection performance with a responsivity of ∼2.01 × 10³ A/W and a detectivity of ∼3.2 × 10¹² Jones. Additionally, we carried out temperature-dependent current-voltage measurement and Fowler-Nordheim (FN) plot analysis to explore the dominant charge transport mechanism. The enhanced photodetection in the vertical configuration is found to be attributed to the FN tunneling and internal photoemission of charge carriers excited from indium tin oxide across the MoS₂ layer. Our study provides a novel concept of using a photoactive MoS₂ layer as a tunneling layer itself with a dry-transferred transparent SWCNT electrode for high-performance and energy-efficient optoelectronic devices.

Graphene barristors for de novo optoelectronics

Graphene-based vertical Schottky-barrier transistors (SBTs), renowned as graphene barristors, have emerged as a feasible candidate to fundamentally expand the horizon of conventional transistor technology. The remote tunability of graphene's electronic properties could endorse multi-stimuli responsive functionalities for a broad range of electronic and optoelectronic applications of transistors, with the capability of incorporating nanochannel architecture with dramatically reduced footprints from the vertical integrations. In this Feature Article, we provide a comprehensive overview of the progress made in the field of SBTs over the last 10 years, starting from the operating principles, materials evolution, and processing developments. Depending on the types of stimuli such as electrical, optical, and mechanical stresses, various fields of applications from conventional digital logic circuits to sensory technologies are highlighted. Finally, more advanced applications toward beyond-Moore electronics are discussed, featuring recent advancements in neuromorphic devices based on SBTs.

One-pot liquid-phase synthesis of MoS2-WS2van der waals heterostructures for broadband photodetection

Two dimensional (2D) van der Waals heterostructures (vdWHs) have unique potential in facilitating the stacking of layers of different 2D materials for optoelectronic devices with superior characteristics. However, the fabrication of large area all-2D heterostructures is still challenging towards realizing practical devices at a reduced cost. In the present work, we have demonstrated a rapid yet simple, impurity-free and efficient sonication-assisted chemical exfoliation approach to synthesize hybrid vdWHs based on 2D molybdenum disulphide (MoS₂) and tungsten disulphide (WS₂), with high yield. Microscopic and spectroscopic studies have confirmed the successful exfoliation of layered 2D materials and formation of their hybrid heterostructures. The co-existence of 2D MoS₂and WS₂in the vdWH hybrids is established by optical absorption and Raman shift measurements along with their chemical stiochiometry determined by x-ray photoelectron spectroscopy. The spectral response of the vdWH/Si (2D/3D) heterojunction photodetector fabricated using the as-synthesized material is found to exhibit broadband photoresponse compared to that of the individual 2D MoS₂and WS₂devices. The peak responsivity and detectivity are found to be as high as ∼2.15 A W^-1and 2.05 × 10¹¹Jones, respectively for an applied bias of -5 V. The ease of fabrication with appreciable performance of the chemically synthesized vdWH-based devices have revealed their potential use for large area optoelectronic applications on Si-compatible CMOS platforms.

Low-Power Complementary Inverter Based on Graphene/Carbon-Nanotube and Graphene/MoS2 Barristors

The recent report of a p-type graphene(Gr)/carbon-nanotube(CNT) barristor facilitates the application of graphene barristors in the fabrication of complementary logic devices. Here, a complementary inverter is presented that combines a p-type Gr/CNT barristor with a n-type Gr/MoS2 barristor, and its characteristics are reported. A sub-nW (~0.2 nW) low-power inverter is demonstrated with a moderate gain of 2.5 at an equivalent oxide thickness (EOT) of ~15 nm. Compared to inverters based on field-effect transistors, the sub-nW power consumption was achieved at a much larger EOT, which was attributed to the excellent switching characteristics of Gr barristors.

P-Type 2D Semiconductors for Future Electronics

2D semiconductors represent one of the best candidates to extend Moore's law for their superiorities, such as keeping high carrier mobility and remarkable gate-control capability at atomic thickness. Complementary transistors and van der Waals junctions are critical in realizing 2D semiconductors-based integrated circuits suitable for future electronics. N-type 2D semiconductors have been reported predominantly for the strong electron doping caused by interfacial charge impurities and internal structural defects. By contrast, superior and reliable p-type 2D semiconductors with holes as majority carriers are still scarce. Not only that, but some critical issues have not been adequately addressed, including their controlled synthesis in wafer size and high quality, defect and carrier modulation, optimization of interface and contact, and application in high-speed and low-power integrated devices. Here the material toolkit, synthesis strategies, device basics, and digital electronics closely related to p-type 2D semiconductors are reviewed. Their opportunities, challenges, and prospects for future electronic applications are also discussed, which would be promising or even shining in the post-Moore era.

Vertically Integrated Electronics: New Opportunities from Emerging Materials and Devices

Vertical three-dimensional (3D) integration is a highly attractive strategy to integrate a large number of transistor devices per unit area. This approach has emerged to accommodate the higher demand of data processing capability and to circumvent the scaling limitation. A huge number of research efforts have been attempted to demonstrate vertically stacked electronics in the last two decades. In this review, we revisit materials and devices for the vertically integrated electronics with an emphasis on the emerging semiconductor materials that can be processable by bottom-up fabrication methods, which are suitable for future flexible and wearable electronics. The vertically stacked integrated circuits are reviewed based on the semiconductor materials: organic semiconductors, carbon nanotubes, metal oxide semiconductors, and atomically thin two-dimensional materials including transition metal dichalcogenides. The features, device performance, and fabrication methods for 3D integration of the transistor based on each semiconductor are discussed. Moreover, we highlight recent advances that can be important milestones in the vertically integrated electronics including advanced integrated circuits, sensors, and display systems. There are remaining challenges to overcome; however, we believe that the vertical 3D integration based on emerging semiconductor materials and devices can be a promising strategy for future electronics.

Strong Anisotropic Optical Properties by Rolling up MoS2 Nanoflake

Although anisotropic two-dimensional materials have attracted great scientific interest, the anisotropy of those materials is limited to particular crystallographic directions. Herein, with dimension confining, MoS₂ nanoscrolls are successfully fabricated by a rolling-up process after dropping an ethanol-water solution on a chemical vapor deposition-grown MoS₂ monolayer. The anisotropic vibrational and optical properties are systematically studied by angle-resolved polarized spectroscopy, including Raman, photoluminescence, and reflection measurements. Upon comparing the photoluminescence results between MoS₂ nanoscrolls and nanosheets, an obvious PL quenching phenomenon is observed, indicating the efficient separation of photon-induced carriers. Moreover, the time-resolved PL test identifying the lifetime of the carriers is decreased to 303 ps in the nanoscrolls, indicating a higher carrier-transfer efficiency. In summary, our work demonstrates the strong anisotropic optical properties of MoS₂ nanorolls, showing the nanoscrolls are a promising candidate for the fabrication of multifunctional devices.

Synthesis of a Selectively Nb-Doped WS2-MoS2 Lateral Heterostructure for a High-Detectivity PN Photodiode

In this study, selective Nb doping (P-type) at the WS₂ layer in a WS₂-MoS₂ lateral heterostructure via a chemical vapor deposition (CVD) method using a solution-phase precursor containing W, Mo, and Nb atoms is proposed. The different chemical activity reactivity (MoO₃ > WO₃ > Nb₂O₅) enable the separation of the growth temperature of intrinsic MoS₂ to 700 °C (first grown inner layer) and Nb-doped WS₂ to 800 °C (second grown outer layer). By controlling the Nb/(W+Nb) molar ratio in the solution precursor, the hole carrier density in the p-type WS₂ layer is selectively controlled from approximately 1.87 × 10⁷/cm² at 1.5 at.% Nb to approximately 1.16 × 10¹³/cm² at 8.1 at.% Nb, while the electron carrier density in n-type MoS₂ shows negligible change with variation of the Nb molar ratio. As a result, the electrical behavior of the WS₂-MoS₂ heterostructure transforms from the N-N junction (0 at.% Nb) to the P-N junction (4.5 at.% Nb) and the P-N tunnel junction (8.1 at.% Nb). The band-to-band tunneling at the P-N tunnel junction (8.1 at.% Nb) is eliminated by applying negative gate bias, resulting in a maximum rectification ratio (10⁵) and a minimum channel resistance (10⁸ Ω). With this optimized photodiode (8.1 at.% Nb at V_g = -30 V), an I_photo/I_dark ratio of 6000 and a detectivity of 1.1 × 10¹⁴ Jones are achieved, which are approximately 20 and 3 times higher, respectively, than the previously reported highest values for CVD-grown transition-metal dichalcogenide P-N junctions.

Direct Detection of Near-Infrared Circularly Polarized Light via Precisely Designed Chiral Perovskite Heterostructures

Chiral metal halide perovskites (CMHPs) have recently shown great potential for direct circularly polarized light (CPL) detection. However, owing to the limited cutoff wavelength edge of these CMHPs, most of the detectors presented thus far are characterized only in the ultraviolet and visible range; CMHPs that target at the near-infrared (NIR) region are still greatly desired. Here, we design a novel CMHP heterostructure, synthesized via solution-processed epitaxial growth of crystalline 3D MAPbI₃ on a 2D chiral (R-BPEA)₂PbI₄ (R-BPEA = (R)-1-(4-bromophenyl)ethylammonium) crystal, and provide the first demonstration of self-powered direct NIR-CPL detection. Compared with individual chiral (R-BPEA)₂PbI₄, the heterostructure not only retains the spin selectivity but also allows much broader absorbance, especially beyond 780 nm, where the (R-BPEA)₂PbI₄ cannot absorb. Furthermore, the built-in electric potential in the heterojunction forces spontaneous separation/transport of photogenerated carriers, enabling the fabrication of devices operating without external energy supply. By making use of the abovementioned advantages, the self-powered CPL detectors of the (R-BPEA)₂PbI₄/MAPbI₃ heterostructures hence show competitive circular polarization sensitivity at 785 nm with a high anisotropy factor of up to 0.25. In addition, a large on/off switching ratio of ∼10⁵ and an impressive detectivity of ∼10¹⁰ Jones are also achieved. As a pioneer study, our results may broaden the material scope for future chiroptical devices based on CMHPs.

CNT-molecule-CNT (1D-0D-1D) van der Waals integration ferroelectric memory with 1-nm2 junction area

The device’s integration of molecular electronics is limited regarding the large-scale fabrication of gap electrodes on a molecular scale. The van der Waals integration (vdWI) of a vertically aligned molecular layer (0D) with 2D or 3D electrodes indicates the possibility of device’s integration; however, the active junction area of 0D-2D and 0D-3D vdWIs remains at a microscale size. Here, we introduce the robust fabrication of a vertical 1D-0D-1D vdWI device with the ultra-small junction area of 1 nm² achieved by cross-stacking top carbon nanotubes (CNTs) on molecularly assembled bottom CNTs. 1D-0D-1D vdWI memories are demonstrated through ferroelectric switching of azobenzene molecules owing to the cis-trans transformation combined with the permanent dipole moment of the end-tail -CF₃ group. In this work, our 1D-0D-1D vdWI memory exhibits a retention performance above 2000 s, over 300 cycles with an on/off ratio of approximately 10⁵ and record current density (3.4 × 10⁸ A/cm²), which is 100 times higher than previous study through the smallest junction area achieved in a vdWI. The simple stacking of aligned CNTs (4 × 4) allows integration of memory arrays (16 junctions) with high device operational yield (100%), offering integration guidelines for future molecular electronics.

The van der Waals integration of molecular layer (0D) with 2D or 3D electrodes is limited at microscale junction. Here, the authors introduce 1D-0D-1D vdWI memory with 1 nm² junction achieved by cross-stacking t-CNT on molecularly assembled b-CNT.

Electronic property modulation in two-dimensional lateral superlattices of monolayer transition metal dichalcogenides

Fabricating lateral heterostructures (HSs) and superlattices (SLs) provides a unique degree of freedom for modulating the physical properties of two-dimensional (2D) materials by varying the chemical component, geometric size and interface structure in the ultra-thin atomic thickness limit. While a variety of 2D lateral HSs/SLs have been synthesized, especially for transition metal dichalcogenides (TMDs), how such structures affect quantitatively the physical properties of 2D materials has not yet been established. We herein explore electronic property modulation in 2D lateral SLs of monolayer TMDs through first-principles high-throughput calculations. The dependence of the electronic structure, bandgap, carrier effective masses, charge density overlap on chemical components, interface type, and sub-lattice size of lateral TMD-SLs are investigated. We find that by comparison with their random alloy counterparts, the lateral TMD-SLs exhibit generally type-II band alignment, a wider range of bandgap tunability, larger carrier effective masses, and stronger electron-hole charge separation tendency. The bandgap variation with a sub-lattice size shows larger bowing parameters for the SLs with heterogeneous anions, by comparison with the homogeneous anion cases. A similar behavior is observed for the SLs with an armchair-type interface, by comparison with the zigzag-type interface cases. Further analyses reveal that the underlying physical mechanism can be attributed to the synergistic interplay among the band offset of sub-lattices, quantum confinement effect, and existing internal strain.