Memristive neural network for on-line learning and tracking with brain-inspired spike timing dependent plasticity

Compact Physical Implementation of Spiking Neural Network Using Ambipolar WSe2 n-Type/p-Type Ferroelectric Field-Effect Transistor

Spiking neural networks (SNNs) are attracting increasing interests for their ability to emulate biological processes, offering energy-efficient computation and event-driven processing. Currently, no devices are known to combine both neuronal and synaptic functions. This study presents an experimental demonstration of an ambipolar WSe2 n-type/p-type ferroelectric field-effect transistor (n/p-FeFET) integrated with ferroelectric Hf0.5Zr0.5O2 (HZO) to achieve both volatile and nonvolatile properties in a single device. The nonvolatile n-FeFET, driven by the stable ferroelectric properties of HZO, exhibits highly linear synaptic behavior. In contrast, the volatile p-FeFET, influenced by electron self-compensation in the ambipolar WSe2, enables self-resetting leaky-integrate-and-fire neurons. Integrating neuronal and synaptic functions in the same device allows for compact neuromorphic computing applications. Additionally, simulations of SNNs using experimentally calibrated synaptic and neuronal models achieved a 93.8% accuracy in MNIST digit recognition. This innovative approach advances the development of SNNs with high biomimetic fidelity and reduced hardware costs.

A Hybrid CMOS-Memristor Spiking Neural Network Supporting Multiple Learning Rules

Artificial intelligence (AI) is changing the way computing is performed to cope with real-world, ill-defined tasks for which traditional algorithms fail. AI requires significant memory access, thus running into the von Neumann bottleneck when implemented in standard computing platforms. In this respect, low-latency energy-efficient in-memory computing can be achieved by exploiting emerging memristive devices, given their ability to emulate synaptic plasticity, which provides a path to design large-scale brain-inspired spiking neural networks (SNNs). Several plasticity rules have been described in the brain and their coexistence in the same network largely expands the computational capabilities of a given circuit. In this work, starting from the electrical characterization and modeling of the memristor device, we propose a neuro-synaptic architecture that co-integrates in a unique platform with a single type of synaptic device to implement two distinct learning rules, namely, the spike-timing-dependent plasticity (STDP) and the Bienenstock-Cooper-Munro (BCM). This architecture, by exploiting the aforementioned learning rules, successfully addressed two different tasks of unsupervised learning.

Finite/fixed-time synchronization of inertial memristive neural networks by interval matrix method for secure communication

This paper investigates the finite/fixed-time synchronization problem of delayed inertial memristive neural networks (DIMNNs) using interval matrix-based methods within a unified control framework. By employing set-valued mapping and differential inclusion theory, two distinct methods are applied to handle the switching behavior of memristor parameters: the maximum absolute value method and the interval matrix method. Based on these different approaches, two control strategies are proposed to select appropriate control parameters, enabling the system to achieve finite and fixed-time synchronization, respectively. Additionally, the resulting theoretical criteria differ based on the chosen control strategy, with one expressed in algebraic form and the other in the form of linear matrix inequalities (LMIs). Numerical simulations demonstrate that the interval matrix method outperforms the maximum absolute value method in terms of handling memristor parameter switching, achieving faster finite/fixed-time synchronization. Furthermore, the theoretical results are extended to the field of image encryption, where the response system is utilized for decryption and expanding the keyspace.

Memristor-based spiking neural network with online reinforcement learning

Neural networks implemented in memristor-based hardware can provide fast and efficient in-memory computation, but traditional learning methods such as error back-propagation are hardly feasible in it. Spiking neural networks (SNNs) are highly promising in this regard, as their weights can be changed locally in a self-organized manner without the demand for high-precision changes calculated with the use of information almost from the entire network. This problem is rather relevant for solving control tasks with neural-network reinforcement learning methods, as those are highly sensitive to any source of stochasticity in a model initialization, training, or decision-making procedure. This paper presents an online reinforcement learning algorithm in which the change of connection weights is carried out after processing each environment state during interaction-with-environment data generation. Another novel feature of the algorithm is that it is applied to SNNs with memristor-based STDP-like learning rules. The plasticity functions are obtained from real memristors based on poly-p-xylylene and CoFeB-LiNbO3 nanocomposite, which were experimentally assembled and analyzed. The SNN is comprised of leaky integrate-and-fire neurons. Environmental states are encoded by the timings of input spikes, and the control action is decoded by the first spike. The proposed learning algorithm solves the Cart-Pole benchmark task successfully. This result could be the first step towards implementing a real-time agent learning procedure in a continuous-time environment that can be run on neuromorphic systems with memristive synapses.

Stretchable Transistor-Structured Artificial Synapses for Neuromorphic Electronics

Stretchable synaptic transistors, a core technology in neuromorphic electronics, have functions and structures similar to biological synapses and can concurrently transmit signals and learn. Stretchable synaptic transistors are usually soft and stretchy and can accommodate various mechanical deformations, which presents significant prospects in soft machines, electronic skin, human-brain interfaces, and wearable electronics. Considerable efforts have been devoted to developing stretchable synaptic transistors to implement electronic device neuromorphic functions, and remarkable advances have been achieved. Here, this review introduces the basic concept of artificial synaptic transistors and summarizes the recent progress in device structures, functional-layer materials, and fabrication processes. Classical stretchable synaptic transistors, including electric double-layer synaptic transistors, electrochemical synaptic transistors, and optoelectronic synaptic transistors, as well as the applications of stretchable synaptic transistors in light-sensory systems, tactile-sensory systems, and multisensory artificial-nerves systems, are discussed. Finally, the current challenges and potential directions of stretchable synaptic transistors are analyzed. This review presents a detailed introduction to the recent progress in stretchable synaptic transistors from basic concept to applications, providing a reference for the development of stretchable synaptic transistors in the future.

Ionic-electronic halide perovskite memdiodes enabling neuromorphic computing with a second-order complexity

With increasing computing demands, serial processing in von Neumann architectures built with zeroth-order complexity digital circuits is saturating in computational capacity and power, entailing research into alternative paradigms. Brain-inspired systems built with memristors are attractive owing to their large parallelism, low energy consumption, and high error tolerance. However, most demonstrations have thus far only mimicked primitive lower-order biological complexities using devices with first-order dynamics. Memristors with higher-order complexities are predicted to solve problems that would otherwise require increasingly elaborate circuits, but no generic design rules exist. Here, we present second-order dynamics in halide perovskite memristive diodes (memdiodes) that enable Bienenstock-Cooper-Munro learning rules capturing both timing- and rate-based plasticity. A triplet spike timing-dependent plasticity scheme exploiting ion migration, back diffusion, and modulable Schottky barriers establishes general design rules for realizing higher-order memristors. This higher order enables complex binocular orientation selectivity in neural networks exploiting the intrinsic physics of the devices, without the need for complicated circuitry.

Toward memristive in-memory computing: principles and applications

With the rapid growth of computer science and big data, the traditional von Neumann architecture suffers the aggravating data communication costs due to the separated structure of the processing units and memories. Memristive in-memory computing paradigm is considered as a prominent candidate to address these issues, and plentiful applications have been demonstrated and verified. These applications can be broadly categorized into two major types: soft computing that can tolerant uncertain and imprecise results, and hard computing that emphasizes explicit and precise numerical results for each task, leading to different requirements on the computational accuracies and the corresponding hardware solutions. In this review, we conduct a thorough survey of the recent advances of memristive in-memory computing applications, both on the soft computing type that focuses on artificial neural networks and other machine learning algorithms, and the hard computing type that includes scientific computing and digital image processing. At the end of the review, we discuss the remaining challenges and future opportunities of memristive in-memory computing in the incoming Artificial Intelligence of Things era.

Memory-inspired spiking hyperdimensional network for robust online learning

Recently, brain-inspired computing models have shown great potential to outperform today's deep learning solutions in terms of robustness and energy efficiency. Particularly, Spiking Neural Networks (SNNs) and HyperDimensional Computing (HDC) have shown promising results in enabling efficient and robust cognitive learning. Despite the success, these two brain-inspired models have different strengths. While SNN mimics the physical properties of the human brain, HDC models the brain on a more abstract and functional level. Their design philosophies demonstrate complementary patterns that motivate their combination. With the help of the classical psychological model on memory, we propose SpikeHD, the first framework that fundamentally combines Spiking neural network and hyperdimensional computing. SpikeHD generates a scalable and strong cognitive learning system that better mimics brain functionality. SpikeHD exploits spiking neural networks to extract low-level features by preserving the spatial and temporal correlation of raw event-based spike data. Then, it utilizes HDC to operate over SNN output by mapping the signal into high-dimensional space, learning the abstract information, and classifying the data. Our extensive evaluation on a set of benchmark classification problems shows that SpikeHD provides the following benefit compared to SNN architecture: (1) significantly enhance learning capability by exploiting two-stage information processing, (2) enables substantial robustness to noise and failure, and (3) reduces the network size and required parameters to learn complex information.

Applications and Techniques for Fast Machine Learning in Science

In this community review report, we discuss applications and techniques for fast machine learning (ML) in science-the concept of integrating powerful ML methods into the real-time experimental data processing loop to accelerate scientific discovery. The material for the report builds on two workshops held by the Fast ML for Science community and covers three main areas: applications for fast ML across a number of scientific domains; techniques for training and implementing performant and resource-efficient ML algorithms; and computing architectures, platforms, and technologies for deploying these algorithms. We also present overlapping challenges across the multiple scientific domains where common solutions can be found. This community report is intended to give plenty of examples and inspiration for scientific discovery through integrated and accelerated ML solutions. This is followed by a high-level overview and organization of technical advances, including an abundance of pointers to source material, which can enable these breakthroughs.

A Brain-Inspired Homeostatic Neuron Based on Phase-Change Memories for Efficient Neuromorphic Computing

One of the main goals of neuromorphic computing is the implementation and design of systems capable of dynamic evolution with respect to their own experience. In biology, synaptic scaling is the homeostatic mechanism which controls the frequency of neural spikes within stable boundaries for improved learning activity. To introduce such control mechanism in a hardware spiking neural network (SNN), we present here a novel artificial neuron based on phase change memory (PCM) devices capable of internal regulation via homeostatic and plastic phenomena. We experimentally show that this mechanism increases the robustness of the system thus optimizing the multi-pattern learning under spike-timing-dependent plasticity (STDP). It also improves the continual learning capability of hybrid supervised-unsupervised convolutional neural networks (CNNs), in terms of both resilience and accuracy. Furthermore, the use of neurons capable of self-regulating their fire responsivity as a function of the PCM internal state enables the design of dynamic networks. In this scenario, we propose to use the PCM-based neurons to design bio-inspired recurrent networks for autonomous decision making in navigation tasks. The agent relies on neuronal spike-frequency adaptation (SFA) to explore the environment via penalties and rewards. Finally, we show that the conductance drift of the PCM devices, contrarily to the applications in neural network accelerators, can improve the overall energy efficiency of neuromorphic computing by implementing bio-plausible active forgetting.

Preoperative prediction of lymph node metastasis in patients with papillary thyroid carcinoma by an artificial intelligence algorithm

BACKGROUND

It is necessary to identify patients at risk of developing lymph node metastasis prior to papillary thyroid carcinoma (PTC) surgery. This can be challenging due to limiting factors, and an artificial intelligence algorithm may be a viable option.

OBJECTIVE

In this study, we aimed to evaluate whether combining an artificial intelligence algorithm (support vector machine and probabilistic neural network) and clinico-pathologic data can preoperatively predict lymph node metastasis of papillary thyroid carcinoma (PTC).

METHODS

We retrospectively examined 251 PTCs with lymph node metastasis and 194 PTCs without lymph node metastasis. The artificial intelligence algorithm included the support vector machine (SVM) and the probabilistic neural network (PNN).

RESULTS

The ACR TI-RADS (Thyroid Imaging, Reporting and Data System), number of tumours, no well-defined margin, lymph node status and rim calcification on ultrasonography (US), age, sex, tumour size, and presence of Hashimoto's thyroiditis were significantly more frequent among PTCs with central lymph node metastasis than those without metastasis (P<0.05). The PNN classifier revealed an F1 score of 0.88 on the central lymph node metastasis test set. The SVM classifier revealed an F1 score of 0.93 on the lateral lymph node metastasis test set. Our study demonstrates that combining artificial intelligence algorithms and clinico-pathologic data can effectively predict the lymph node metastasis of papillary thyroid carcinoma prior to surgery.

Synaptic Plasticity in Memristive Artificial Synapses and Their Robustness Against Noisy Inputs

Emerging brain-inspired neuromorphic computing paradigms require devices that can emulate the complete functionality of biological synapses upon different neuronal activities in order to process big data flows in an efficient and cognitive manner while being robust against any noisy input. The memristive device has been proposed as a promising candidate for emulating artificial synapses due to their complex multilevel and dynamical plastic behaviors. In this work, we exploit ultrastable analog BiFeO₃ (BFO)-based memristive devices for experimentally demonstrating that BFO artificial synapses support various long-term plastic functions, i.e., spike timing-dependent plasticity (STDP), cycle number-dependent plasticity (CNDP), and spiking rate-dependent plasticity (SRDP). The study on the impact of electrical stimuli in terms of pulse width and amplitude on STDP behaviors shows that their learning windows possess a wide range of timescale configurability, which can be a function of applied waveform. Moreover, beyond SRDP, the systematical and comparative study on generalized frequency-dependent plasticity (FDP) is carried out, which reveals for the first time that the ratio modulation between pulse width and pulse interval time within one spike cycle can result in both synaptic potentiation and depression effect within the same firing frequency. The impact of intrinsic neuronal noise on the STDP function of a single BFO artificial synapse can be neglected because thermal noise is two orders of magnitude smaller than the writing voltage and because the cycle-to-cycle variation of the current–voltage characteristics of a single BFO artificial synapses is small. However, extrinsic voltage fluctuations, e.g., in neural networks, cause a noisy input into the artificial synapses of the neural network. Here, the impact of extrinsic neuronal noise on the STDP function of a single BFO artificial synapse is analyzed in order to understand the robustness of plastic behavior in memristive artificial synapses against extrinsic noisy input.

Adaptive Extreme Edge Computing for Wearable Devices

Wearable devices are a fast-growing technology with impact on personal healthcare for both society and economy. Due to the widespread of sensors in pervasive and distributed networks, power consumption, processing speed, and system adaptation are vital in future smart wearable devices. The visioning and forecasting of how to bring computation to the edge in smart sensors have already begun, with an aspiration to provide adaptive extreme edge computing. Here, we provide a holistic view of hardware and theoretical solutions toward smart wearable devices that can provide guidance to research in this pervasive computing era. We propose various solutions for biologically plausible models for continual learning in neuromorphic computing technologies for wearable sensors. To envision this concept, we provide a systematic outline in which prospective low power and low latency scenarios of wearable sensors in neuromorphic platforms are expected. We successively describe vital potential landscapes of neuromorphic processors exploiting complementary metal-oxide semiconductors (CMOS) and emerging memory technologies (e.g., memristive devices). Furthermore, we evaluate the requirements for edge computing within wearable devices in terms of footprint, power consumption, latency, and data size. We additionally investigate the challenges beyond neuromorphic computing hardware, algorithms and devices that could impede enhancement of adaptive edge computing in smart wearable devices.

In-Memory Computing with Resistive Memory Circuits: Status and Outlook

In-memory computing (IMC) refers to non-von Neumann architectures where data are processed in situ within the memory by taking advantage of physical laws. Among the memory devices that have been considered for IMC, the resistive switching memory (RRAM), also known as memristor, is one of the most promising technologies due to its relatively easy integration and scaling. RRAM devices have been explored for both memory and IMC applications, such as neural network accelerators and neuromorphic processors. This work presents the status and outlook on the RRAM for analog computing, where the precision of the encoded coefficients, such as the synaptic weights of a neural network, is one of the key requirements. We show the experimental study of the cycle-to-cycle variation of set and reset processes for HfO2-based RRAM, which indicate that gate-controlled pulses present the least variation in conductance. Assuming a constant variation of conductance σG, we then evaluate and compare various mapping schemes, including multilevel, binary, unary, redundant and slicing techniques. We present analytical formulas for the standard deviation of the conductance and the maximum number of bits that still satisfies a given maximum error. Finally, we discuss RRAM performance for various analog computing tasks compared to other computational memory devices. RRAM appears as one of the most promising devices in terms of scaling, accuracy and low-current operation.

EqSpike: spike-driven equilibrium propagation for neuromorphic implementations

Finding spike-based learning algorithms that can be implemented within the local constraints of neuromorphic systems, while achieving high accuracy, remains a formidable challenge. Equilibrium propagation is a promising alternative to backpropagation as it only involves local computations, but hardware-oriented studies have so far focused on rate-based networks. In this work, we develop a spiking neural network algorithm called EqSpike, compatible with neuromorphic systems, which learns by equilibrium propagation. Through simulations, we obtain a test recognition accuracy of 97.6% on the MNIST handwritten digits dataset (Mixed National Institute of Standards and Technology), similar to rate-based equilibrium propagation, and comparing favorably to alternative learning techniques for spiking neural networks. We show that EqSpike implemented in silicon neuromorphic technology could reduce the energy consumption of inference and training, respectively, by three orders and two orders of magnitude compared to graphics processing units. Finally, we also show that during learning, EqSpike weight updates exhibit a form of spike-timing-dependent plasticity, highlighting a possible connection with biology.

Non-linear Memristive Synaptic Dynamics for Efficient Unsupervised Learning in Spiking Neural Networks

Spiking neural networks (SNNs) are a computational tool in which the information is coded into spikes, as in some parts of the brain, differently from conventional neural networks (NNs) that compute over real-numbers. Therefore, SNNs can implement intelligent information extraction in real-time at the edge of data acquisition and correspond to a complementary solution to conventional NNs working for cloud-computing. Both NN classes face hardware constraints due to limited computing parallelism and separation of logic and memory. Emerging memory devices, like resistive switching memories, phase change memories, or memristive devices in general are strong candidates to remove these hurdles for NN applications. The well-established training procedures of conventional NNs helped in defining the desiderata for memristive device dynamics implementing synaptic units. The generally agreed requirements are a linear evolution of memristive conductance upon stimulation with train of identical pulses and a symmetric conductance change for conductance increase and decrease. Conversely, little work has been done to understand the main properties of memristive devices supporting efficient SNN operation. The reason lies in the lack of a background theory for their training. As a consequence, requirements for NNs have been taken as a reference to develop memristive devices for SNNs. In the present work, we show that, for efficient CMOS/memristive SNNs, the requirements for synaptic memristive dynamics are very different from the needs of a conventional NN. System-level simulations of a SNN trained to classify hand-written digit images through a spike timing dependent plasticity protocol are performed considering various linear and non-linear plausible synaptic memristive dynamics. We consider memristive dynamics bounded by artificial hard conductance values and limited by the natural dynamics evolution toward asymptotic values (soft-boundaries). We quantitatively analyze the impact of resolution and non-linearity properties of the synapses on the network training and classification performance. Finally, we demonstrate that the non-linear synapses with hard boundary values enable higher classification performance and realize the best trade-off between classification accuracy and required training time. With reference to the obtained results, we discuss how memristive devices with non-linear dynamics constitute a technologically convenient solution for the development of on-line SNN training.

Integration and Co-design of Memristive Devices and Algorithms for Artificial Intelligence

Memristive devices share remarkable similarities to biological synapses, dendrites, and neurons at both the physical mechanism level and unit functionality level, making the memristive approach to neuromorphic computing a promising technology for future artificial intelligence. However, these similarities do not directly transfer to the success of efficient computation without device and algorithm co-designs and optimizations. Contemporary deep learning algorithms demand the memristive artificial synapses to ideally possess analog weighting and linear weight-update behavior, requiring substantial device-level and circuit-level optimization. Such co-design and optimization have been the main focus of memristive neuromorphic engineering, which often abandons the “non-ideal” behaviors of memristive devices, although many of them resemble what have been observed in biological components. Novel brain-inspired algorithms are being proposed to utilize such behaviors as unique features to further enhance the efficiency and intelligence of neuromorphic computing, which calls for collaborations among electrical engineers, computing scientists, and neuroscientists.

In-Memory Logic Operations and Neuromorphic Computing in Non-Volatile Random Access Memory

Recent progress in the development of artificial intelligence technologies, aided by deep learning algorithms, has led to an unprecedented revolution in neuromorphic circuits, bringing us ever closer to brain-like computers. However, the vast majority of advanced algorithms still have to run on conventional computers. Thus, their capacities are limited by what is known as the von-Neumann bottleneck, where the central processing unit for data computation and the main memory for data storage are separated. Emerging forms of non-volatile random access memory, such as ferroelectric random access memory, phase-change random access memory, magnetic random access memory, and resistive random access memory, are widely considered to offer the best prospect of circumventing the von-Neumann bottleneck. This is due to their ability to merge storage and computational operations, such as Boolean logic. This paper reviews the most common kinds of non-volatile random access memory and their physical principles, together with their relative pros and cons when compared with conventional CMOS-based circuits (Complementary Metal Oxide Semiconductor). Their potential application to Boolean logic computation is then considered in terms of their working mechanism, circuit design and performance metrics. The paper concludes by envisaging the prospects offered by non-volatile devices for future brain-inspired and neuromorphic computation.

Exploiting defective RRAM array as synapses of HTM spatial pooler with boost-factor adjustment scheme for defect-tolerant neuromorphic systems

A crossbar array architecture employing resistive switching memory (RRAM) as a synaptic element accelerates vector-matrix multiplication in a parallel fashion, enabling energy-efficient pattern recognition. To implement the function of the synapse in the RRAM, multilevel resistance states are required. More importantly, a large on/off ratio of the RRAM should be preferentially obtained to ensure a reasonable margin between each state taking into account the inevitable variability caused by the inherent switching mechanism. The on/off ratio is basically adjusted in two ways by modulating measurement conditions such as compliance current or voltage pulses modulation. The latter technique is not only more suitable for practical systems, but also can achieve multiple states in low current range. However, at the expense of applying a high negative voltage aimed at enlarging the on/off ratio, a breakdown of the RRAM occurs unexpectedly. This stuck-at-short fault of the RRAM adversely affects the recognition process based on reading and judging each column current changed by the multiplication of the input voltage and resistance of the RRAM in the array, degrading the accuracy. To address this challenge, we introduce a boost-factor adjustment technique as a fault-tolerant scheme based on simple circuitry that eliminates the additional process to identify specific locations of the failed RRAMs in the array. Spectre circuit simulation is performed to verify the effect of the scheme on Modified National Institute of Standards and Technology dataset using convolutional neural networks in non-ideal crossbar arrays, where experimentally observed imperfective RRAMs are configured. Our results show that the recognition accuracy can be maintained similar to the ideal case because the interruption of the failure is suppressed by the scheme.

On-Chip Training Spiking Neural Networks Using Approximated Backpropagation With Analog Synaptic Devices

Hardware-based spiking neural networks (SNNs) inspired by a biological nervous system are regarded as an innovative computing system with very low power consumption and massively parallel operation. To train SNNs with supervision, we propose an efficient on-chip training scheme approximating backpropagation algorithm suitable for hardware implementation. We show that the accuracy of the proposed scheme for SNNs is close to that of conventional artificial neural networks (ANNs) by using the stochastic characteristics of neurons. In a hardware configuration, gated Schottky diodes (GSDs) are used as synaptic devices, which have a saturated current with respect to the input voltage. We design the SNN system by using the proposed on-chip training scheme with the GSDs, which can update their conductance in parallel to speed up the overall system. The performance of the on-chip training SNN system is validated through MNIST data set classification based on network size and total time step. The SNN systems achieve accuracy of 97.83% with 1 hidden layer and 98.44% with 4 hidden layers in fully connected neural networks. We then evaluate the effect of non-linearity and asymmetry of conductance response for long-term potentiation (LTP) and long-term depression (LTD) on the performance of the on-chip training SNN system. In addition, the impact of device variations on the performance of the on-chip training SNN system is evaluated.

Emerging neuromorphic devices

Artificial intelligence (AI) has the ability of revolutionizing our lives and society in a radical way, by enabling machine learning in the industry, business, health, transportation, and many other fields. The ability to recognize objects, faces, and speech, requires, however, exceptional computational power and time, which is conflicting with the current difficulties in transistor scaling due to physical and architectural limitations. As a result, to accelerate the progress of AI, it is necessary to develop materials, devices, and systems that closely mimic the human brain. In this work, we review the current status and challenges on the emerging neuromorphic devices for brain-inspired computing. First, we provide an overview of the memory device technologies which have been proposed for synapse and neuron circuits in neuromorphic systems. Then, we describe the implementation of synaptic learning in the two main types of neural networks, namely the deep neural network and the spiking neural network (SNN). Bio-inspired learning, such as the spike-timing dependent plasticity scheme, is shown to enable unsupervised learning processes which are typical of the human brain. Hardware implementations of SNNs for the recognition of spatial and spatio-temporal patterns are also shown to support the cognitive computation in silico. Finally, we explore the recent advances in reproducing bio-neural processes via device physics, such as insulating-metal transitions, nanoionics drift/diffusion, and magnetization flipping in spintronic devices. By harnessing the device physics in emerging materials, neuromorphic engineering with advanced functionality, higher density and better energy efficiency can be developed.

Area-Selective ALD of Ru on Nanometer-Scale Cu Lines through Dimerization of Amino-Functionalized Alkoxy Silane Passivation Films

The selective deposition of materials on predefined areas on a substrate is of crucial importance for various applications, such as energy harvesting, microelectronic device fabrication, and catalysis. A representative example of area-confined deposition is the selective deposition of a metal film as the interconnect material in multilevel metallization schemes for CMOS technology. This allows the formation of multilevel structures with standard lithographical techniques while minimizing pattern misalignment and overlay and improving the uniformity of the structures across the wafer. In this work, area-selective deposition of Ru by atomic layer deposition (ALD) is investigated using alkoxy siloxane dielectric passivation layers. In this work, a comparison of several silane organic SAM precursors in terms of Ru ALD ASD performance is reported. The importance of the surface areal concentration of the passivation molecules is demonstrated. According to the in situ X-ray photoelectron spectroscopy film characterization, the ALD blocking layers derived from a (3-trimethoxysilylpropyl) diethylenetriamine (DETA) precursor have the ability to polymerize under ALD-compatible temperatures, such as 250 °C, which leads to a significant inhibition of Ru growth up to 400 ALD cycles. At the same time, the DETA layer can be selectively removed from the oxidized Cu surface by rinsing in acetic acid, which allows selective deposition of ca. 14 nm of Ru on Cu with no Ru detected on the DETA-coated surface by RBS. The approach is successfully tested on 50 nm half-pitch patterned SiO₂/Cu lines.

Self-adaptive STDP-based learning of a spiking neuron with nanocomposite memristive weights

Neuromorphic systems consisting of artificial neurons and memristive synapses could provide a much better performance and a significantly more energy-efficient approach to the implementation of different types of neural network algorithms than traditional hardware with the Von-Neumann architecture. However, the memristive weight adjustment in the formal neuromorphic networks by the standard back-propagation techniques suffers from poor device-to-device reproducibility. One of the most promising approaches to overcome this problem is to use local learning rules for spiking neuromorphic architectures which potentially could be adaptive to the variability issue mentioned above. Different kinds of local rules for learning spiking systems are mostly realized on a bio-inspired spike-time-dependent plasticity (STDP) mechanism, which is an improved type of classical Hebbian learning. Whereas the STDP-like mechanism has already been shown to emerge naturally in memristive devices, the demonstration of its self-adaptive learning property, potentially overcoming the variability problem, is more challenging and has yet to be reported. Here we experimentally demonstrate an STDP-based learning protocol that ensures self-adaptation of the memristor resistive states, after only a very few spikes, and makes the plasticity sensitive only to the input signal configuration, but neither to the initial state of the devices nor their device-to-device variability. Then, it is shown that the self-adaptive learning of a spiking neuron with memristive weights on rate-coded patterns could also be realized with hardware-based STDP rules. The experiments have been carried out with nanocomposite-based (Co₄₀Fe₄₀B₂₀) _х (LiNbO_3-y )_100-х memristive structures, but their results are believed to be applicable to a wide range of memristive devices. All the experimental data were supported and extended by numerical simulations. There is a hope that the obtained results pave the way for building up reliable spiking neuromorphic systems composed of partially unreliable analog memristive elements, with a more complex architecture and the capability of unsupervised learning.

Memristive and CMOS Devices for Neuromorphic Computing

Neuromorphic computing has emerged as one of the most promising paradigms to overcome the limitations of von Neumann architecture of conventional digital processors. The aim of neuromorphic computing is to faithfully reproduce the computing processes in the human brain, thus paralleling its outstanding energy efficiency and compactness. Toward this goal, however, some major challenges have to be faced. Since the brain processes information by high-density neural networks with ultra-low power consumption, novel device concepts combining high scalability, low-power operation, and advanced computing functionality must be developed. This work provides an overview of the most promising device concepts in neuromorphic computing including complementary metal-oxide semiconductor (CMOS) and memristive technologies. First, the physics and operation of CMOS-based floating-gate memory devices in artificial neural networks will be addressed. Then, several memristive concepts will be reviewed and discussed for applications in deep neural network and spiking neural network architectures. Finally, the main technology challenges and perspectives of neuromorphic computing will be discussed.

One-step regression and classification with cross-point resistive memory arrays

Machine learning has been getting attention in recent years as a tool to process big data generated by the ubiquitous sensors used in daily life. High-speed, low-energy computing machines are in demand to enable real-time artificial intelligence processing of such data. These requirements challenge the current metal-oxide-semiconductor technology, which is limited by Moore's law approaching its end and the communication bottleneck in conventional computing architecture. Novel computing concepts, architectures, and devices are thus strongly needed to accelerate data-intensive applications. Here, we show that a cross-point resistive memory circuit with feedback configuration can train traditional machine learning algorithms such as linear regression and logistic regression in just one step by computing the pseudoinverse matrix of the data within the memory. One-step learning is further supported by simulations of the prediction of housing price in Boston and the training of a two-layer neural network for MNIST digit recognition.

Unsupervised Learning on Resistive Memory Array Based Spiking Neural Networks

Spiking Neural Networks (SNNs) offer great potential to promote both the performance and efficiency of real-world computing systems, considering the biological plausibility of SNNs. The emerging analog Resistive Random Access Memory (RRAM) devices have drawn increasing interest as potential neuromorphic hardware for implementing practical SNNs. In this article, we propose a novel training approach (called greedy training) for SNNs by diluting spike events on the temporal dimension with necessary controls on input encoding phase switching, endowing SNNs with the ability to cooperate with the inevitable conductance variations of RRAM devices. The SNNs could utilize Spike-Timing-Dependent Plasticity (STDP) as the unsupervised learning rule, and this plasticity has been observed on our one-transistor-one-resistor (1T1R) RRAM devices under voltage pulses with designed waveforms. We have also conducted handwritten digit recognition task simulations on MNIST dataset. The results show that the unsupervised SNNs trained by the proposed method could mitigate the requirement for the number of gradual levels of RRAM devices, and also have immunity to both cycle-to-cycle and device-to-device RRAM conductance variations. Unsupervised SNNs trained by the proposed methods could cooperate with real RRAM devices with non-ideal behaviors better, promising high feasibility of RRAM array based neuromorphic systems for online training.

All Nonmetal Resistive Random Access Memory

Traditional Resistive Random Access Memory (RRAM) is a metal-insulator-metal (MIM) structure, in which metal oxide is usually used as an insulator. The charge transport mechanism of traditional RRAM is attributed to a metallic filament inside the RRAM. In this paper, we demonstrated a novel RRAM device with no metal inside. The N⁺-Si/SiO_x/P⁺-Si combination forms a N⁺IP⁺ diode structure that is different from traditional MIM RRAM. A large high-resistance/low-resistance window of 1.9 × 10⁴ was measured at room temperature. A favorable retention memory window of 1.2 × 10³ was attained for 10⁴ s at 85 °C. The charge transport mechanism of virgin, high- and low-resistance states can be well modeled by the single Shklovskii-Efros percolation mechanism rather than the charge transport in metallic filament. X-ray photoelectron spectroscopy demonstrated that the value of x in SiO_x was 0.62, which provided sufficient oxygen vacancies for set/reset RRAM functions.

Memristive crossbar arrays for brain-inspired computing

With their working mechanisms based on ion migration, the switching dynamics and electrical behaviour of memristive devices resemble those of synapses and neurons, making these devices promising candidates for brain-inspired computing. Built into large-scale crossbar arrays to form neural networks, they perform efficient in-memory computing with massive parallelism by directly using physical laws. The dynamical interactions between artificial synapses and neurons equip the networks with both supervised and unsupervised learning capabilities. Moreover, their ability to interface with analogue signals from sensors without analogue/digital conversions reduces the processing time and energy overhead. Although numerous simulations have indicated the potential of these networks for brain-inspired computing, experimental implementation of large-scale memristive arrays is still in its infancy. This Review looks at the progress, challenges and possible solutions for efficient brain-inspired computation with memristive implementations, both as accelerators for deep learning and as building blocks for spiking neural networks.

Solving matrix equations in one step with cross-point resistive arrays

Conventional digital computers can execute advanced operations by a sequence of elementary Boolean functions of 2 or more bits. As a result, complicated tasks such as solving a linear system or solving a differential equation require a large number of computing steps and an extensive use of memory units to store individual bits. To accelerate the execution of such advanced tasks, in-memory computing with resistive memories provides a promising avenue, thanks to analog data storage and physical computation in the memory. Here, we show that a cross-point array of resistive memory devices can directly solve a system of linear equations, or find the matrix eigenvectors. These operations are completed in just one single step, thanks to the physical computing with Ohm's and Kirchhoff's laws, and thanks to the negative feedback connection in the cross-point circuit. Algebraic problems are demonstrated in hardware and applied to classical computing tasks, such as ranking webpages and solving the Schrödinger equation in one step.

Computing of temporal information in spiking neural networks with ReRAM synapses

Resistive switching random-access memory (ReRAM) is a two-terminal device based on ion migration to induce resistance switching between a high resistance state (HRS) and a low resistance state (LRS). ReRAM is considered one of the most promising technologies for artificial synapses in brain-inspired neuromorphic computing systems. However, there is still a lack of general understanding about how to develop such a gestalt system to imitate and compete with the brain's functionality and efficiency. Spiking neural networks (SNNs) are well suited to describe the complex spatiotemporal processing inside the brain, where the energy efficiency of computation mostly relies on the spike carrying information about both space (which neuron fires) and time (when a neuron fires). This work addresses the methodology and implementation of a neuromorphic SNN system to compute the temporal information among neural spikes using ReRAM synapses capable of spike-timing dependent plasticity (STDP). The learning and recognition of spatiotemporal spike sequences are experimentally demonstrated. Our simulation study shows that it is possible to construct a multi-layer spatiotemporal computing network. Spatiotemporal computing also enables learning and detection of the trace of moving objects and mimicking of the hierarchy structure of the biological visual cortex adopting temporal-coding for fast recognition.

Extended memory lifetime in spiking neural networks employing memristive synapses with nonlinear conductance dynamics

Spiking neural networks (SNNs) employing memristive synapses are capable of life-long online learning. Because of their ability to process and classify large amounts of data in real-time using compact and low-power electronic systems, they promise a substantial technology breakthrough. However, the critical issue that memristor-based SNNs have to face is the fundamental limitation in their memory capacity due to finite resolution of the synaptic elements, which leads to the replacement of old memories with new ones and to a finite memory lifetime. In this study we demonstrate that the nonlinear conductance dynamics of memristive devices can be exploited to improve the memory lifetime of a network. The network is simulated on the basis of a spiking neuron model of mixed-signal digital-analogue sub-threshold neuromorphic CMOS circuits, and on memristive synapse models derived from the experimental nonlinear conductance dynamics of resistive memory devices when stimulated by trains of identical pulses. The network learning circuits implement a spike-based plasticity rule compatible with both spike-timing and rate-based learning rules. In order to get an insight on the memory lifetime of the network, we analyse the learning dynamics in the context of a classical benchmark of neural network learning, that is hand-written digit classification. In the proposed architecture, the memory lifetime and the performance of the network are improved for memristive synapses with nonlinear dynamics with respect to linear synapses with similar resolution. These results demonstrate the importance of following holistic approaches that combine the study of theoretical learning models with the development of neuromorphic CMOS SNNs with memristive devices used to implement life-long on-chip learning.

Chemically addressed switching measurements in graphene electrode memristive devices using in situ XPS

The memristor has been the topic of heated research activity since the Pt/TiO2/TiOx/Pt structure was reported by Hewlett-Packard Labs. The characteristics of memristors such as the pinched hysteresis loops and time and input signal-dependent memristance are due to the drift of positively charged oxygen vacancies in the TiOx layer. While different modes of switching behaviour have been characterized, observing the switching as it happens with in situ measurements using X-ray photoelectron spectroscopy (XPS) can allow a better understanding of the device operation. The setup used in this work enables the application of voltage signals of different frequencies and amplitudes and observing the hysteresis seen in the I-V plane through chemical addressing. The measurements were conducted on Pt/TiO2/TiOx/graphene structures. The single layer graphene, utilized as a top electrode, effectively acts as a transparent electrode in that the layer beneath it can be observed to a depth of ∼10 nm in XPS. This allows for the observation of the changes in the binding energies of C 1s, Ti 2p and O 1s. By comparing the variation in the binding energy of Ti 2p to that of C 1s, and observing how the variation changes for different excitation signals (at different frequency and amplitudes), it is possible to inspect the effect of the oxygen vacancy drift. We employed a variety of input signals with varying frequency and amplitudes in order to test the memristive devices thoroughly: sine wave, triangular wave and DC bias. Graphene has been attracting attention due to its intriguing optoelectronic properties. This study utilizes graphene as a transparent top electrode for in situ measurements in XPS to observe chemically-addressed memristive hysteresis while an excitation signal is being applied to the device.

Spike-timing-dependent plasticity learning of coincidence detection with passively integrated memristive circuits

Spiking neural networks, the most realistic artificial representation of biological nervous systems, are promising due to their inherent local training rules that enable low-overhead online learning, and energy-efficient information encoding. Their downside is more demanding functionality of the artificial synapses, notably including spike-timing-dependent plasticity, which makes their compact efficient hardware implementation challenging with conventional device technologies. Recent work showed that memristors are excellent candidates for artificial synapses, although reports of even simple neuromorphic systems are still very rare. In this study, we experimentally demonstrate coincidence detection using a spiking neural network, implemented with passively integrated metal-oxide memristive synapses connected to an analogue leaky-integrate-and-fire silicon neuron. By employing spike-timing-dependent plasticity learning, the network is able to robustly detect the coincidence by selectively increasing the synaptic efficacies corresponding to the synchronized inputs. Not surprisingly, our results indicate that device-to-device variation is the main challenge towards realization of more complex spiking networks.

Hardware implementation of spiking neural networks holds promise for high energy efficient brain-inspired computing. Here, Prezioso et al. realize the detection of synchrony in a demo circuit composed of 20 metal-oxide memristor synapses connected to a leaky-integrate-and-fire silicon neuron.

Recurrent Spiking Neural Network Learning Based on a Competitive Maximization of Neuronal Activity

Spiking neural networks (SNNs) are believed to be highly computationally and energy efficient for specific neurochip hardware real-time solutions. However, there is a lack of learning algorithms for complex SNNs with recurrent connections, comparable in efficiency with back-propagation techniques and capable of unsupervised training. Here we suppose that each neuron in a biological neural network tends to maximize its activity in competition with other neurons, and put this principle at the basis of a new SNN learning algorithm. In such a way, a spiking network with the learned feed-forward, reciprocal and intralayer inhibitory connections, is introduced to the MNIST database digit recognition. It has been demonstrated that this SNN can be trained without a teacher, after a short supervised initialization of weights by the same algorithm. Also, it has been shown that neurons are grouped into families of hierarchical structures, corresponding to different digit classes and their associations. This property is expected to be useful to reduce the number of layers in deep neural networks and modeling the formation of various functional structures in a biological nervous system. Comparison of the learning properties of the suggested algorithm, with those of the Sparse Distributed Representation approach shows similarity in coding but also some advantages of the former. The basic principle of the proposed algorithm is believed to be practically applicable to the construction of much more complicated and diverse task solving SNNs. We refer to this new approach as "Family-Engaged Execution and Learning of Induced Neuron Groups," or FEELING.

Fifteen Nanometer Resolved Patterns in Selective Area Atomic Layer Deposition-Defectivity Reduction by Monolayer Design

Selective area atomic layer deposition (SA-ALD) offers the potential to replace a lithography step and provide a significant advantage to mitigate pattern errors and relax design rules in semiconductor fabrication. One class of materials that shows promise to enable this selective deposition process are self-assembled monolayers (SAMs). In an effort to more completely understand the ability of these materials to function as barriers for ALD processes and their failure mechanism, a series of SAM derivatives were synthesized and their structure-property relationship explored. These materials incorporate different side group functionalities and were evaluated in the deposition of a sacrificial etch mask. Monolayers with weak supramolecular interactions between components (for example, van der Waals) were found to direct a selective deposition, though they exhibit significant defectivity at and below 100 nm feature sizes. The incorporation of stronger noncovalent supramolecular interacting groups in the monolayer design, such as hydrogen bonding units or pi-pi interactions, did not produce an added benefit over the weaker interacting components. Incorporation of reactive moieties in the monolayer component that enabled the polymerization of an SAM surface, however, provided a more effective barrier, greatly reducing the number and types of defects observed in the selectively deposited ALD film. These reactive monolayers enabled the selective deposition of a film with critical dimensions as low as 15 nm. It was also found that the selectively deposited film functioned as an effective barrier for isotropic etch chemistries, allowing the selective removal of a metal without affecting the surrounding surface. This work enables selective area ALD as a technology through (1) the development of a material that dramatically reduces defectivity and (2) the demonstrated use of the selectively deposited film as an etch mask and its subsequent removal under mild conditions.

Deep Learning With Spiking Neurons: Opportunities and Challenges

Spiking neural networks (SNNs) are inspired by information processing in biology, where sparse and asynchronous binary signals are communicated and processed in a massively parallel fashion. SNNs on neuromorphic hardware exhibit favorable properties such as low power consumption, fast inference, and event-driven information processing. This makes them interesting candidates for the efficient implementation of deep neural networks, the method of choice for many machine learning tasks. In this review, we address the opportunities that deep spiking networks offer and investigate in detail the challenges associated with training SNNs in a way that makes them competitive with conventional deep learning, but simultaneously allows for efficient mapping to hardware. A wide range of training methods for SNNs is presented, ranging from the conversion of conventional deep networks into SNNs, constrained training before conversion, spiking variants of backpropagation, and biologically motivated variants of STDP. The goal of our review is to define a categorization of SNN training methods, and summarize their advantages and drawbacks. We further discuss relationships between SNNs and binary networks, which are becoming popular for efficient digital hardware implementation. Neuromorphic hardware platforms have great potential to enable deep spiking networks in real-world applications. We compare the suitability of various neuromorphic systems that have been developed over the past years, and investigate potential use cases. Neuromorphic approaches and conventional machine learning should not be considered simply two solutions to the same classes of problems, instead it is possible to identify and exploit their task-specific advantages. Deep SNNs offer great opportunities to work with new types of event-based sensors, exploit temporal codes and local on-chip learning, and we have so far just scratched the surface of realizing these advantages in practical applications.

Stretchable and conformable synapse memristors for wearable and implantable electronics

Stretchable and conformable synapse memristors that can emulate the behaviour of the biological neural system and well adhere onto the curved surfaces simultaneously are desirable for the development of imperceptible wearable and implantable neuromorphic computing systems. Previous synapse memristors have been mainly limited to rigid substrates. Herein, a stretchable and conformable memristor with fundamental synaptic functions including potentiation/depression characteristics, long/short-term plasticity (STP and LTP), "learning-forgetting-relearning" behaviour, and spike-rate-dependent and spike-amplitude-dependent plasticity is demonstrated based on highly elastic Ag nanoparticle-doped thermoplastic polyurethanes (TPU : Ag NPs) and polydimethylsiloxane (PDMS). The memristor can be well operated even at 60% strain and can be well conformed onto the curved surfaces. The formed conductive filament (CF) obtained from the movement of Ag nanoparticle clusters under the locally enhanced electric field gives rise to resistance switching of our memristor. These results indicate a feasible strategy to realize stretchable and conformable synaptic devices for the development of new-generation artificial intelligence computers.

Learning of spatiotemporal patterns in a spiking neural network with resistive switching synapses

The human brain is a complex integrated spatiotemporal system, where space (which neuron fires) and time (when a neuron fires) both carry information to be processed by cognitive functions. To parallel the energy efficiency and computing functionality of the brain, methodologies operating over both the space and time domains are thus essential. Implementing spatiotemporal functions within nanoscale devices capable of synaptic plasticity would contribute a significant step toward constructing a large-scale neuromorphic system that emulates the computing and energy performances of the human brain. We present a neuromorphic approach to brain-like spatiotemporal computing using resistive switching synapses. To process the spatiotemporal spike pattern, time-coded spikes are reshaped into exponentially decaying signals that are fed to a McCulloch-Pitts neuron. Recognition of spike sequences is demonstrated after supervised training of a multiple-neuron network with resistive switching synapses. Finally, we show that, due to the sensitivity to precise spike timing, the spatiotemporal neural network is able to mimic the sound azimuth detection of the human brain.

An On-Chip Trainable and the Clock-Less Spiking Neural Network With 1R Memristive Synapses

Spiking neural networks (SNNs) are being explored in an attempt to mimic brain's capability to learn and recognize at low power. Crossbar architecture with highly scalable resistive RAM or RRAM array serving as synaptic weights and neuronal drivers in the periphery is an attractive option for the SNN. Recognition (akin to "reading" the synaptic weight) requires small amplitude bias applied across the RRAM to minimize conductance change. Learning (akin to "writing" or updating the synaptic weight) requires large amplitude bias pulses to produce a conductance change. The contradictory bias amplitude requirement to perform reading and writing simultaneously and asynchronously, akin to biology, is a major challenge. Solutions suggested in the literature rely on time-division-multiplexing of read and write operations based on clocks, or approximations ignoring the reading when coincidental with writing. In this paper, we overcome this challenge and present a clock-less approach wherein reading and writing are performed in different frequency domains. This enables learning and recognition simultaneously on an SNN. We validate our scheme in SPICE circuit simulator by translating a two-layered feed-forward Iris classifying SNN to demonstrate software-equivalent performance. The system performance is not adversely affected by a voltage dependence of conductance in realistic RRAMs, despite departing from linearity. Overall, our approach enables direct implementation of biological SNN algorithms in hardware.

Unsupervised Hebbian learning experimentally realized with analogue memristive crossbar arrays

Conventional transistor electronics are reaching their limits in terms of scalability, power dissipation, and the underlying Boolean system architecture. To overcome this obstacle neuromorphic analogue systems are recently highly investigated. Particularly, the use of memristive devices in VLSI analogue concepts provides a promising pathway to realize novel bio-inspired computing architectures, which are able to unravel the foreseen difficulties of traditional electronics. Currently, a variety of materials and device structures are being studied along with novel computing schemes to make use of the attractive features of memristive devices for neuromorphic computing. However, a number of obstacles still have to be overcome to cast memristive devices into hardware systems. Most important is a physical implementation of memristive devices, which can cope with the high complexity of neural networks. This includes the integration of analogue and electroforming-free memristive devices into crossbar structures with no additional electronic components, such as selector devices. Here, an unsupervised, bio-motivated Hebbian based learning platform for visual pattern recognition is presented. The heart of the system is a crossbar array (16 × 16) which consists of selector-free and forming-free (non-filamentary) memristive devices, which exhibit analogue I-V characteristics.

Prediction of pKa Values for Neutral and Basic Drugs based on Hybrid Artificial Intelligence Methods

The pKa value of drugs is an important parameter in drug design and pharmacology. In this paper, an improved particle swarm optimization (PSO) algorithm was proposed based on the population entropy diversity. In the improved algorithm, when the population entropy was higher than the set maximum threshold, the convergence strategy was adopted; when the population entropy was lower than the set minimum threshold the divergence strategy was adopted; when the population entropy was between the maximum and minimum threshold, the self-adaptive adjustment strategy was maintained. The improved PSO algorithm was applied in the training of radial basis function artificial neural network (RBF ANN) model and the selection of molecular descriptors. A quantitative structure-activity relationship model based on RBF ANN trained by the improved PSO algorithm was proposed to predict the pKa values of 74 kinds of neutral and basic drugs and then validated by another database containing 20 molecules. The validation results showed that the model had a good prediction performance. The absolute average relative error, root mean square error, and squared correlation coefficient were 0.3105, 0.0411, and 0.9685, respectively. The model can be used as a reference for exploring other quantitative structure-activity relationships.