Digital Electronic System-on-Chip Design: Methodologies, Tools, Evolution, and Trends

This paper reviews the evolution of methodologies and tools for modeling, simulation, and design of digital electronic system-on-chip (SoC) implementations, with a focus on industrial electronics applications. Key technological, economic, and geopolitical trends are presented at the outset, before reviewing SoC design methodologies and tools. The fundamentals of SoC design flows are laid out. The paper then exposes the crucial role of the intellectual property (IP) industry in the relentless improvements in performance, power, area, and cost (PPAC) attributes of SoCs. High abstraction levels in design capture and increasingly automated design tools (e.g., for verification and validation, synthesis, place, and route) continue to push the boundaries. Aerospace and automotive domains are included as brief case studies. This paper also presents current and future trends in SoC design and implementation including the rising, evolution, and usage of machine learning (ML) and artificial intelligence (AI) algorithms, techniques, and tools, which promise even greater PPAC optimizations.

Calibration of Ring Oscillator-Based Integrated Temperature Sensors for Power Management Systems

This paper details the development and validation of a temperature sensing methodology using an un-trimmed oscillator-based integrated sensor implemented in the 0.18-μm SOI XFAB process, with a focus on thermal monitoring in system-on-chip (SoC) based DC-DC converters. Our study identifies a quadratic relationship between the oscillator output frequency and temperature, which forms the basis of our proposed calibration mechanism. This mechanism aims at mitigating process variation effects, enabling accurate temperature-to-frequency mapping. Our research proposes and characterizes several trimming-free calibration techniques, covering a spectrum from zero to thirty-one frequency-temperature measurement points. Notably, the Corrected One-Point calibration method, requiring only a single ambient temperature measurement, emerges as a practical solution that removes the need for a temperature chamber. This method, after adjustment, successfully reduces the maximum error to within ±2.95 °C. Additionally, the Two-Point calibration method demonstrates improved precision with a maximum positive error of +1.56 °C at -15 °C and a maximum negative error of -3.13 °C at +10 °C (R2 value of 0.9958). The Three-Point calibration method performed similarly, yielding an R2 value of 0.9956. The findings of this study indicate that competitive results in temperature sensor calibration can be achieved without circuit trimming, offering a viable alternative or a complementary approach to traditional trimming techniques.

A Fully Integrated Low-Dropout Regulator with Improved Load Regulation and Transient Responses

A fully integrated low-dropout (LDO) regulator with improved load regulation and transient responses in 40 nm technology is presented in this paper. Combining adjustable threshold push-pull stage (ATPS) and master-slave power transistors topology, the proposed LDO maintains a three-stage structure within the full load range. The proposed structure ensures the steady-state performance of LDO and achieves 0.017 mV/mA load regulation. The ATPS consumes little quiescent current at light load current condition, and the turn-on threshold of the ATPS can be adjusted by a current source. Once the value of current source is set, the turn-on threshold is also determined. A benefit of the proposed structure is that the LDO can be stable from 0 to 100 mA load current with a maximum 100 pF parasitic load capacitance and a 0.7 pF compensation capacitor. It also shows good figure of merit (FOM) without an extra transient enhanced circuit. For the maximum 100 mA load transient with 100 ns edge time, the undershoot and overshoot are less than 33 mV. The dropout voltage of the regulator is 200 mV with input voltage of 1.1 V. The total current consumption of the LDO was 24.6 μA at no load.

Hardware-Assisted Security Monitoring Unit for Real-Time Ensuring Secure Instruction Execution and Data Processing in Embedded Systems

The hardware security of embedded systems is raising more and more concerns in numerous safety-critical applications, such as in the automotive, aerospace, avionic, and railway systems. Embedded systems are gaining popularity in these safety-sensitive sectors with high performance, low power, and great reliability, which are ideal control platforms for executing instruction operation and data processing. However, modern embedded systems are still exposing many potential hardware vulnerabilities to malicious attacks, including software-level and hardware-level attacks; these can cause program execution failure and confidential data leakage. For this reason, this paper presents a novel embedded system by integrating a hardware-assisted security monitoring unit (SMU), for achieving a reinforced system-on-chip (SoC) on ensuring program execution and data processing security. This architecture design was implemented and evaluated on a Xilinx Virtex-5 FPGA development board. Based on the evaluation of the SMU hardware implementation in terms of performance overhead, security capability, and resource consumption, the experimental results indicate that the SMU does not lead to a significant speed degradation to processor while executing different benchmarks, and its average performance overhead reduces to 2.18% on typical 8-KB I/D-Caches. Security capability evaluation confirms the monitoring effectiveness of SMU against both instruction and data tampering attacks. Meanwhile, the SoC satisfies a good balance between high-security and resource overhead.

An X-Band CMOS Digital Phased Array Radar from Hardware to Software

Phased array technology features rapid and directional scanning and has become a promising approach for remote sensing and wireless communication. In addition, element-level digitization has increased the feasibility of complicated signal processing and simultaneous multi-beamforming processes. However, the high cost and bulky characteristics of beam-steering systems have prevented their extensive application. In this paper, an X-band element-level digital phased array radar utilizing fully integrated complementary metal-oxide-semiconductor (CMOS) transceivers is proposed for achieving a low-cost and compact-size digital beamforming system. An 8–10 GHz transceiver system-on-chip (SoC) fabricated in 65 nm CMOS technology offers baseband filtering, frequency translation, and global clock synchronization through the proposed periodic pulse injection technique. A 16-element subarray module with an SoC integration, antenna-in-package, and tile array configuration achieves digital beamforming, back-end computing, and dc–dc conversion with a size of 317 × 149 × 74.6 mm³. A radar demonstrator with scalable subarray modules simultaneously realizes range sensing and azimuth recognition for pulsed radar configurations. Captured by the suggested software-defined pulsed radar, a complete range–azimuth figure with a 1 km maximum observation range can be displayed within 150 ms under the current implementation.

Background Light Rejection in SPAD-Based LiDAR Sensors by Adaptive Photon Coincidence Detection

Light detection and ranging (LiDAR) systems based on silicon single-photon avalanche diodes (SPAD) offer several advantages, like the fabrication of system-on-chips with a co-integrated detector and dedicated electronics, as well as low cost and high durability due to well-established CMOS technology. On the other hand, silicon-based detectors suffer from high background light in outdoor applications, like advanced driver assistance systems or autonomous driving, due to the limited wavelength range in the infrared spectrum. In this paper we present a novel method based on the adaptive adjustment of photon coincidence detection to suppress the background light and simultaneously improve the dynamic range. A major disadvantage of fixed parameter coincidence detection is the increased dynamic range of the resulting event rate, allowing good measurement performance only at a specific target reflectance. To overcome this limitation we have implemented adaptive photon coincidence detection. In this technique the parameters of the photon coincidence detection are adjusted to the actual measured background light intensity, giving a reduction of the event rate dynamic range and allowing the perception of high dynamic scenes. We present a 192 × 2 pixel CMOS SPAD-based LiDAR sensor utilizing this technique and accompanying outdoor measurements showing the capability of it. In this sensor adaptive photon coincidence detection improves the dynamic range of the measureable target reflectance by over 40 dB.

An Ultra-Low Power Smart Headband for Real-Time Epileptic Seizure Detection

In this paper, the design of a smart headband for epileptic seizure detection is presented. The proposed headband consists of four key components: 1) an analog front-end circuitry; 2) an epileptic seizure detection tag (ESDT); 3) a Bluetooth low-power chip; and 4) customized electrodes. All the above components are integrated into a fabric headband with only 50.3 g. The smart headband system dissipates 55.89 mW. The epileptic seizure detection algorithm inside ESDT is validated by using Boston Children’s Hospital’s CHB-MIT scalp EEG clinical database with the detection rate of 92.68% and the false alarm of 0.527/h. We develop a service APP connected to the cloud so that the patients’ health condition can be recorded and then referenced by doctors for further diagnosis or research.

Visual Detection and Tracking System for a Spherical Amphibious Robot

With the goal of supporting close-range observation tasks of a spherical amphibious robot, such as ecological observations and intelligent surveillance, a moving target detection and tracking system was designed and implemented in this study. Given the restrictions presented by the amphibious environment and the small-sized spherical amphibious robot, an industrial camera and vision algorithms using adaptive appearance models were adopted to construct the proposed system. To handle the problem of light scattering and absorption in the underwater environment, the multi-scale retinex with color restoration algorithm was used for image enhancement. Given the environmental disturbances in practical amphibious scenarios, the Gaussian mixture model was used to detect moving targets entering the field of view of the robot. A fast compressive tracker with a Kalman prediction mechanism was used to track the specified target. Considering the limited load space and the unique mechanical structure of the robot, the proposed vision system was fabricated with a low power system-on-chip using an asymmetric and heterogeneous computing architecture. Experimental results confirmed the validity and high efficiency of the proposed system. The design presented in this paper is able to meet future demands of spherical amphibious robots in biological monitoring and multi-robot cooperation.