A Flexible Design Platform for Si/SiGe Exchange-Only Qubits with Low Disorder

Operating semiconductor quantum processors with hopping spins

Qubits that can be efficiently controlled are essential for the development of scalable quantum hardware. Although resonant control is used to execute high-fidelity quantum gates, the scalability is challenged by the integration of high-frequency oscillating signals, qubit cross-talk, and heating. Here, we show that by engineering the hopping of spins between quantum dots with a site-dependent spin quantization axis, quantum control can be established with discrete signals. We demonstrate hopping-based quantum logic and obtain single-qubit gate fidelities of 99.97%, coherent shuttling fidelities of 99.992% per hop, and a two-qubit gate fidelity of 99.3%, corresponding to error rates that have been predicted to allow for quantum error correction. We also show that hopping spins constitute a tuning method by statistically mapping the coherence of a 10-quantum dot system. Our results show that dense quantum dot arrays with sparse occupation could be developed for efficient and high-connectivity qubit registers.

Bounds to electron spin qubit variability for scalable CMOS architectures

Spins of electrons in silicon MOS quantum dots combine exquisite quantum properties and scalable fabrication. In the age of quantum technology, however, the metrics that crowned Si/SiO2 as the microelectronics standard need to be reassessed with respect to their impact upon qubit performance. We chart spin qubit variability due to the unavoidable atomic-scale roughness of the Si/SiO2 interface, compiling experiments across 12 devices, and develop theoretical tools to analyse these results. Atomistic tight binding and path integral Monte Carlo methods are adapted to describe fluctuations in devices with millions of atoms by directly analysing their wavefunctions and electron paths instead of their energy spectra. We correlate the effect of roughness with the variability in qubit position, deformation, valley splitting, valley phase, spin-orbit coupling and exchange coupling. These variabilities are found to be bounded, and they lie within the tolerances for scalable architectures for quantum computing as long as robust control methods are incorporated.

Probing single electrons across 300-mm spin qubit wafers

Building a fault-tolerant quantum computer will require vast numbers of physical qubits. For qubit technologies based on solid-state electronic devices1-3, integrating millions of qubits in a single processor will require device fabrication to reach a scale comparable to that of the modern complementary metal-oxide-semiconductor (CMOS) industry. Equally important, the scale of cryogenic device testing must keep pace to enable efficient device screening and to improve statistical metrics such as qubit yield and voltage variation. Spin qubits1,4,5 based on electrons in Si have shown impressive control fidelities6-9 but have historically been challenged by yield and process variation10-12. Here we present a testing process using a cryogenic 300-mm wafer prober13 to collect high-volume data on the performance of hundreds of industry-manufactured spin qubit devices at 1.6 K. This testing method provides fast feedback to enable optimization of the CMOS-compatible fabrication process, leading to high yield and low process variation. Using this system, we automate measurements of the operating point of spin qubits and investigate the transitions of single electrons across full wafers. We analyse the random variation in single-electron operating voltages and find that the optimized fabrication process leads to low levels of disorder at the 300-mm scale. Together, these results demonstrate the advances that can be achieved through the application of CMOS-industry techniques to the fabrication and measurement of spin qubit devices.

Shared control of a 16 semiconductor quantum dot crossbar array

The efficient control of a large number of qubits is one of the most challenging aspects for practical quantum computing. Current approaches in solid-state quantum technology are based on brute-force methods, where each and every qubit requires at least one unique control line-an approach that will become unsustainable when scaling to the required millions of qubits. Here, inspired by random-access architectures in classical electronics, we introduce the shared control of semiconductor quantum dots to efficiently operate a two-dimensional crossbar array in planar germanium. We tune the entire array, comprising 16 quantum dots, to the few-hole regime. We then confine an odd number of holes in each site to isolate an unpaired spin per dot. Moving forward, we demonstrate on a vertical and a horizontal double quantum dot a method for the selective control of the interdot coupling and achieve a tunnel coupling tunability over more than 10 GHz. The operation of a quantum electronic device with fewer control terminals than tunable experimental parameters represents a compelling step forward in the construction of scalable quantum technology.

Single-Electron Occupation in Quantum Dot Arrays at Selectable Plunger Gate Voltage

The small footprint of semiconductor qubits is favorable for scalable quantum computing. However, their size also makes them sensitive to their local environment and variations in the gate structure. Currently, each device requires tailored gate voltages to confine a single charge per quantum dot, clearly challenging scalability. Here, we tune these gate voltages and equalize them solely through the temporary application of stress voltages. In a double quantum dot, we reach a stable (1,1) charge state at identical and predetermined plunger gate voltage and for various interdot couplings. Applying our findings, we tune a 2 × 2 quadruple quantum dot such that the (1,1,1,1) charge state is reached when all plunger gates are set to 1 V. The ability to define required gate voltages may relax requirements on control electronics and operations for spin qubit devices, providing means to advance quantum hardware.

Electrical Control of Uniformity in Quantum Dot Devices

Highly uniform quantum systems are essential for the practical implementation of scalable quantum processors. While quantum dot spin qubits based on semiconductor technology are a promising platform for large-scale quantum computing, their small size makes them particularly sensitive to their local environment. Here, we present a method to electrically obtain a high degree of uniformity in the intrinsic potential landscape using hysteretic shifts of the gate voltage characteristics. We demonstrate the tuning of pinch-off voltages in quantum dot devices over hundreds of millivolts that then remain stable at least for hours. Applying our method, we homogenize the pinch-off voltages of the plunger gates in a linear array for four quantum dots, reducing the spread in pinch-off voltages by one order of magnitude. This work provides a new tool for the tuning of quantum dot devices and offers new perspectives for the implementation of scalable spin qubit arrays.

Universal logic with encoded spin qubits in silicon

Quantum computation features known examples of hardware acceleration for certain problems, but is challenging to realize because of its susceptibility to small errors from noise or imperfect control. The principles of fault tolerance may enable computational acceleration with imperfect hardware, but they place strict requirements on the character and correlation of errors1. For many qubit technologies2-21, some challenges to achieving fault tolerance can be traced to correlated errors arising from the need to control qubits by injecting microwave energy matching qubit resonances. Here we demonstrate an alternative approach to quantum computation that uses energy-degenerate encoded qubit states controlled by nearest-neighbour contact interactions that partially swap the spin states of electrons with those of their neighbours. Calibrated sequences of such partial swaps, implemented using only voltage pulses, allow universal quantum control while bypassing microwave-associated correlated error sources1,22-28. We use an array of six 28Si/SiGe quantum dots, built using a platform that is capable of extending in two dimensions following processes used in conventional microelectronics29. We quantify the operational fidelity of universal control of two encoded qubits using interleaved randomized benchmarking30, finding a fidelity of 96.3% ± 0.7% for encoded controlled NOT operations and 99.3% ± 0.5% for encoded SWAP. The quantum coherence offered by enriched silicon5-9,16,18,20,22,27,29,31-37, the all-electrical and low-crosstalk-control of partial swap operations1,22-28 and the configurable insensitivity of our encoding to certain error sources28,33,34,38 all combine to offer a strong pathway towards scalable fault tolerance and computational advantage.

A shuttling-based two-qubit logic gate for linking distant silicon quantum processors

Control of entanglement between qubits at distant quantum processors using a two-qubit gate is an essential function of a scalable, modular implementation of quantum computation. Among the many qubit platforms, spin qubits in silicon quantum dots are promising for large-scale integration along with their nanofabrication capability. However, linking distant silicon quantum processors is challenging as two-qubit gates in spin qubits typically utilize short-range exchange coupling, which is only effective between nearest-neighbor quantum dots. Here we demonstrate a two-qubit gate between spin qubits via coherent spin shuttling, a key technology for linking distant silicon quantum processors. Coherent shuttling of a spin qubit enables efficient switching of the exchange coupling with an on/off ratio exceeding 1000, while preserving the spin coherence by 99.6% for the single shuttling between neighboring dots. With this shuttling-mode exchange control, we demonstrate a two-qubit controlled-phase gate with a fidelity of 93%, assessed via randomized benchmarking. Combination of our technique and a phase coherent shuttling of a qubit across a large quantum dot array will provide feasible path toward a quantum link between distant silicon quantum processors, a key requirement for large-scale quantum computation.

A coherent quantum link between distant quantum processors is desirable for scaling up of quantum computation. Noiri et al. demonstrate a strategy to link distant quantum processors in silicon, by implementing a shuttling-based two-qubit gate between spin qubits in a Si/SiGe triple quantum dot.

Quantum error correction with silicon spin qubits

Future large-scale quantum computers will rely on quantum error correction (QEC) to protect the fragile quantum information during computation1,2. Among the possible candidate platforms for realizing quantum computing devices, the compatibility with mature nanofabrication technologies of silicon-based spin qubits offers promise to overcome the challenges in scaling up device sizes from the prototypes of today to large-scale computers3-5. Recent advances in silicon-based qubits have enabled the implementations of high-quality one-qubit and two-qubit systems6-8. However, the demonstration of QEC, which requires three or more coupled qubits1, and involves a three-qubit gate9-11 or measurement-based feedback, remains an open challenge. Here we demonstrate a three-qubit phase-correcting code in silicon, in which an encoded three-qubit state is protected against any phase-flip error on one of the three qubits. The correction to this encoded state is performed by a three-qubit conditional rotation, which we implement by an efficient single-step resonantly driven iToffoli gate. As expected, the error correction mitigates the errors owing to one-qubit phase-flip, as well as the intrinsic dephasing mainly owing to quasi-static phase noise. These results show successful implementation of QEC and the potential of a silicon-based platform for large-scale quantum computing.

Two-qubit silicon quantum processor with operation fidelity exceeding 99

Silicon spin qubits satisfy the necessary criteria for quantum information processing. However, a demonstration of high-fidelity state preparation and readout combined with high-fidelity single- and two-qubit gates, all of which must be present for quantum error correction, has been lacking. We use a two-qubit Si/SiGe quantum processor to demonstrate state preparation and readout with fidelity greater than 97%, combined with both single- and two-qubit control fidelities exceeding 99%. The operation of the quantum processor is quantitatively characterized using gate set tomography and randomized benchmarking. Our results highlight the potential of silicon spin qubits to become a dominant technology in the development of intermediate-scale quantum processors.