Thickness Trends of Electron and Hole Conduction and Contact Carrier Injection in Surface Charge Transfer Doped 2D Field Effect Transistors

Recent progress in plasma modification of 2D metal chalcogenides for electronic devices and optoelectronic devices

Two-dimensional metal chalcogenides (2D MCs) present a great opportunity for overcoming the size limitation of traditional silicon-based complementary metal-oxide-semiconductor (CMOS) devices. Controllable modulation compatible with CMOS processes is essential for the improvement of performance and the large-scale applications of 2D MCs. In this review, we summarize the recent progress in plasma modification of 2D MCs, including substitutional doping, defect engineering, surface charge transfer, interlayer coupling modulation, thickness control, and nano-array pattern etching in the fields of electronic devices and optoelectronic devices. Finally, challenges and outlooks for plasma modulation of 2D MCs are presented to offer valuable references for future studies.

Analysis of p-Type Doping in Graphene Induced by Monolayer-Oxidized TMDs

Doping is one of the most difficult technological challenges for realizing reliable two-dimensional (2D) material-based semiconductor devices, arising from their ultrathinness. Here, we systematically investigate the impact of different types of nonstoichiometric solid MOx (M are W or Mo) dopants obtained by oxidizing transition metal dichalcogenides (TMDs: WSe2 or MoS2) formed on graphene FETs, which results in p-type doping along with disorders. From the results obtained in this study, we were able to suggest an analytical technique to optimize the optimal UV-ozone (UVO) treatment to achieve high p-type doping concentration in graphene FETs (∼2.5 × 1013 cm-2 in this study) without generating defects, mainly by analyzing the time dependency of D and D' peaks measured by Raman spectroscopy. Furthermore, an analysis of the structure of graphene sheets using TEM indicates that WOx plays a better protective role in graphene, compared to MoOx, suggesting that WOx is more effective for preventing the degradation of graphene during UVO treatment. To enhance the practical application aspect of our work, we have fabricated a graphene photodetector by selectively doping the graphene through oxidized TMDs, creating a p-n junction, which resulted in improved photoresponsivity compared to the intrinsic graphene device. Our results offer a practical guideline for the utilization of surface charge transfer doping of graphene toward CMOS applications.

Self-Aligned Top-Gate Structure in High-Performance 2D p-FETs via van der Waals Integration and Contact Spacer Doping

The potential of 2D materials in future CMOS technology is hindered by the lack of high-performance p-type field effect transistors (p-FETs). While utilization of the top-gate (TG) structure with a p-doped spacer area offers a solution to this challenge, the design and device processing to form gate stacks pose serious challenges in realization of ideal p-FETs and PMOS inverters. This study presents a novel approach to address these challenges by fabricating lateral p+-p-p+ junction WSe2 FETs with self-aligned TG stacks in which desired junction is formed by van der Waals (vdW) integration and selective oxygen plasma-doping into spacer regions. The exceptional electrostatic controllability with a high on/off current ratio and small subthreshold swing (SS) of plasma doped p-FETs is achieved with the self-aligned metal/hBN gate stacks. To demonstrate the effectiveness of our approach, we construct a PMOS inverter using this device architecture, which exhibits a remarkably low power consumption of approximately 4.5 nW.

Toward High-Performance p-Type Two-Dimensional Field Effect Transistors: Contact Engineering, Scaling, and Doping

n-type field effect transistors (FETs) based on two-dimensional (2D) transition-metal dichalcogenides (TMDs) such as MoS2 and WS2 have come close to meeting the requirements set forth in the International Roadmap for Devices and Systems (IRDS). However, p-type 2D FETs are dramatically lagging behind in meeting performance standards. Here, we adopt a three-pronged approach that includes contact engineering, channel length (Lch) scaling, and monolayer doping to achieve high performance p-type FETs based on synthetic WSe2. Using electrical measurements backed by atomistic imaging and rigorous analysis, Pd was identified as the favorable contact metal for WSe2 owing to better epitaxy, larger grain size, and higher compressive strain, leading to a lower Schottky barrier height. While the ON-state performance of Pd-contacted WSe2 FETs was improved by ∼10× by aggressively scaling Lch from 1 μm down to ∼20 nm, ultrascaled FETs were found to be contact limited. To reduce the contact resistance, monolayer tungsten oxyselenide (WOxSey) obtained using self-limiting oxidation of bilayer WSe2 was used as a p-type dopant. This led to ∼5× improvement in the ON-state performance and ∼9× reduction in the contact resistance. We were able to achieve a median ON-state current as high as ∼10 μA/μm for ultrascaled and doped p-type WSe2 FETs with Pd contacts. We also show the applicability of our monolayer doping strategy to other 2D materials such as MoS2, MoTe2, and MoSe2.

Dielectrics for Two-Dimensional Transition-Metal Dichalcogenide Applications

Despite over a decade of intense research efforts, the full potential of two-dimensional transition-metal dichalcogenides continues to be limited by major challenges. The lack of compatible and scalable dielectric materials and integration techniques restrict device performances and their commercial applications. Conventional dielectric integration techniques for bulk semiconductors are difficult to adapt for atomically thin two-dimensional materials. This review provides a brief introduction into various common and emerging dielectric synthesis and integration techniques and discusses their applicability for 2D transition metal dichalcogenides. Dielectric integration for various applications is reviewed in subsequent sections including nanoelectronics, optoelectronics, flexible electronics, valleytronics, biosensing, quantum information processing, and quantum sensing. For each application, we introduce basic device working principles, discuss the specific dielectric requirements, review current progress, present key challenges, and offer insights into future prospects and opportunities.

Hardware and Information Security Primitives Based on 2D Materials and Devices

Hardware security is a major concern for the entire semiconductor ecosystem that accounts for billions of dollars in annual losses. Similarly, information security is a critical need for the rapidly proliferating edge devices that continuously collect and communicate a massive volume of data. While silicon-based complementary metal-oxide-semiconductor technology offers security solutions, these are largely inadequate, inefficient, and often inconclusive, as well as resource intensive in time, energy, and cost, leading to tremendous room for innovation in this field. Furthermore, silicon-based security primitives have shown vulnerability to machine learning (ML) attacks. In recent years, 2D materials such as graphene and transition metal dichalcogenides have been intensely explored to mitigate these security challenges. In this review, 2D-materials-based hardware security solutions such as camouflaging, true random number generation, watermarking, anticounterfeiting, physically unclonable functions, and logic locking of integrated circuits (ICs) are summarized with accompanying discussion on their reliability and resilience to ML attacks. In addition, the role of native defects in 2D materials in developing high entropy hardware security primitives is also examined. Finally, the existing challenges for 2D materials, which must be overcome for large-scale deployment of 2D ICs to meet the security needs of the semiconductor industry, are discussed.

Infrared Photodetection from 2D/3D van der Waals Heterostructures

An infrared photodetector is a critical component that detects, identifies, and tracks complex targets in a detection system. Infrared photodetectors based on 3D bulk materials are widely applied in national defense, military, communications, and astronomy fields. The complex application environment requires higher performance and multi-dimensional capability. The emergence of 2D materials has brought new possibilities to develop next-generation infrared detectors. However, the inherent thickness limitations and the immature preparation of 2D materials still lead to low quantum efficiency and slow response speeds. This review summarizes 2D/3D hybrid van der Waals heterojunctions for infrared photodetection. First, the physical properties of 2D and 3D materials related to detection capability, including thickness, band gap, absorption band, quantum efficiency, and carrier mobility, are summarized. Then, the primary research progress of 2D/3D infrared detectors is reviewed from performance improvement (broadband, high-responsivity, fast response) and new functional devices (two-color detectors, polarization detectors). Importantly, combining low-doped 3D and flexible 2D materials can effectively improve the responsivity and detection speed due to a significant depletion region width. Furthermore, combining the anisotropic 2D lattice structure and high absorbance of 3D materials provides a new strategy in high-performance polarization detectors. This paper offers prospects for developing 2D/3D high-performance infrared detection technology.

Modulation Doping of Single-Layer Semiconductors for Improved Contact at Metal Interfaces

Single layers of two-dimensional (2D) materials hold the promise for further miniaturization of semiconductor electronic devices. However, the metal-semiconductor contact resistance limits device performance. To mitigate this problem, we propose modulation doping, specifically a doping layer placed on the opposite side of a metal-semiconductor interface. Using first-principles calculations to obtain the band alignment, we show that the Schottky barrier height and, consequently, the contact resistance at the metal-semiconductor interface can be reduced by modulation doping. We demonstrate the feasibility of this approach for a single-layer tungsten diselenide (WSe₂) channel and 2D MXene modulation doping layers, interfaced with several different metal contacts. Our results indicate that the Fermi level of the metal can be shifted across the entire band gap. This approach can be straight-forwardly generalized for other 2D semiconductors and a wide variety of doping layers.

The Road for 2D Semiconductors in the Silicon Age

Continued reduction in transistor size can improve the performance of silicon integrated circuits (ICs). However, as Moore's law approaches physical limits, high-performance growth in silicon ICs becomes unsustainable, due to challenges of scaling, energy efficiency, and memory limitations. The ultrathin layers, diverse band structures, unique electronic properties, and silicon-compatible processes of 2D materials create the potential to consistently drive advanced performance in ICs. Here, the potential of fusing 2D materials with silicon ICs to minimize the challenges in silicon ICs, and to create technologies beyond the von Neumann architecture, is presented, and the killer applications for 2D materials in logic and memory devices to ease scaling, energy efficiency bottlenecks, and memory dilemmas encountered in silicon ICs are discussed. The fusion of 2D materials allows the creation of all-in-one perception, memory, and computation technologies beyond the von Neumann architecture to enhance system efficiency and remove computing power bottlenecks. Progress on the 2D ICs demonstration is summarized, as well as the technical hurdles it faces in terms of wafer-scale heterostructure growth, transfer, and compatible integration with silicon ICs. Finally, the promising pathways and obstacles to the technological advances in ICs due to the integration of 2D materials with silicon are presented.

Challenges for Nanoscale CMOS Logic Based on Two-Dimensional Materials

For ultra-scaled technology nodes at channel lengths below 12 nm, two-dimensional (2D) materials are a potential replacement for silicon since even atomically thin 2D semiconductors can maintain sizable mobilities and provide enhanced gate control in a stacked channel nanosheet transistor geometry. While theoretical projections and available experimental prototypes indicate great potential for 2D field effect transistors (FETs), several major challenges must be solved to realize CMOS logic circuits based on 2D materials at the wafer scale. This review discusses the most critical issues and benchmarks against the targets outlined for the 0.7 nm node in the International Roadmap for Devices and Systems scheduled for 2034. These issues are grouped into four areas; device scaling, the formation of low-resistive contacts to 2D semiconductors, gate stack design, and wafer-scale process integration. Here, we summarize recent developments in these areas and identify the most important future research questions which will have to be solved to allow for industrial adaptation of the 2D technology.

Selective Electron Beam Patterning of Oxygen-Doped WSe2 for Seamless Lateral Junction Transistors

Surface charge transfer doping (SCTD) using oxygen plasma to form a p-type dopant oxide layer on transition metal dichalcogenide (TMDs) is a promising doping technique for 2D TMDs field-effect transistors (FETs). However, patternability of SCTD is a key challenge to effectively switch FETs. Herein, a simple method to selectively pattern degenerately p-type (p⁺ )-doped WSe₂ FETs via electron beam (e-beam) irradiation is reported. The effect of the selective e-beam irradiation is confirmed by the gate-tunable optical responses of seamless lateral p⁺ -p diodes. The OFF state of the devices by inducing trapped charges via selective e-beam irradiation onto a desired channel area in p⁺ -doped WSe₂ , which is in sharp contrast to globally p⁺ -doped WSe₂ FETs, is realized. Selective e-beam irradiation of the PMMA-passivated p⁺ -WSe₂ enables accurate control of the threshold voltage (V_th ) of WSe₂ devices by varying the pattern size and e-beam dose, while preserving the low contact resistance. By utilizing hBN as the gate dielectric, high-performance WSe₂ p-FETs with a saturation current of -280 µA µm^-1 and on/off ratio of 10⁹ are achieved. This study's technique demonstrates a facile approach to obtain high-performance TMD p-FETs by e-beam irradiation, enabling efficient switching and patternability toward various junction devices.

Fermi Level Pinning Dependent 2D Semiconductor Devices: Challenges and Prospects

Motivated by the high expectation for efficient electrostatic modulation of charge transport at very low voltages, atomically thin 2D materials with a range of bandgaps are investigated extensively for use in future semiconductor devices. However, researchers face formidable challenges in 2D device processing mainly originated from the out-of-plane van der Waals (vdW) structure of ultrathin 2D materials. As major challenges, untunable Schottky barrier height and the corresponding strong Fermi level pinning (FLP) at metal interfaces are observed unexpectedly with 2D vdW materials, giving rise to unmodulated semiconductor polarity, high contact resistance, and lowered device mobility. Here, FLP observed from recently developed 2D semiconductor devices is addressed differently from those observed from conventional semiconductor devices. It is understood that the observed FLP is attributed to inefficient doping into 2D materials, vdW gap present at the metal interface, and hybridized compounds formed under contacting metals. To provide readers with practical guidelines for the design of 2D devices, the impact of FLP occurring in 2D semiconductor devices is further reviewed by exploring various origins responsible for the FLP, effects of FLP on 2D device performances, and methods for improving metallic contact to 2D materials.

An Annealing Accelerator for Ising Spin Systems Based on In-Memory Complementary 2D FETs

Metaheuristic algorithms such as simulated annealing (SA) are often implemented for optimization in combinatorial problems, especially for discreet problems. SA employs a stochastic search, where high-energy transitions ("hill-climbing") are allowed with a temperature-dependent probability to escape local optima. Ising spin glass systems have properties such as spin disorder and "frustration" and provide a discreet combinatorial problem with a high number of metastable states and ground-state degeneracy. In this work, subthreshold Boltzmann transport is exploited in complementary 2D field-effect transistors (p-type WSe₂ and n-type MoS₂ ) integrated with an analog, nonvolatile, and programmable floating-gate memory stack to develop in-memory computing primitives necessary for energy- and area-efficient hardware acceleration of SA for Ising spin systems. Search acceleration of >800× is demonstrated for 4 × 4 ferromagnetic, antiferromagnetic, and spin glass systems using SA compared to an exhaustive search using a brute force trial at miniscule total energy expenditure of ≈120 nJ. The hardware-realistic numerical simulations further highlight the astounding benefits of SA in accelerating the search for larger spin lattices.

Molecular Approach to Engineer Two-Dimensional Devices for CMOS and beyond-CMOS Applications

Two-dimensional materials (2DMs) have attracted tremendous research interest over the last two decades. Their unique optical, electronic, thermal, and mechanical properties make 2DMs key building blocks for the fabrication of novel complementary metal-oxide-semiconductor (CMOS) and beyond-CMOS devices. Major advances in device functionality and performance have been made by the covalent or noncovalent functionalization of 2DMs with molecules: while the molecular coating of metal electrodes and dielectrics allows for more efficient charge injection and transport through the 2DMs, the combination of dynamic molecular systems, capable to respond to external stimuli, with 2DMs makes it possible to generate hybrid systems possessing new properties by realizing stimuli-responsive functional devices and thereby enabling functional diversification in More-than-Moore technologies. In this review, we first introduce emerging 2DMs, various classes of (macro)molecules, and molecular switches and discuss their relevant properties. We then turn to 2DM/molecule hybrid systems and the various physical and chemical strategies used to synthesize them. Next, we discuss the use of molecules and assemblies thereof to boost the performance of 2D transistors for CMOS applications and to impart diverse functionalities in beyond-CMOS devices. Finally, we present the challenges, opportunities, and long-term perspectives in this technologically promising field.

Demonstration of Stochastic Resonance, Population Coding, and Population Voting Using Artificial MoS2 Based Synapses

Fast detection of weak signals at low energy expenditure is a challenging but inescapable task for the evolutionary success of animals that survive in resource constrained environments. This task is accomplished by the sensory nervous system by exploiting the synergy between three astounding neural phenomena, namely, stochastic resonance (SR), population coding (PC), and population voting (PV). In SR, the constructive role of synaptic noise is exploited for the detection of otherwise invisible signals. In PC, the redundancy in neural population is exploited to reduce the detection latency. Finally, PV ensures unambiguous signal detection even in the presence of excessive noise. Here we adopt a similar strategies and experimentally demonstrate how a population of stochastic artificial neurons based on monolayer MoS₂ field effect transistors (FETs) can use an optimum amount of white Gaussian noise and population voting to detect invisible signals at a frugal energy expenditure (∼10s of nano-Joules). Our findings can aid remote sensing in the emerging era of the Internet of things (IoT) that thrive on energy efficiency.

Seeded 2D epitaxy of large-area single-crystal films of the van der Waals semiconductor 2H MoTe2

The integration of two-dimensional (2D) van der Waals semiconductors into silicon electronics technology will require the production of large-scale, uniform, and highly crystalline films. We report a route for synthesizing wafer-scale single-crystalline 2H molybdenum ditelluride (MoTe₂) semiconductors on an amorphous insulating substrate. In-plane 2D-epitaxy growth by tellurizing was triggered from a deliberately implanted single seed crystal. The resulting single-crystalline film completely covered a 2.5-centimeter wafer with excellent uniformity. The 2H MoTe₂ 2D single-crystalline film can use itself as a template for further rapid epitaxy in a vertical manner. Transistor arrays fabricated with the as-prepared 2H MoTe₂ single crystals exhibited high electrical performance, with excellent uniformity and 100% device yield.

Satisfiability Attack-Resistant Camouflaged Two-Dimensional Heterostructure Devices

Reverse engineering (RE) is one of the major security threats to the semiconductor industry due to the involvement of untrustworthy parties in an increasingly globalized chip manufacturing supply chain. RE efforts have already been successful in extracting device level functionalities from an integrated circuit (IC) with very limited resources. Camouflaging is an obfuscation method that can thwart such RE. Existing work on IC camouflaging primarily involves transformable interconnects and/or covert gates where variation in doping and dummy contacts hide the circuit structure or build cells that look alike but have different functionalities. Emerging solutions, such as polymorphic gates based on a giant spin Hall effect and Si nanowire field effect transistors (FETs), are also promising but add significant area overhead and are successfully decamouflaged by the satisfiability solver (SAT)-based RE techniques. Here, we harness the properties of two-dimensional (2D) transition-metal dichalcogenides (TMDs) including MoS₂, MoSe₂, MoTe₂, WS₂, and WSe₂ and their optically transparent transition-metal oxides (TMOs) to demonstrate area efficient camouflaging solutions that are resilient to SAT attack and automatic test pattern generation attacks. We show that resistors with resistance values differing by 5 orders of magnitude, diodes with variable turn-on voltages and reverse saturation currents, and FETs with adjustable conduction type, threshold voltages, and switching characteristics can be optically camouflaged to look exactly similar by engineering TMO/TMD heterostructures, allowing hardware obfuscation of both digital and analog circuits. Since this 2D heterostructure devices family is intrinsically camouflaged, NAND/NOR/AND/OR gates in the circuit can be obfuscated with significantly less area overhead, allowing 100% logic obfuscation compared to only 5% for complementary metal oxide semiconductor (CMOS)-based camouflaging. Finally, we demonstrate that the largest benchmarking circuit from ISCAS'85, comprised of more than 4000 logic gates when obfuscated with the CMOS-based technique, is successfully decamouflaged by SAT attack in <40 min; whereas, it renders to be invulnerable even in more than 10 h when camouflaged with 2D heterostructure devices, thereby corroborating our hypothesis of high resilience against RE. Our approach of connecting material properties to innovative devices to secure circuits can be considered as a one of a kind demonstration, highlighting the benefits of cross-layer optimization.