Growth of nickel silicides in Si and Si/SiOx core/shell nanowires

Real-Time TEM Observation of the Role of Defects on Nickel Silicide Propagation in Silicon Nanowires

Metal silicides have received significant attention due to their high process compatibility, low resistivity, and structural stability. In nanowire (NW) form, they have been widely prepared using metal diffusion into preformed Si NWs, enabling compositionally controlled high-quality metal silicide nanostructures. However, unlocking the full potential of metal silicide NWs for next-generation nanodevices requires an increased level of mechanistic understanding of this diffusion-driven transformation. Herein, using in situ transmission electron microscopy (TEM), we investigated the defect-controlled silicide formation dynamics in one-dimensional NWs. A solution-based synthetic route was developed to form Si NWs anchored to Ni NW stems as an optimal platform for in situ TEM studies of metal silicide formation. Multiple in situ annealing experiments led to Ni diffusion from the Ni NW stem into the Si NW, forming a nickel silicide. We observed the dynamics of Ni propagation in straight and kinked Si NWs, with some regions of the NWs acting as Ni sinks. In NWs with high defect distribution, we obtained direct evidence of nonuniform Ni diffusion and silicide retardation. The findings of this study provide insights into metal diffusion and silicide formation in complex NW structures, which are crucial from fundamental and application perspectives.

Functional Devices from Bottom-Up Silicon Nanowires: A Review

This paper summarizes some of the essential aspects for the fabrication of functional devices from bottom-up silicon nanowires. In a first part, the different ways of exploiting nanowires in functional devices, from single nanowires to large assemblies of nanowires such as nanonets (two-dimensional arrays of randomly oriented nanowires), are briefly reviewed. Subsequently, the main properties of nanowires are discussed followed by those of nanonets that benefit from the large numbers of nanowires involved. After describing the main techniques used for the growth of nanowires, in the context of functional device fabrication, the different techniques used for nanowire manipulation are largely presented as they constitute one of the first fundamental steps that allows the nanowire positioning necessary to start the integration process. The advantages and disadvantages of each of these manipulation techniques are discussed. Then, the main families of nanowire-based transistors are presented; their most common integration routes and the electrical performance of the resulting devices are also presented and compared in order to highlight the relevance of these different geometries. Because they can be bottlenecks, the key technological elements necessary for the integration of silicon nanowires are detailed: the sintering technique, the importance of surface and interface engineering, and the key role of silicidation for good device performance. Finally the main application areas for these silicon nanowire devices are reviewed.

Designable Integration of Silicide Nanowire Springs as Ultra-Compact and Stretchable Electronic Interconnections

Stretchable electronics are finding widespread applications in bio-sensing, skin-mimetic electronics, and flexible displays, where high-density integration of elastic and durable interconnections is a key capability. Instead of forming a randomly crossed nanowire (NW) network, here, a large-scale and precise integration of highly conductive nickel silicide nanospring (SiNi_x -NS) arrays are demonstrated, which are fabricated out of an in-plane solid-liquid-solid guided growth of planar Si nanowires (SiNWs), and subsequent alloy-forming process that boosts the channel conductivity over 4 orders of magnitude (to 2 × 10⁴ S cm^-1 ). Thanks to the narrow diameter of the serpentine SiNi_x -NS channels, the elastic geometry engineering can be accomplished within a very short interconnection distance (down to ≈3 µm), which is crucial for integrating high-density displays or logic units in a rigid-island and elastic-interconnection configuration. Deployed over soft polydimethylsiloxane thin film substrate, the SiNi_x -NS array demonstrates an excellent stretchability that can sustain up to 50% stretching and for 10 000 cycles (at 15%). This approach paves the way to integrate high-density inorganic electronics and interconnections for high-performance health monitoring, displays, and on-skin electronic applications, based on the mature and rather reliable Si thin film technology.

Controlled Silicidation of Silicon Nanowires Using Flash Lamp Annealing

Among other new device concepts, nickel silicide (NiSi_x)-based Schottky barrier nanowire transistors are projected to supplement down-scaling of the complementary metal-oxide semiconductor (CMOS) technology as its physical limits are reached. Control over the NiSi_x phase and its intrusions into the nanowire is essential for superior performance and down-scaling of these devices. Several works have shown control over the phase, but control over the intrusion lengths has remained a challenge. To overcome this, we report a novel millisecond-range flash lamp annealing (FLA)-based silicidation process. Nanowires are fabricated on silicon-on-insulator substrates using a top-down approach. Subsequently, Ni silicidation experiments are carried out using FLA. It is demonstrated that this silicidation process gives unprecedented control over the silicide intrusions. Scanning electron microscopy and high-resolution transmission electron microscopy are performed for structural characterization of the silicide. FLA temperatures are estimated with the help of simulations.

Process Variability in Top-Down Fabrication of Silicon Nanowire-Based Biosensor Arrays

Silicon nanowire field-effect transistors (SiNW-FET) have been studied as ultra-high sensitive sensors for the detection of biomolecules, metal ions, gas molecules and as an interface for biological systems due to their remarkable electronic properties. "Bottom-up" or "top-down" approaches that are used for the fabrication of SiNW-FET sensors have their respective limitations in terms of technology development. The "bottom-up" approach allows the synthesis of silicon nanowires (SiNW) in the range from a few nm to hundreds of nm in diameter. However, it is technologically challenging to realize reproducible bottom-up devices on a large scale for clinical biosensing applications. The top-down approach involves state-of-the-art lithography and nanofabrication techniques to cast SiNW down to a few 10s of nanometers in diameter out of high-quality Silicon-on-Insulator (SOI) wafers in a controlled environment, enabling the large-scale fabrication of sensors for a myriad of applications. The possibility of their wafer-scale integration in standard semiconductor processes makes SiNW-FETs one of the most promising candidates for the next generation of biosensor platforms for applications in healthcare and medicine. Although advanced fabrication techniques are employed for fabricating SiNW, the sensor-to-sensor variation in the fabrication processes is one of the limiting factors for a large-scale production towards commercial applications. To provide a detailed overview of the technical aspects responsible for this sensor-to-sensor variation, we critically review and discuss the fundamental aspects that could lead to such a sensor-to-sensor variation, focusing on fabrication parameters and processes described in the state-of-the-art literature. Furthermore, we discuss the impact of functionalization aspects, surface modification, and system integration of the SiNW-FET biosensors on post-fabrication-induced sensor-to-sensor variations for biosensing experiments.

Towards Reconfigurable Electronics: Silicidation of Top-Down Fabricated Silicon Nanowires

We present results of our investigations on nickel silicidation of top-down fabricated silicon nanowires (SiNWs). Control over the silicidation process is important for the application of SiNWs in reconfigurable field-effect transistors. Silicidation is performed using a rapid thermal annealing process on the SiNWs fabricated by electron beam lithography and inductively-coupled plasma etching. The effects of variations in crystallographic orientations of SiNWs and different NW designs on the silicidation process are studied. Scanning electron microscopy and transmission electron microscopy are performed to study Ni diffusion, silicide phases, and silicide–silicon interfaces. Control over the silicide phase is achieved together with atomically sharp silicide–silicon interfaces. We find that {111} interfaces are predominantly formed, which are energetically most favorable according to density functional theory calculations. However, control over the silicide length remains a challenge.

Nanowire Electronics: From Nanoscale to Macroscale

Semiconductor nanowires have attracted extensive interest as one of the best-defined classes of nanoscale building blocks for the bottom-up assembly of functional electronic and optoelectronic devices over the past two decades. The article provides a comprehensive review of the continuing efforts in exploring semiconductor nanowires for the assembly of functional nanoscale electronics and macroelectronics. Specifically, we start with a brief overview of the synthetic control of various semiconductor nanowires and nanowire heterostructures with precisely controlled physical dimension, chemical composition, heterostructure interface, and electronic properties to define the material foundation for nanowire electronics. We then summarize a series of assembly strategies developed for creating well-ordered nanowire arrays with controlled spatial position, orientation, and density, which are essential for constructing increasingly complex electronic devices and circuits from synthetic semiconductor nanowires. Next, we review the fundamental electronic properties and various single nanowire transistor concepts. Combining the designable electronic properties and controllable assembly approaches, we then discuss a series of nanoscale devices and integrated circuits assembled from nanowire building blocks, as well as a unique design of solution-processable nanowire thin-film transistors for high-performance large-area flexible electronics. Last, we conclude with a brief perspective on the standing challenges and future opportunities.

Linear heterostructured Ni2Si/Si nanowires with abrupt interfaces synthesised in solution

Herein, we report a novel approach to form axial heterostructure nanowires composed of linearly distinct Ni silicide (Ni2Si) and Si segments via a one-pot solution synthesis method. Initially, Si nanowires are grown using Au seeds deposited on a Ni substrate with the Si delivery in the solution phase using a liquid phenylsilane precursor. Ni silicide then forms axially along the wires through progressive Ni diffusion from the growth substrate, with a distinct transition between the silicide and pure Si segments. The interfacial abruptness and chemical composition of the heterostructure nanowires was analysed through transmission electron microscopy, electron diffraction, energy dispersive X-ray spectroscopy, aberration corrected scanning transmission electron microscopy and atomically resolved electron energy loss spectroscopy. The method represents a versatile approach for the formation of complex axial NW heterostructures and could be extended to other metal silicide or analogous metal germanide systems.

CMOS-Compatible Silicon Nanowire Field-Effect Transistor Biosensor: Technology Development toward Commercialization

Owing to their two-dimensional confinements, silicon nanowires display remarkable optical, magnetic, and electronic properties. Of special interest has been the development of advanced biosensing approaches based on the field effect associated with silicon nanowires (SiNWs). Recent advancements in top-down fabrication technologies have paved the way to large scale production of high density and quality arrays of SiNW field effect transistor (FETs), a critical step towards their integration in real-life biosensing applications. A key requirement toward the fulfilment of SiNW FETs' promises in the bioanalytical field is their efficient integration within functional devices. Aiming to provide a comprehensive roadmap for the development of SiNW FET based sensing platforms, we critically review and discuss the key design and fabrication aspects relevant to their development and integration within complementary metal-oxide-semiconductor (CMOS) technology.

Controlled Formation of Radial Core-Shell Si/Metal Silicide Crystalline Heterostructures

The highly controlled formation of "radial" silicon/NiSi  core-shell nanowire heterostructures has been demonstrated for the first time. Here, we investigated the "radial" diffusion of nickel atoms into crystalline nanoscale silicon pillar 11 cores, followed by nickel silicide phase formation and the creation of a well-defined shell structure. The described approach is based on a two-step thermal process, which involves metal diffusion at low temperatures in the range of 200-400 °C, followed by a thermal curing step at a higher temperature of 400 °C. In-depth crystallographic analysis was performed by nanosectioning the resulting silicide-shelled silicon nanopillar heterostructures, giving us the ability to study in detail the newly formed silicide shells. Remarkably, it was observed that the resulting silicide shell thickness has a self-limiting behavior, and can be tightly controlled by the modulation of the initial diffusion-step temperature. In addition, electrical measurements of the core-shell structures revealed that the resulting shells can serve as an embedded conductive layer in future optoelectronic applications. This research provides a broad insight into the Ni silicide "radial" diffusion process at the nanoscale regime, and offers a simple approach to form thickness-controlled metal silicide shells in the range of 5-100 nm around semiconductor nanowire core structures, regardless the diameter of the nanowire cores. These high quality Si/NiSi core-shell nanowire structures will be applied in the near future as building blocks for the creation of utrathin highly conductive optically transparent top electrodes, over vertical nanopillars-based solar cell devices, which may subsequently lead to significant performance improvements of these devices in terms of charge collection and reduced recombination.

Selective Chemical Vapor Deposition Growth of Cubic FeGe Nanowires That Support Stabilized Magnetic Skyrmions

Magnetic skyrmions are topologically stable vortex-like spin structures that are promising for next generation information storage applications. Materials that host magnetic skyrmions, such as MnSi and FeGe with the noncentrosymmetric cubic B20 crystal structure, have been shown to stabilize skyrmions upon nanostructuring. Here, we report a chemical vapor deposition method to selectively grow nanowires (NWs) of cubic FeGe out of three possible FeGe polymorphs for the first time using finely ground particles of cubic FeGe as seeds. X-ray diffraction and transmission electron microscopy (TEM) confirm that these micron-length NWs with ∼100 nm to 1 μm diameters have the cubic B20 crystal structure. Although Fe₁₃Ge₈ NWs are also formed, the two types of NWs can be readily differentiated by their faceting. Lorentz TEM imaging of the cubic FeGe NWs reveals a skyrmion lattice phase under small applied magnetic fields (∼0.1 T) at 233 K, a skyrmion chain state at lower temperatures (95 K) and under high magnetic fields (∼0.4 T), and a larger skyrmion stability window than bulk FeGe. This synthetic approach to cubic FeGe NWs that support stabilized skyrmions opens a route toward the exploration of new skyrmion physics and devices based on similar nanostructures.

Effect of Elastic Strain Fluctuation on Atomic Layer Growth of Epitaxial Silicide in Si Nanowires by Point Contact Reactions

Effects of strain impact a range of applications involving mobility change in field-effect-transistors. We report the effect of strain fluctuation on epitaxial growth of NiSi2 in a Si nanowire via point contact and atomic layer reactions, and we discuss the thermodynamic, kinetic, and mechanical implications. The generation and relaxation of strain shown by in situ TEM is periodic and in synchronization with the atomic layer reaction. The Si lattice at the epitaxial interface is under tensile strain, which enables a high solubility of supersaturated interstitial Ni atoms for homogeneous nucleation of an epitaxial atomic layer of the disilicide phase. The tensile strain is reduced locally during the incubation period of nucleation by the dissolution of supersaturated Ni atoms in the Si lattice but the strained-Si state returns once the atomic layer epitaxial growth of NiSi2 occurs by consuming the supersaturated Ni.

Size and Orientation Effects on the Kinetics and Structure of Nickelide Contacts to InGaAs Fin Structures

The rapid development of ultrascaled III-V compound semiconductor devices urges the detailed investigation of metal-semiconductor contacts at nanoscale where crystal orientation, size, and structural phase play dominant roles in device performance. Here, we report the first study on the solid-state reaction between metal (Ni) and ternary III-V semiconductor (In0.53Ga0.47As) nanochannels to reveal the reaction kinetics, formed crystal structure, and interfacial properties. We observe a size-dependent Ni surface diffusion dominant kinetic process that gradually departs to a volume diffusion process as the Fin width increases, as properly depicted with our Fin-specific growth model. The interfacial relationship was found to be Ni4InGaAs2 (0001) ∥ In0.53Ga0.47As (111) with a single Ni4InGaAs2 phase whose [0001] axis exhibit a peculiar rotation away from the nickelide/InGaAs interface due to surface energy minimization. This crystalline interfacial relationship is responsible for introducing a uniaxial height expansion of 33% ± 5% in the formed nickelide segments. Further, the nickelide formation resulted in both in-plane and out-of-plane compressive strains in the Fin channels, significantly altering the In0.53Ga0.47As energy band-edge structure near the interface with a peak bandgap energy of ∼1.26 eV. These timely observations advance our understanding and development for self-aligned contacts to III-V nanochannels and for engineering new processes that can maximize their device performance.

Dynamic observation on the growth behaviors in manganese silicide/silicon nanowire heterostructures

Metal silicide nanowires (NWs) are very interesting materials with diverse physical properties. Among the silicides, manganese silicide nanostructures have attracted wide attention due to their several potential applications, including in microelectronics, optoelectronics, spintronics and thermoelectric devices. In this work, we exhibited the formation of pure manganese silicide and manganese silicide/silicon nanowire heterostructures through solid state reaction with line contacts between manganese pads and silicon NWs. Dynamical process and phase characterization were investigated by in situ transmission electron microscopy (in situ TEM) and spherical aberration corrected scanning transmission electron microscopy (Cs-corrected STEM), respectively. The growth dynamics of the manganese silicide phase under thermal effects were systematically studied. Additionally, Al2O3, serving as the surface oxide, altered the growth behavior of the MnSi nanowire, enhancing the silicide/Si epitaxial growth and effecting the diffusion process in the silicon nanowire as well. In addition to fundamental science, this significant study has great potential in advancing future processing techniques in nanotechnology and related applications.

Electrical charge-induced selective ion permeation in HfO2/porous nickel silicide hierarchical structures

HfO₂/porous nickel silicide (NiSi) hierarchical structures fabricated by metal-assisted chemical etching (MACE) followed by a silicidation process and deposition of HfO₂ by atomic layer deposition (ALD) have been demonstrated.

Kinetic manipulation of silicide phase formation in Si nanowire templates

The phase formation sequence of silicides in two-dimensional (2-D) structures has been well-investigated due to their significance in microelectronics. Applying high-quality silicides as contacts in nanoscale silicon (Si) devices has caught considerable attention recently for their potential in improving and introducing new functions in nanodevices. However, nucleation and diffusion mechanisms are found to be very different in one-dimensional (1-D) nanostructures, and thus the phase manipulation of silicides is yet to be achieved there. In this work, we report kinetic phase modulations to selectively enhance or hinder the growth rates of targeted nickel (Ni) silicides in a Si nanowire (NW) and demonstrate that Ni31Si12, δ-Ni2Si, θ-Ni2Si, NiSi, and NiSi2 can emerge as the first contacting phase at the silicide/Si interface through these modulations. First, the growth rates of silicides are selectively tuned through template structure modifications. It is demonstrated that the growth rate of diffusion limited phases can be enhanced in a porous Si NW due to a short diffusion path, which suppresses the formation of interface limited NiSi2. In addition, we show that a confining thick shell can be applied around the Si NW to hinder the growth of the silicides with large volume expansion during silicidation, including Ni31Si12, δ-Ni2Si, and θ-Ni2Si. Second, a platinum (Pt) interlayer between the Ni source and the Si NW is shown to effectively suppress the formation of the phases with low Pt solubility, including the dominating NiSi2. Lastly, we show that with the combined applications of the above-mentioned approaches, the lowest resistive NiSi phase can form as the first phase in a solid NW with a Pt interlayer to suppress NiSi2 and a thick shell to hinder Ni31Si12, δ-Ni2Si, and θ-Ni2Si simultaneously. The resistivity and maximum current density of NiSi agree reasonably to reported values.

Copper silicide/silicon nanowire heterostructures: in situ TEM observation of growth behaviors and electron transport properties

Copper silicide has been studied in the applications of electronic devices and catalysts. In this study, Cu3Si/Si nanowire heterostructures were fabricated through solid state reaction in an in situ transmission electron microscope (TEM). The dynamic diffusion of the copper atoms in the growth process and the formation mechanism are characterized. We found that two dimensional stacking faults (SF) may retard the growth of Cu3Si. Due to the evidence of the block of edge-nucleation (heterogeneous) by the surface oxide, center-nucleation (homogeneous) is suggested to dominate the silicidation. Furthermore, the electrical transport properties of various silicon channel length with Cu3Si/Si heterostructure interfaces and metallic Cu3Si NWs have been investigated. The observations not only provided an alternative pathway to explore the formation mechanisms and interface properties of Cu3Si/Si, but also suggested the potential application of Cu3Si at nanoscale for future processing in nanotechnology.

In Situ Real-Time TEM Reveals Growth, Transformation and Function in One-Dimensional Nanoscale Materials: From a Nanotechnology Perspective

This paper summarises recent developments in in situ TEM instrumentation and operation conditions. The focus of the discussion is on demonstrating how improved understanding of fundamental physical phenomena associated with nanowire or nanotube materials, revealed by following transformations in real time and high resolution, can assist the engineering of emerging electronic and optoelectronic devices. Special attention is given to Si, Ge, and compound semiconductor nanowires and carbon nanotubes (CNTs) as one of the most promising building blocks for devices inspired by nanotechnology.

Ultrashort channel silicon nanowire transistors with nickel silicide source/drain contacts

We demonstrate the shortest transistor channel length (17 nm) fabricated on a vapor-liquid-solid (VLS) grown silicon nanowire (NW) by a controlled reaction with Ni leads on an in situ transmission electron microscope (TEM) heating stage at a moderate temperature of 400 °C. NiSi(2) is the leading phase, and the silicide-silicon interface is an atomically sharp type-A interface. At such channel lengths, high maximum on-currents of 890 (μA/μm) and a maximum transconductance of 430 (μS/μm) were obtained, which pushes forward the performance of bottom-up Si NW Schottky barrier field-effect transistors (SB-FETs). Through accurate control over the silicidation reaction, we provide a systematic study of channel length dependent carrier transport in a large number of SB-FETs with channel lengths in the range of 17 nm to 3.6 μm. Our device results corroborate with our transport simulations and reveal a characteristic type of short channel effects in SB-FETs, both in on- and off-state, which is different from that in conventional MOSFETs, and that limits transport parameter extraction from SB-FETs using conventional field-effect transconductance measurements.

Crystallinity control of ferromagnetic contacts in stressed nanowire templates and the magnetic domain anisotropy

We report the controlled growth of single-crystalline ferromagnetic contacts through solid state reaction at nanoscale. Single-crystal Mn(5)Si(3) and Fe(5)Ge(3) contacts were grown within stressed Si and Ge nanowire templates, where oxide-shells were used to exert compressive stress on the silicide or germanide. Compared to polycrystalline silicide and germanide structures observed within bare nanowires, the built-in high strain in the oxide-shelled nanostructures alters the nucleation behavior of the ferromagnetic materials, leading to single crystal growth in the transverse/radial direction. Interestingly, the compressive stress is also found to affect the magnetic anisotropy of the ferromagnetic contacts. In-plane and out-of-plane magnetization were observed in Fe(5)Ge(3) for different crystal orientations, showing distinctly preferred domain orientations. These interesting results display the capability to control both the crystallinity and the magnetic anisotropy of ferromagnetic contacts in engineered nanostructures.

Kinetic competition model and size-dependent phase selection in 1-D nanostructures

The first phase selection and the phase formation sequence between metal and silicon (Si) couples are indispensably significant to microelectronics. With increasing scaling of device dimension to nano regime, established thermodynamic and kinetic models in bulk and thin film fail to apply in 1-D nanostructures. Herein, we present an unique size-dependent first phase formation sequence in 1-D nanostructures, with Ni-Si as the model system. Interfacial-limited phase which forms the last in thin film, NiSi(2), appears as the dominant first phase at 300-800 °C due to the elimination of continuous grain boundaries in 1-D silicides. On the other hand, θ-Ni(2)Si, the most competitive diffusion-limited phase takes over NiSi(2) and wins out as the first phase in small diameter nanowires at 800 °C. Kinetic parameters extracted from in situ transmission electron microscope studies and a modified kinetic growth competition model quantitatively explain this observation. An estimated critical diameter from the model agrees reasonably well with observations.

The growth and applications of silicides for nanoscale devices

Metal silicides have been used in silicon technology as contacts to achieve high device performance and desired device functions. The growth and applications of silicide materials have recently attracted increasing interest for nanoscale device applications. Nanoscale silicide materials have been demonstrated with various synthetic approaches. Solid state reaction wherein high quality silicides form through diffusion of metal atoms into silicon nano-templates and the subsequent phase transformation caught significant attention for the fabrication of nanoscale Si devices. Very interestingly, studies on the diffusion and phase transformation processes at the nanoscale have indicated possible deviations from the bulk and the thin film system. Here we present a review of fabrication, growth kinetics, electronic properties and device applications of nanoscale silicides formed through solid state reaction.

CoO/NiSi(x) core-shell nanowire arrays as lithium-ion anodes with high rate capabilities

This paper describes a facile chemical vapor deposition (CVD) and subsequent radio-frequency (RF)-sputtering approach for the synthesis of CoO/NiSi(x) core-shell nanowire (NW) arrays on Ni foams. The metallic core (i.e., NiSi(x)) with high conductivity acts as a nanostructured current collector. The as-synthesized CoO/NiSi(x) core-shell NW arrays have been applied as anode materials for lithium-ion batteries, which deliver high cycle life and enhanced power performance compared to planar CoO electrodes on Ni foams. The high surface-to-volume ratio and improved electronic/ionic conductivity of the nanostructured electrodes may be responsible for the improved performance.

Electrical contacts to one- and two-dimensional nanomaterials

Existing models of electrical contacts are often inapplicable at the nanoscale because there are significant differences between nanostructures and bulk materials arising from unique geometries and electrostatics. In this Review, we discuss the physics and materials science of electrical contacts to carbon nanotubes, semiconductor nanowires and graphene, and outline the main research and development challenges in the field. We also include a case study of gold contacts to germanium nanowires to illustrate these concepts.

Low resistivity metal silicide nanowires with extraordinarily high aspect ratio for future nanoelectronic devices

One crucial challenge for the integrated circuit devices to go beyond the current technology has been to find the appropriate contact and interconnect materials. NiSi has been commonly used in the 45 nm devices mainly because it possesses the lowest resistivity among all metal silicides. However, for devices of even smaller dimension, its stability at processing temperature is in doubt. In this paper, we show the growth of high-quality nanowires of NiSi(2), which is a thermodynamically stable phase and possesses low resistivity suitable for future generation electronics devices. The origin of low resistivity for the nanowires has been clarified to be due to its defect-free single-crystalline structure instead of surface and size effects.

Real-time observation of impurity diffusion in silicon nanowires

Solid-state diffusion of the transition metal impurities, gold (Au), nickel (Ni), and copper (Cu), in silicon (Si) nanowires was studied by in situ transmission electron microscopy. Compared to diffusion in a bulk crystal, Au diffusion is extremely slow when the amount of metal is limited but significantly enhanced when an unlimited supply is available. Cu and Ni diffusion leads to rapid silicide formation but slows considerably with physical encapsulation by a volume-restricting carbon shell.

Ni-silicide growth kinetics in Si and Si/SiO2 core/shell nanowires

A systematic study of the kinetics of axial Ni silicidation of as-grown and oxidized Si nanowires (SiNWs) with different crystallographic orientations and core diameters ranging from ∼ 10 to 100 nm is presented. For temperatures between 300 and 440 °C the length of the total axial silicide intrusion varies with the square root of time, which provides clear evidence that the rate limiting step is diffusion of Ni through the growing silicide phase(s). A retardation of Ni-silicide formation for oxidized SiNWs is found, indicative of a stress induced lowering of the diffusion coefficients. Extrapolated growth constants indicate that the Ni flux through the silicided NW is dominated by surface diffusion, which is consistent with an inverse square root dependence of the silicide length on the NW diameter as observed for (111) orientated SiNWs. In situ TEM silicidation experiments show that NiSi(2) is the first forming phase for as-grown and oxidized SiNWs. The silicide-SiNW interface is thereby atomically abrupt and typically planar. Ni-rich silicide phases subsequently nucleate close to the Ni reservoir, which for as-grown SiNWs can lead to a complete channel break-off for prolonged silicidation due to significant volume expansion and morphological changes.

Oxide-confined formation of germanium nanowire heterostructures for high-performance transistors

Over the past several years, the formation of nanowire heterostructures via a solid-state reaction between a semiconductor nanowire and metal contact pads has attracted great interest. This is owing to its ready application in nanowire field-effect transistors (FETs) with a well-controlled channel length using a facile rapid thermal annealing process. We report the effect of oxide confinement on the formation of Ge nanowire heterostructures via a controlled reaction between a vapor-liquid-solid-grown, single-crystalline Ge nanowire and Ni pads. In contrast to the previous formation of Ni(2)Ge/Ge/Ni(2)Ge nanowire heterostructures, a segment of high-quality epitaxial NiGe was formed between Ni(2)Ge and Ge with the confinement of Al(2)O(3) during annealing. Significantly, back-gate FETs based on this Ni(2)Ge/NiGe/Ge/NiGe/Ni(2)Ge heterostructure demonstrated a high-performance p-type transistor behavior, showing a large on/off ratio of more than 10(5) and a high normalized transconductance of 2.4 μS/μm. The field-effect hole mobility was extracted to be 210 cm(2)/(V s). Temperature-dependent I-V measurements further confirmed that NiGe has an ideal ohmic contact to p-type Ge with a small Schottky barrier height of 0.11 eV. Moreover, the hysteresis during gate bias sweeping was significantly reduced after Al(2)O(3) passivation, and our Ω-gate Ge nanowire FETs using Al(2)O(3) as the top-gate dielectric showed an enhanced subthreshold swing and transconductance. Therefore, we conclude that the Al(2)O(3) layer can effectively passivate the Ge surface and also serve as a good gate dielectric in Ge top-gate FETs. Our innovative approach provides another freedom to control the growth of nanowire heterostructure and to further achieve high-performance nanowire transistors.

The influence of surface oxide on the growth of metal/semiconductor nanowires

We report the critical effects of oxide on the growth of nanostructures through silicide formation. Under an in situ ultrahigh vacuum transmission electron microscope, it is observed from the conversion of Si nanowires into the metallic PtSi grains epitaxially through controlled reactions between lithographically defined Pt pads and Si nanowires. With oxide, instead of contact area, single crystal PtSi grains start forming either near the center between two adjacent pads or from the ends of Si nanowires, resulting in the heterostructure formation of Si/PtSi/Si. Without oxide, transformation from Si into PtSi begins at the contact area between them, resulting in the heterostructure formation of PtSi/Si/PtSi. The nanowire heterostructures have an atomically sharp interface with epitaxial relationships of Si(20-2)//PtSi(10-1) and Si[111]//PtSi[111]. Additionally, it has been observed that the existence of oxide significantly affects not only the growth position but also the growth behavior and the growth rate by two orders of magnitude. Molecular dynamics simulations have been performed to support our experimental results and the proposed growth mechanisms. In addition to fundamental science, the significance of the study matters for future processing techniques in nanotechnology and related applications as well.

Spontaneous growth and phase transformation of highly conductive nickel germanide nanowires

We report the synthesis, phase transformation, and electrical property measurement of single-crystal NiGe and ε-Ni(5)Ge(3) nanowires (NWs). NiGe NWs were spontaneously synthesized by chemical vapor deposition of GeH(4) onto a porous Ni substrate without the use of intentional catalysts. The as-grown NWs of the orthorhombic NiGe phase were transformed to the hexagonal ε-Ni(5)Ge(3) phase by thermal annealing induced Ni enrichment. This controllable conversion of germanide phases is desirable for phase-dependent property study and applications, and the observation of novel metastable ε-Ni(5)Ge(3) phase suggests the importance of kinetic factors in such nanophase transformations. Electrical studies reveal that NiGe NWs are highly conductive, with an average resistivity of 35 ± 15 μΩ·cm, while the resistivity of ε-Ni(5)Ge(3) NWs is more than 4 times that of the NiGe phase. NWs of nickel germanides, particularly NiGe, would be useful building blocks for germanium-based nanoelectronic devices.

An ordered Si nanowire with NiSi2 tip arrays as excellent field emitters

A method was developed to grow ordered silicon nanowire with NiSi(2) tip arrays by reacting nickel thin films on silica-coated ordered Si nanowire (NW) arrays. The coating of thin silica shell on Si NW arrays has the effect of limiting the diffusion of nickel during the silicidation process to achieve the single crystalline NiSi(2) NWs. In the meantime, it relieves the distortion of the NWs caused by the strain associated with formation of NiSi(2) to maintain the straightness of the nanowire and the ordering of the arrays. Other nickel silicide phases such as Ni(2)Si and NiSi were obtained if the silicidation processes were conducted on the ordered Si NWs without a thin silica shell. Excellent field emission properties were found for NiSi(2)/Si NW arrays with a turn on field of 0.82 V µm(-1) and a threshold field of 1.39 V µm(-1). The field enhancement factor was calculated to be about 2440. The stability test showed a fluctuation of about 7% with an applied field of 2.6 V µm(-1) for a period of 24 h. The excellent field emission characteristics are attributed to the well-aligned and highly ordered arrangement of the single crystalline NiSi(2)/Si heterostructure field emitters. In contrast to other growth methods, the present growth of ordered nickel silicide/Si NWs on silicon is compatible with silicon nanoelectronics device processes, and also provides a facile route to grow other well-aligned metal silicide NW arrays. The advantages will facilitate its applications as field emission devices.