|
1
|
Brugnolotto E, Aleksandrov P, Sousa M, Georgiev V. Machine Learning Inspired Nanowire Classification Method based on Nanowire Array Scanning Electron Microscope Images. OPEN RESEARCH EUROPE 2024; 4:43. [PMID: 38957297 PMCID: PMC11217720 DOI: 10.12688/openreseurope.16696.2] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Figures] [Subscribe] [Scholar Register] [Accepted: 06/24/2024] [Indexed: 07/04/2024]
Abstract
Background This article introduces an innovative classification methodology to identify nanowires within scanning electron microscope images. Methods Our approach employs advanced image manipulation techniques in conjunction with machine learning-based recognition algorithms. The effectiveness of our proposed method is demonstrated through its application to the categorization of scanning electron microscopy images depicting nanowires arrays. Results The method's capability to isolate and distinguish individual nanowires within an array is the primary factor in the observed accuracy. The foundational data set for model training comprises scanning electron microscopy images featuring 240 III-V nanowire arrays grown with metal organic chemical vapor deposition on silicon substrates. Each of these arrays consists of 66 nanowires. The results underscore the model's proficiency in discerning distinct wire configurations and detecting parasitic crystals. Our approach yields an average F1 score of 0.91, indicating high precision and recall. Conclusions Such a high level of performance and accuracy of ML methods demonstrate the viability of our technique not only for academic but also for practical commercial implementation and usage.
Collapse
Affiliation(s)
- Enrico Brugnolotto
- James Watt School of Engineering, University of Glasgow, Glasgow, Scotland, UK
- IBM Research Europe - Zurich, Rüschlikon, Säumerstrasse 4, 8803, Switzerland
| | - Preslav Aleksandrov
- James Watt School of Engineering, University of Glasgow, Glasgow, Scotland, UK
| | - Marilyne Sousa
- IBM Research Europe - Zurich, Rüschlikon, Säumerstrasse 4, 8803, Switzerland
| | - Vihar Georgiev
- James Watt School of Engineering, University of Glasgow, Glasgow, Scotland, UK
| |
Collapse
|
|
2
|
Radamson HH, Miao Y, Zhou Z, Wu Z, Kong Z, Gao J, Yang H, Ren Y, Zhang Y, Shi J, Xiang J, Cui H, Lu B, Li J, Liu J, Lin H, Xu H, Li M, Cao J, He C, Duan X, Zhao X, Su J, Du Y, Yu J, Wu Y, Jiang M, Liang D, Li B, Dong Y, Wang G. CMOS Scaling for the 5 nm Node and Beyond: Device, Process and Technology. NANOMATERIALS (BASEL, SWITZERLAND) 2024; 14:837. [PMID: 38786792 PMCID: PMC11123950 DOI: 10.3390/nano14100837] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Grants] [Track Full Text] [Subscribe] [Scholar Register] [Received: 03/19/2024] [Revised: 04/24/2024] [Accepted: 04/29/2024] [Indexed: 05/25/2024]
Abstract
After more than five decades, Moore's Law for transistors is approaching the end of the international technology roadmap of semiconductors (ITRS). The fate of complementary metal oxide semiconductor (CMOS) architecture has become increasingly unknown. In this era, 3D transistors in the form of gate-all-around (GAA) transistors are being considered as an excellent solution to scaling down beyond the 5 nm technology node, which solves the difficulties of carrier transport in the channel region which are mainly rooted in short channel effects (SCEs). In parallel to Moore, during the last two decades, transistors with a fully depleted SOI (FDSOI) design have also been processed for low-power electronics. Among all the possible designs, there are also tunneling field-effect transistors (TFETs), which offer very low power consumption and decent electrical characteristics. This review article presents new transistor designs, along with the integration of electronics and photonics, simulation methods, and continuation of CMOS process technology to the 5 nm technology node and beyond. The content highlights the innovative methods, challenges, and difficulties in device processing and design, as well as how to apply suitable metrology techniques as a tool to find out the imperfections and lattice distortions, strain status, and composition in the device structures.
Collapse
Affiliation(s)
- Henry H. Radamson
- Research and Development Center of Optoelectronic Hybrid IC, Guangdong Greater Bay Area Institute of Integrated Circuit and System, Guangzhou 510535, China; (Z.Z.); (Y.R.); (H.L.); (J.C.); (C.H.); (X.D.); (Y.W.); (B.L.)
| | - Yuanhao Miao
- Research and Development Center of Optoelectronic Hybrid IC, Guangdong Greater Bay Area Institute of Integrated Circuit and System, Guangzhou 510535, China; (Z.Z.); (Y.R.); (H.L.); (J.C.); (C.H.); (X.D.); (Y.W.); (B.L.)
| | - Ziwei Zhou
- Research and Development Center of Optoelectronic Hybrid IC, Guangdong Greater Bay Area Institute of Integrated Circuit and System, Guangzhou 510535, China; (Z.Z.); (Y.R.); (H.L.); (J.C.); (C.H.); (X.D.); (Y.W.); (B.L.)
| | - Zhenhua Wu
- Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China; (Z.W.); (Z.K.); (J.G.); (H.Y.); (Y.Z.); (J.L.); (J.L.); (M.L.); (X.Z.); (J.S.); (Y.D.); (J.Y.); (Y.D.)
| | - Zhenzhen Kong
- Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China; (Z.W.); (Z.K.); (J.G.); (H.Y.); (Y.Z.); (J.L.); (J.L.); (M.L.); (X.Z.); (J.S.); (Y.D.); (J.Y.); (Y.D.)
| | - Jianfeng Gao
- Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China; (Z.W.); (Z.K.); (J.G.); (H.Y.); (Y.Z.); (J.L.); (J.L.); (M.L.); (X.Z.); (J.S.); (Y.D.); (J.Y.); (Y.D.)
| | - Hong Yang
- Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China; (Z.W.); (Z.K.); (J.G.); (H.Y.); (Y.Z.); (J.L.); (J.L.); (M.L.); (X.Z.); (J.S.); (Y.D.); (J.Y.); (Y.D.)
| | - Yuhui Ren
- Research and Development Center of Optoelectronic Hybrid IC, Guangdong Greater Bay Area Institute of Integrated Circuit and System, Guangzhou 510535, China; (Z.Z.); (Y.R.); (H.L.); (J.C.); (C.H.); (X.D.); (Y.W.); (B.L.)
| | - Yongkui Zhang
- Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China; (Z.W.); (Z.K.); (J.G.); (H.Y.); (Y.Z.); (J.L.); (J.L.); (M.L.); (X.Z.); (J.S.); (Y.D.); (J.Y.); (Y.D.)
| | - Jiangliu Shi
- Beijing Superstring Academy of Memory Technology, Beijing 100176, China; (J.S.); (J.X.); (M.J.); (D.L.)
| | - Jinjuan Xiang
- Beijing Superstring Academy of Memory Technology, Beijing 100176, China; (J.S.); (J.X.); (M.J.); (D.L.)
| | - Hushan Cui
- Jiangsu Leuven Instruments Co., Ltd., Xuzhou 221300, China;
| | - Bin Lu
- School of Physics and Information Engineering, Shanxi Normal University, Linfen 041004, China;
| | - Junjie Li
- Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China; (Z.W.); (Z.K.); (J.G.); (H.Y.); (Y.Z.); (J.L.); (J.L.); (M.L.); (X.Z.); (J.S.); (Y.D.); (J.Y.); (Y.D.)
| | - Jinbiao Liu
- Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China; (Z.W.); (Z.K.); (J.G.); (H.Y.); (Y.Z.); (J.L.); (J.L.); (M.L.); (X.Z.); (J.S.); (Y.D.); (J.Y.); (Y.D.)
| | - Hongxiao Lin
- Research and Development Center of Optoelectronic Hybrid IC, Guangdong Greater Bay Area Institute of Integrated Circuit and System, Guangzhou 510535, China; (Z.Z.); (Y.R.); (H.L.); (J.C.); (C.H.); (X.D.); (Y.W.); (B.L.)
| | - Haoqing Xu
- Institute of Microelectronics, University of Chinese Academy of Sciences, Beijing 100049, China;
| | - Mengfan Li
- Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China; (Z.W.); (Z.K.); (J.G.); (H.Y.); (Y.Z.); (J.L.); (J.L.); (M.L.); (X.Z.); (J.S.); (Y.D.); (J.Y.); (Y.D.)
- Institute of Microelectronics, University of Chinese Academy of Sciences, Beijing 100049, China;
| | - Jiaji Cao
- Research and Development Center of Optoelectronic Hybrid IC, Guangdong Greater Bay Area Institute of Integrated Circuit and System, Guangzhou 510535, China; (Z.Z.); (Y.R.); (H.L.); (J.C.); (C.H.); (X.D.); (Y.W.); (B.L.)
| | - Chuangqi He
- Research and Development Center of Optoelectronic Hybrid IC, Guangdong Greater Bay Area Institute of Integrated Circuit and System, Guangzhou 510535, China; (Z.Z.); (Y.R.); (H.L.); (J.C.); (C.H.); (X.D.); (Y.W.); (B.L.)
| | - Xiangyan Duan
- Research and Development Center of Optoelectronic Hybrid IC, Guangdong Greater Bay Area Institute of Integrated Circuit and System, Guangzhou 510535, China; (Z.Z.); (Y.R.); (H.L.); (J.C.); (C.H.); (X.D.); (Y.W.); (B.L.)
| | - Xuewei Zhao
- Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China; (Z.W.); (Z.K.); (J.G.); (H.Y.); (Y.Z.); (J.L.); (J.L.); (M.L.); (X.Z.); (J.S.); (Y.D.); (J.Y.); (Y.D.)
- Institute of Microelectronics, University of Chinese Academy of Sciences, Beijing 100049, China;
| | - Jiale Su
- Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China; (Z.W.); (Z.K.); (J.G.); (H.Y.); (Y.Z.); (J.L.); (J.L.); (M.L.); (X.Z.); (J.S.); (Y.D.); (J.Y.); (Y.D.)
| | - Yong Du
- Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China; (Z.W.); (Z.K.); (J.G.); (H.Y.); (Y.Z.); (J.L.); (J.L.); (M.L.); (X.Z.); (J.S.); (Y.D.); (J.Y.); (Y.D.)
| | - Jiahan Yu
- Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China; (Z.W.); (Z.K.); (J.G.); (H.Y.); (Y.Z.); (J.L.); (J.L.); (M.L.); (X.Z.); (J.S.); (Y.D.); (J.Y.); (Y.D.)
| | - Yuanyuan Wu
- Research and Development Center of Optoelectronic Hybrid IC, Guangdong Greater Bay Area Institute of Integrated Circuit and System, Guangzhou 510535, China; (Z.Z.); (Y.R.); (H.L.); (J.C.); (C.H.); (X.D.); (Y.W.); (B.L.)
| | - Miao Jiang
- Beijing Superstring Academy of Memory Technology, Beijing 100176, China; (J.S.); (J.X.); (M.J.); (D.L.)
| | - Di Liang
- Beijing Superstring Academy of Memory Technology, Beijing 100176, China; (J.S.); (J.X.); (M.J.); (D.L.)
| | - Ben Li
- Research and Development Center of Optoelectronic Hybrid IC, Guangdong Greater Bay Area Institute of Integrated Circuit and System, Guangzhou 510535, China; (Z.Z.); (Y.R.); (H.L.); (J.C.); (C.H.); (X.D.); (Y.W.); (B.L.)
| | - Yan Dong
- Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China; (Z.W.); (Z.K.); (J.G.); (H.Y.); (Y.Z.); (J.L.); (J.L.); (M.L.); (X.Z.); (J.S.); (Y.D.); (J.Y.); (Y.D.)
| | - Guilei Wang
- Beijing Superstring Academy of Memory Technology, Beijing 100176, China; (J.S.); (J.X.); (M.J.); (D.L.)
- Hefei National Laboratory, University of Science and Technology of China, Hefei 230088, China
| |
Collapse
|
|
3
|
Scherrer M, Lee CW, Schmid H, Moselund KE. Single-Mode Laser in the Telecom Range by Deterministic Amplification of the Topological Interface Mode. ACS PHOTONICS 2024; 11:1006-1011. [PMID: 38523747 PMCID: PMC10958602 DOI: 10.1021/acsphotonics.3c01372] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Grants] [Track Full Text] [Figures] [Subscribe] [Scholar Register] [Received: 09/25/2023] [Revised: 01/29/2024] [Accepted: 01/29/2024] [Indexed: 03/26/2024]
Abstract
Photonic integrated circuits are paving the way for novel on-chip functionalities with diverse applications in communication, computing, and beyond. The integration of on-chip light sources, especially single-mode lasers, is crucial for advancing those photonic chips to their full potential. Recently, novel concepts involving topological designs introduced a variety of options for tuning device properties, such as the desired single-mode emission. Here, we introduce a novel cavity design that allows amplification of the topological interface mode by deterministic placement of gain material within a topological lattice. The proposed design is experimentally implemented by a selective epitaxy process to achieve closely spaced Si and InGaAs nanorods embedded within the same layer. This results in the first demonstration of a single-mode laser in the telecom band using the concept of amplified topological modes without introducing artificial losses.
Collapse
Affiliation(s)
- Markus Scherrer
- Science
of Quantum and Information Technology, IBM
Research Europe-Zurich, 8803 Rüschlikon, Switzerland
| | - Chang-Won Lee
- Institute
of Advanced Optics and Photonics, Hanbat
National University, 34158 Daejeon, South
Korea
| | - Heinz Schmid
- Science
of Quantum and Information Technology, IBM
Research Europe-Zurich, 8803 Rüschlikon, Switzerland
| | - Kirsten E. Moselund
- Laboratory
of Nano and Quantum Technologies (LNQ), Paul Scherrer Institut (PSI), 5232 Villigen, Switzerland
- Integrated
Nanoscale Photonics and Optoelectronics Laboratory (INPhO), Ecole Polytechnique Fédérale de Lausanne
(EPFL), 1015 Lausanne, Switzerland
| |
Collapse
|
|
4
|
Gao R, He X, Chen C, Bao X, Yang F, Yang X, He J, Dong C, Li C, Chen S, Liang G, Jiang S, Tang J, Zhang G, Li K. (Bi,Sb) 2 Se 3 Alloy Thin Film for Short-Wavelength Infrared Photodetector and TFT Monolithic-Integrated Matrix Imaging. SMALL (WEINHEIM AN DER BERGSTRASSE, GERMANY) 2024; 20:e2308070. [PMID: 37849040 DOI: 10.1002/smll.202308070] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Grants] [Track Full Text] [Subscribe] [Scholar Register] [Received: 09/19/2023] [Revised: 10/07/2023] [Indexed: 10/19/2023]
Abstract
Short-wavelength infrared photodetectors play a significant role in various fields such as autonomous driving, military security, and biological medicine. However, state-of-the-art short-wavelength infrared photodetectors, such as InGaAs, require high-temperature fabrication and heterogenous integration with complementary metal-oxide-semiconductor (CMOS) readout circuits (ROIC), resulting in a high cost and low imaging resolution. Herein, for the first time, a low-cost, high-performance, high-stable, and thin-film transistor (TFT) ROIC monolithic-integrated (Bi,Sb)2 Se3 alloy thin-film short-wavelength infrared photodetector is reported. The (Bi,Sb)2 Se3 alloy thin-film short-wavelength infrared photodetectors demonstrate a high external quantum efficiency (EQE) of 21.1% (light intensity of 0.76 µW cm-2 ) and a fast response time (3.24 µs). The highest EQE is about two magnitudes than that of the extrinsic photoconduction of Sb2 Se3 (0.051%). In addition, the unpackaged devices demonstrate high electric and thermal stability (almost no attenuation at 120 °C for 312 h), showing potential for in-vehicle applications that may experient such a high temperature. Finally, both the (Bi,Sb)2 Se3 alloy thin film and n-type CdSe buffer layer are directly deposited on the TFT ROIC (with a 64 × 64-pixel array) with a low-temperature process and the material identification and imaging applications are presented. This work is a significant breakthrough in ROIC monolithic-integrated short-wavelength infrared imaging chips.
Collapse
Affiliation(s)
- Ruisi Gao
- School of Integrated Circuits, Engineering Research Center for Functional Ceramics MOE, Wuhan National Laboratory for Optoelectronics (WNLO), School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan, Hubei, 430074, P. R. China
| | - Xin He
- Key Laboratory of Optoelectronic Chemical Materials and Devices of Ministry of Education, Jianghan University, Wuhan, 430056, P. R. China
| | - Chao Chen
- School of Integrated Circuits, Engineering Research Center for Functional Ceramics MOE, Wuhan National Laboratory for Optoelectronics (WNLO), School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan, Hubei, 430074, P. R. China
| | - Xiaoqing Bao
- School of Integrated Circuits, Engineering Research Center for Functional Ceramics MOE, Wuhan National Laboratory for Optoelectronics (WNLO), School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan, Hubei, 430074, P. R. China
| | - Feifan Yang
- School of Integrated Circuits, Engineering Research Center for Functional Ceramics MOE, Wuhan National Laboratory for Optoelectronics (WNLO), School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan, Hubei, 430074, P. R. China
| | - Xuke Yang
- School of Integrated Circuits, Engineering Research Center for Functional Ceramics MOE, Wuhan National Laboratory for Optoelectronics (WNLO), School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan, Hubei, 430074, P. R. China
| | - Jungang He
- Hubei Key Laboratory of Plasma Chemistry and Advanced Materials, Hubei Engineering Technology Research Center of Optoelectronic and New Energy Materials, School of Materials Science and Engineering, Wuhan Institute of Technology, Wuhan, 430205, P. R. China
| | - Chong Dong
- School of Integrated Circuits, Engineering Research Center for Functional Ceramics MOE, Wuhan National Laboratory for Optoelectronics (WNLO), School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan, Hubei, 430074, P. R. China
| | - Chuanhao Li
- Shenzhen Key Laboratory of Advanced Thin Films and Applications, Key Laboratory of Optoelectronic Devices and Systems of Ministry of Education and Guangdong Province, College of Physics and Optoelectronic Engineering, Shenzhen University, Shenzhen, Guangdong, 518060, P. R. China
| | - Shuo Chen
- Shenzhen Key Laboratory of Advanced Thin Films and Applications, Key Laboratory of Optoelectronic Devices and Systems of Ministry of Education and Guangdong Province, College of Physics and Optoelectronic Engineering, Shenzhen University, Shenzhen, Guangdong, 518060, P. R. China
| | - Guangxing Liang
- Shenzhen Key Laboratory of Advanced Thin Films and Applications, Key Laboratory of Optoelectronic Devices and Systems of Ministry of Education and Guangdong Province, College of Physics and Optoelectronic Engineering, Shenzhen University, Shenzhen, Guangdong, 518060, P. R. China
| | - Shenglin Jiang
- School of Integrated Circuits, Engineering Research Center for Functional Ceramics MOE, Wuhan National Laboratory for Optoelectronics (WNLO), School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan, Hubei, 430074, P. R. China
| | - Jiang Tang
- School of Integrated Circuits, Engineering Research Center for Functional Ceramics MOE, Wuhan National Laboratory for Optoelectronics (WNLO), School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan, Hubei, 430074, P. R. China
| | - Guangzu Zhang
- School of Integrated Circuits, Engineering Research Center for Functional Ceramics MOE, Wuhan National Laboratory for Optoelectronics (WNLO), School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan, Hubei, 430074, P. R. China
| | - Kanghua Li
- School of Integrated Circuits, Engineering Research Center for Functional Ceramics MOE, Wuhan National Laboratory for Optoelectronics (WNLO), School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan, Hubei, 430074, P. R. China
| |
Collapse
|
|
5
|
Zhuang X, Sa Z, Zhang J, Wang M, Xu M, Liu F, Song K, He T, Chen F, Yang Z. An Amorphous Native Oxide Shell for High Bias-Stress Stability Nanowire Synaptic Transistor. ADVANCED SCIENCE (WEINHEIM, BADEN-WURTTEMBERG, GERMANY) 2023; 10:e2302516. [PMID: 37767942 PMCID: PMC10625101 DOI: 10.1002/advs.202302516] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Grants] [Track Full Text] [Subscribe] [Scholar Register] [Received: 04/20/2023] [Revised: 08/30/2023] [Indexed: 09/29/2023]
Abstract
The inhomogeneous native oxide shells on the surfaces of III-V group semiconductors typically yield inferior and unstable electrical properties metrics, challenging the development of next-generation integrated circuits. Herein, the native GaOx shells are profitably utilized by a simple in-situ thermal annealing process to achieve high-performance GaSb nanowires (NWs) field-effect-transistors (FETs) with excellent bias-stress stability and synaptic behaviors. By an optimal annealing time of 5 min, the as-constructed GaSb NW FET demonstrates excellent stability with a minimal shift of transfer curve (ΔVth ≈ 0.54 V) under a 60 min gate bias, which is far more stable than that of pristine GaSb NW FET (ΔVth ≈ 8.2 V). When the high bias-stress stability NW FET is used as the chargeable-dielectric free synaptic transistor, the typical synaptic behaviors, such as short-term plasticity, long-term plasticity, spike-time-dependent plasticity, and reliable learning stability are demonstrated successfully through the voltage tests. The mobile oxygen ion in the native GaOx shell strongly offsets the trapping states and leads to enhanced bias-stress stability and charge retention capability for synaptic behaviors. This work provides a new way of utilizing the native oxide shell to realize stable FET for chargeable-dielectric free neuromorphic computing systems.
Collapse
Affiliation(s)
- Xinming Zhuang
- School of PhysicsState Key Laboratory of Crystal MaterialsShandong UniversityJinan250100P. R. China
- School of MicroelectronicsShandong UniversityJinan250100P. R. China
| | - Zixu Sa
- School of PhysicsState Key Laboratory of Crystal MaterialsShandong UniversityJinan250100P. R. China
| | - Jie Zhang
- School of PhysicsState Key Laboratory of Crystal MaterialsShandong UniversityJinan250100P. R. China
| | - Mingxu Wang
- School of PhysicsState Key Laboratory of Crystal MaterialsShandong UniversityJinan250100P. R. China
| | - Mingsheng Xu
- School of PhysicsState Key Laboratory of Crystal MaterialsShandong UniversityJinan250100P. R. China
| | - Fengjing Liu
- School of PhysicsState Key Laboratory of Crystal MaterialsShandong UniversityJinan250100P. R. China
| | - Kepeng Song
- School of Chemistry and Chemical EngineeringShandong UniversityJinan250100P. R. China
| | - Tao He
- School of PhysicsState Key Laboratory of Crystal MaterialsShandong UniversityJinan250100P. R. China
| | - Feng Chen
- School of PhysicsState Key Laboratory of Crystal MaterialsShandong UniversityJinan250100P. R. China
| | - Zai‐xing Yang
- School of PhysicsState Key Laboratory of Crystal MaterialsShandong UniversityJinan250100P. R. China
| |
Collapse
|
|
6
|
Yan Z, Ratiu BP, Zhang W, Abouzaid O, Ebert M, Reed GT, Thomson DJ, Li Q. Lateral Tunnel Epitaxy of GaAs in Lithographically Defined Cavities on 220 nm Silicon-on-Insulator. CRYSTAL GROWTH & DESIGN 2023; 23:7821-7828. [PMID: 37937193 PMCID: PMC10626574 DOI: 10.1021/acs.cgd.3c00633] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Grants] [Track Full Text] [Figures] [Subscribe] [Scholar Register] [Received: 05/25/2023] [Revised: 09/24/2023] [Indexed: 11/09/2023]
Abstract
Current heterogeneous Si photonics usually bond III-V wafers/dies on a silicon-on-insulator (SOI) substrate in a back-end process, whereas monolithic integration by direct epitaxy could benefit from a front-end process where III-V materials are grown prior to the fabrication of passive optical circuits. Here we demonstrate a front-end-of-line (FEOL) processing and epitaxy approach on Si photonics 220 nm (001) SOI wafers to enable positioning dislocation-free GaAs layers in lithographically defined cavities right on top of the buried oxide layer. Thanks to the defect confinement in lateral growth, threading dislocations generated from the III-V/Si interface are effectively trapped within ∼250 nm of the Si surface. This demonstrates the potential of in-plane co-integration of III-Vs with Si on mainstream 220 nm SOI platform without relying on thick, defective buffer layers. The challenges associated with planar defects and coalescence into larger membranes for the integration of on-chip optical devices are also discussed.
Collapse
Affiliation(s)
- Zhao Yan
- School of
Physics and Astronomy, Cardiff University, Cardiff CF24 3AA, U.K.
| | | | - Weiwei Zhang
- Optoelectronics
Research Centre, University of Southampton, Southampton SO17 1BJ, U.K.
| | - Oumaima Abouzaid
- School of
Physics and Astronomy, Cardiff University, Cardiff CF24 3AA, U.K.
| | - Martin Ebert
- Optoelectronics
Research Centre, University of Southampton, Southampton SO17 1BJ, U.K.
| | - Graham T. Reed
- Optoelectronics
Research Centre, University of Southampton, Southampton SO17 1BJ, U.K.
| | - David J. Thomson
- Optoelectronics
Research Centre, University of Southampton, Southampton SO17 1BJ, U.K.
| | - Qiang Li
- School of
Physics and Astronomy, Cardiff University, Cardiff CF24 3AA, U.K.
| |
Collapse
|
|
7
|
Remis A, Monge-Bartolome L, Paparella M, Gilbert A, Boissier G, Grande M, Blake A, O'Faolain L, Cerutti L, Rodriguez JB, Tournié E. Unlocking the monolithic integration scenario: optical coupling between GaSb diode lasers epitaxially grown on patterned Si substrates and passive SiN waveguides. LIGHT, SCIENCE & APPLICATIONS 2023; 12:150. [PMID: 37328485 PMCID: PMC10276042 DOI: 10.1038/s41377-023-01185-4] [Citation(s) in RCA: 2] [Impact Index Per Article: 2.0] [Reference Citation Analysis] [Abstract] [Key Words] [Grants] [Track Full Text] [Subscribe] [Scholar Register] [Received: 11/25/2022] [Revised: 04/27/2023] [Accepted: 05/16/2023] [Indexed: 06/18/2023]
Abstract
Silicon (Si) photonics has recently emerged as a key enabling technology in many application fields thanks to the mature Si process technology, the large silicon wafer size, and promising Si optical properties. The monolithic integration by direct epitaxy of III-V lasers and Si photonic devices on the same Si substrate has been considered for decades as the main obstacle to the realization of dense photonics chips. Despite considerable progress in the last decade, only discrete III-V lasers grown on bare Si wafers have been reported, whatever the wavelength and laser technology. Here we demonstrate the first semiconductor laser grown on a patterned Si photonics platform with light coupled into a waveguide. A mid-IR GaSb-based diode laser was directly grown on a pre-patterned Si photonics wafer equipped with SiN waveguides clad by SiO2. Growth and device fabrication challenges, arising from the template architecture, were overcome to demonstrate more than 10 mW outpower of emitted light in continuous wave operation at room temperature. In addition, around 10% of the light was coupled into the SiN waveguides, in good agreement with theoretical calculations for this butt-coupling configuration. This work lift an important building block and it paves the way for future low-cost, large-scale, fully integrated photonic chips.
Collapse
Affiliation(s)
- Andres Remis
- IES, University of Montpellier, CNRS, F-34000, Montpellier, France
| | | | - Michele Paparella
- IES, University of Montpellier, CNRS, F-34000, Montpellier, France
- Department of Electrical and Information Engineering, Polytechnic University of Bari, 4 Via E. Orabona, IT- 70126, Bari, Italy
| | - Audrey Gilbert
- IES, University of Montpellier, CNRS, F-34000, Montpellier, France
| | - Guilhem Boissier
- IES, University of Montpellier, CNRS, F-34000, Montpellier, France
| | - Marco Grande
- Department of Electrical and Information Engineering, Polytechnic University of Bari, 4 Via E. Orabona, IT- 70126, Bari, Italy
| | - Alan Blake
- Tyndall National Institute, Lee Maltings Complex, Dyke Parade, IR-T12R5CP, Cork, Ireland
| | - Liam O'Faolain
- Tyndall National Institute, Lee Maltings Complex, Dyke Parade, IR-T12R5CP, Cork, Ireland
- Centre for Advanced Photonics and Process Analysis, Munster Technological University, Bishopstown, IR-T12P928, Cork, Ireland
| | - Laurent Cerutti
- IES, University of Montpellier, CNRS, F-34000, Montpellier, France
| | | | - Eric Tournié
- IES, University of Montpellier, CNRS, F-34000, Montpellier, France.
| |
Collapse
|
|
8
|
Valdez F, Mere V, Wang X, Mookherjea S. Integrated O- and C-band silicon-lithium niobate Mach-Zehnder modulators with 100 GHz bandwidth, low voltage, and low loss. OPTICS EXPRESS 2023; 31:5273-5289. [PMID: 36823812 DOI: 10.1364/oe.480519] [Citation(s) in RCA: 3] [Impact Index Per Article: 3.0] [Reference Citation Analysis] [Abstract] [Track Full Text] [Subscribe] [Scholar Register] [Received: 11/10/2022] [Accepted: 01/19/2023] [Indexed: 06/18/2023]
Abstract
Broadband integrated thin-film lithium niobate (TFLN) electro-optic modulators (EOM) are desirable for optical communications and signal processing in both the O-band (1310 nm) and C-band (1550 nm). To address these needs, we design and demonstrate Mach-Zehnder (MZ) EOM devices in a hybrid platform based on TFLN bonded to foundry-fabricated silicon photonic waveguides. Using a single silicon lithography step and a single bonding step, we realize MZ EOM devices which cover both wavelength ranges on the same chip. The EOM devices achieve 100 GHz EO bandwidth (referenced to 1 GHz) and about 2-3 V.cm figure-of-merit (V π L) with low on-chip optical loss in both the O-band and C-band.
Collapse
|
|
9
|
Nemoto K, Watanabe J, Yamada H, Sun HT, Shirahata N. Impact of coherent core/shell architecture on fast response in InP-based quantum dot photodiodes. NANOSCALE ADVANCES 2023; 5:907-915. [PMID: 36756505 PMCID: PMC9890971 DOI: 10.1039/d2na00734g] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Grants] [Track Full Text] [Download PDF] [Figures] [Subscribe] [Scholar Register] [Received: 10/21/2022] [Accepted: 12/18/2022] [Indexed: 06/18/2023]
Abstract
Solution-processed, cadmium-free quantum dot (QD) photodiodes are compatible with printable optoelectronics and are regarded as a potential candidate for wavelength-selective optical sensing. However, a slow response time resulting from low carrier mobility and a poor dissociation of charge carriers in the optically active layer has hampered the development of the QD photodiodes with nontoxic device constituents. Herein, we report the first InP-based photodiode with a multilayer device architecture, working in photovoltaic mode in photodiode circuits. The photodiode showed the fastest response speed with rising and falling times of τ r = 4 ms and τ f = 9 ms at a voltage bias of 0 V at room temperature in ambient air among the Cd-free photodiodes. The single-digit millisecond photo responses were realized by efficient transportation of the photogenerated carriers in the optically active layer resulting from coherent InP/ZnS core/shell QD structure, fast separation of electron and hole pairs at the interface between QD and Al-doped ZnO layers, and optimized conditions for uniform deposition of each thin film. The results suggested the versatility of coherent core/shell QDs as a photosensitive layer, whose structures allow various semiconductor combinations without lattice mismatch considerations, towards fast response, high on/off ratios, and spectrally tunable optical sensing.
Collapse
Affiliation(s)
- Kazuhiro Nemoto
- Graduate School of Chemical Sciences and Engineering, Hokkaido University Sapporo 060-0814 Japan
- International Center for Materials Nanoarchitectonics (MANA), National Institute for Materials Science (NIMS) 1-1 Namiki Tsukuba 305-0044 Japan
| | - Junpei Watanabe
- International Center for Materials Nanoarchitectonics (MANA), National Institute for Materials Science (NIMS) 1-1 Namiki Tsukuba 305-0044 Japan
- Department of Physics, Chuo University 1-13-27 Kasuga Bunkyo Tokyo 112-8551 Japan
| | - Hiroyuki Yamada
- Graduate School of Chemical Sciences and Engineering, Hokkaido University Sapporo 060-0814 Japan
- International Center for Materials Nanoarchitectonics (MANA), National Institute for Materials Science (NIMS) 1-1 Namiki Tsukuba 305-0044 Japan
| | - Hong-Tao Sun
- International Center for Materials Nanoarchitectonics (MANA), National Institute for Materials Science (NIMS) 1-1 Namiki Tsukuba 305-0044 Japan
| | - Naoto Shirahata
- Graduate School of Chemical Sciences and Engineering, Hokkaido University Sapporo 060-0814 Japan
- International Center for Materials Nanoarchitectonics (MANA), National Institute for Materials Science (NIMS) 1-1 Namiki Tsukuba 305-0044 Japan
- Department of Physics, Chuo University 1-13-27 Kasuga Bunkyo Tokyo 112-8551 Japan
| |
Collapse
|
|
10
|
Tiwari P, Fischer A, Scherrer M, Caimi D, Schmid H, Moselund KE. Single-Mode Emission in InP Microdisks on Si Using Au Antenna. ACS PHOTONICS 2022; 9:1218-1225. [PMID: 35480488 PMCID: PMC9026291 DOI: 10.1021/acsphotonics.1c01677] [Citation(s) in RCA: 0] [Impact Index Per Article: 0] [Reference Citation Analysis] [Abstract] [Key Words] [Grants] [Track Full Text] [Download PDF] [Figures] [Subscribe] [Scholar Register] [Received: 10/31/2021] [Indexed: 06/14/2023]
Abstract
An important building block for on-chip photonic applications is a scaled emitter. Whispering gallery mode cavities based on III-Vs on Si allow for small device footprints and lasing with low thresholds. However, multimodal emission and wavelength stability over a wider range of temperature can be challenging. Here, we explore the use of Au nanorod antennae on InP whispering gallery mode lasers on Si for single-mode emission. We show that by proper choice of the antenna size and positioning, we can suppress the side modes of a cavity and achieve single-mode emission over a wide excitation range. We establish emission trends by varying the size of the antenna and show that the far-field radiation pattern differs significantly for devices with and without antenna. Furthermore, the antenna-induced single-mode emission is dominant from room temperature (300 K) down to 200 K, whereas the cavity without an antenna is multimodal and its dominant emission wavelength is highly temperature-dependent.
Collapse
|