Brain-like associative learning using a nanoscale non-volatile phase change synaptic device array

Neuromorphic one-shot learning utilizing a phase-transition material

Design of hardware based on biological principles of neuronal computation and plasticity in the brain is a leading approach to realizing energy- and sample-efficient AI and learning machines. An important factor in selection of the hardware building blocks is the identification of candidate materials with physical properties suitable to emulate the large dynamic ranges and varied timescales of neuronal signaling. Previous work has shown that the all-or-none spiking behavior of neurons can be mimicked by threshold switches utilizing material phase transitions. Here, we demonstrate that devices based on a prototypical metal-insulator-transition material, vanadium dioxide (VO2), can be dynamically controlled to access a continuum of intermediate resistance states. Furthermore, the timescale of their intrinsic relaxation can be configured to match a range of biologically relevant timescales from milliseconds to seconds. We exploit these device properties to emulate three aspects of neuronal analog computation: fast (~1 ms) spiking in a neuronal soma compartment, slow (~100 ms) spiking in a dendritic compartment, and ultraslow (~1 s) biochemical signaling involved in temporal credit assignment for a recently discovered biological mechanism of one-shot learning. Simulations show that an artificial neural network using properties of VO2 devices to control an agent navigating a spatial environment can learn an efficient path to a reward in up to fourfold fewer trials than standard methods. The phase relaxations described in our study may be engineered in a variety of materials and can be controlled by thermal, electrical, or optical stimuli, suggesting further opportunities to emulate biological learning in neuromorphic hardware.

Recent advancements in implantable neural links based on organic synaptic transistors

The progress of brain synaptic devices has witnessed an era of rapid and explosive growth. Because of their integrated storage, excellent plasticity and parallel computing, and system information processing abilities, various field effect transistors have been used to replicate the synapses of a human brain. Organic semiconductors are characterized by simplicity of processing, mechanical flexibility, low cost, biocompatibility, and flexibility, making them the most promising materials for implanted brain synaptic bioelectronics. Despite being used in numerous intelligent integrated circuits and implantable neural linkages with multiple terminals, organic synaptic transistors still face many obstacles that must be overcome to advance their development. A comprehensive review would be an excellent tool in this respect. Therefore, the latest advancements in implantable neural links based on organic synaptic transistors are outlined. First, the distinction between conventional and synaptic transistors are highlighted. Next, the existing implanted organic synaptic transistors and their applicability to the brain as a neural link are summarized. Finally, the potential research directions are discussed.

Emerging memristive artificial neuron and synapse devices for the neuromorphic electronics era

Growth of data eases the way to access the world but requires increasing amounts of energy to store and process. Neuromorphic electronics has emerged in the last decade, inspired by biological neurons and synapses, with in-memory computing ability, extenuating the 'von Neumann bottleneck' between the memory and processor and offering a promising solution to reduce the efforts both in data storage and processing, thanks to their multi-bit non-volatility, biology-emulated characteristics, and silicon compatibility. This work reviews the recent advances in emerging memristive devices for artificial neuron and synapse applications, including memory and data-processing ability: the physics and characteristics are discussed first, i.e., valence changing, electrochemical metallization, phase changing, interfaced-controlling, charge-trapping, ferroelectric tunnelling, and spin-transfer torquing. Next, we propose a universal benchmark for the artificial synapse and neuron devices on spiking energy consumption, standby power consumption, and spike timing. Based on the benchmark, we address the challenges, suggest the guidelines for intra-device and inter-device design, and provide an outlook for the neuromorphic applications of resistive switching-based artificial neuron and synapse devices.

Carbon Nanodots Memristor: An Emerging Candidate toward Artificial Biosynapse and Human Sensory Perception System

In the era of big data and artificial intelligence (AI), advanced data storage and processing technologies are in urgent demand. The innovative neuromorphic algorithm and hardware based on memristor devices hold a promise to break the von Neumann bottleneck. In recent years, carbon nanodots (CDs) have emerged as a new class of nano-carbon materials, which have attracted widespread attention in the applications of chemical sensors, bioimaging, and memristors. The focus of this review is to summarize the main advances of CDs-based memristors, and their state-of-the-art applications in artificial synapses, neuromorphic computing, and human sensory perception systems. The first step is to systematically introduce the synthetic methods of CDs and their derivatives, providing instructive guidance to prepare high-quality CDs with desired properties. Then, the structure-property relationship and resistive switching mechanism of CDs-based memristors are discussed in depth. The current challenges and prospects of memristor-based artificial synapses and neuromorphic computing are also presented. Moreover, this review outlines some promising application scenarios of CDs-based memristors, including neuromorphic sensors and vision, low-energy quantum computation, and human-machine collaboration.

Synaptic Resistor Circuits Based on Al Oxide and Ti Silicide for Concurrent Learning and Signal Processing in Artificial Intelligence Systems

Neurobiological circuits containing synapses can process signals while learning concurrently in real time. Before an artificial neural network (ANN) can execute a signal-processing program, it must first be programmed by humans or trained with respect to a large and defined data set during learning processes, resulting in significant latency, high power consumption, and poor adaptability to unpredictable changing environments. In this work, a crossbar circuit of synaptic resistors (synstors) is reported, each synstor integrating a Si channel with an Al oxide memory layer and Ti silicide Schottky contacts. Individual synstors are characterized and analyzed to understand their concurrent signal-processing and learning abilities. Without any prior training, synstor circuits concurrently execute signal processing and learning in real time to fly drones toward a target position in an aerodynamically changing environment faster than human controllers, and with learning speed, performance, power consumption, and adaptability to the environment significantly superior to an ANN running on computers. The synstor circuit provides a path to establish power-efficient intelligent systems with real-time learning and adaptability in the capriciously mutable real world.

A self-adaptive hardware with resistive switching synapses for experience-based neurocomputing

Neurobiological systems continually interact with the surrounding environment to refine their behaviour toward the best possible reward. Achieving such learning by experience is one of the main challenges of artificial intelligence, but currently it is hindered by the lack of hardware capable of plastic adaptation. Here, we propose a bio-inspired recurrent neural network, mastered by a digital system on chip with resistive-switching synaptic arrays of memory devices, which exploits homeostatic Hebbian learning for improved efficiency. All the results are discussed experimentally and theoretically, proposing a conceptual framework for benchmarking the main outcomes in terms of accuracy and resilience. To test the proposed architecture for reinforcement learning tasks, we study the autonomous exploration of continually evolving environments and verify the results for the Mars rover navigation. We also show that, compared to conventional deep learning techniques, our in-memory hardware has the potential to achieve a significant boost in speed and power-saving.

Nanoscale Phase Change Material Array by Sub-Resolution Assist Feature for Storage Class Memory Application

High density phase change memory array requires both minimized critical dimension (CD) and maximized process window for the phase change material layer. High in-wafer uniformity of the nanoscale patterning of chalcogenides material is challenging given the optical proximity effect (OPE) in the lithography process and the micro-loading effect in the etching process. In this study, we demonstrate an approach to fabricate high density phase change material arrays with half-pitch down to around 70 nm by the co-optimization of lithography and plasma etching process. The focused-energy matrix was performed to improve the pattern process window of phase change material on a 12-inch wafer. A variety of patternings from an isolated line to a dense pitch line were investigated using immersion lithography system. The collapse of the edge line is observed due to the OPE induced shrinkage in linewidth, which is deteriorative as the patterning density increases. The sub-resolution assist feature (SRAF) was placed to increase the width of the lines at both edges of each patterning by taking advantage of the optical interference between the main features and the assistant features. The survival of the line at the edges is confirmed with around a 70 nm half-pitch feature in various arrays. A uniform etching profile across the pitch line pattern of phase change material was demonstrated in which the micro-loading effect and the plasma etching damage were significantly suppressed by co-optimizing the etching parameters. The results pave the way to achieve high density device arrays with improved uniformity and reliability for mass storage applications.

Recent progress in three-terminal artificial synapses based on 2D materials: from mechanisms to applications

Synapses are essential for the transmission of neural signals. Synaptic plasticity allows for changes in synaptic strength, enabling the brain to learn from experience. With the rapid development of neuromorphic electronics, tremendous efforts have been devoted to designing and fabricating electronic devices that can mimic synapse operating modes. This growing interest in the field will provide unprecedented opportunities for new hardware architectures for artificial intelligence. In this review, we focus on research of three-terminal artificial synapses based on two-dimensional (2D) materials regulated by electrical, optical and mechanical stimulation. In addition, we systematically summarize artificial synapse applications in various sensory systems, including bioplastic bionics, logical transformation, associative learning, image recognition, and multimodal pattern recognition. Finally, the current challenges and future perspectives involving integration, power consumption and functionality are outlined.

Recent advances in neuromorphic transistors for artificial perception applications: FOCUS ISSUE REVIEW

Conventional von Neumann architecture is insufficient in establishing artificial intelligence (AI) in terms of energy efficiency, computing in memory and dynamic learning. Delightedly, rapid developments in neuromorphic computing provide a new paradigm to solve this dilemma. Furthermore, neuromorphic devices that can realize synaptic plasticity and neuromorphic function have extraordinary significance for neuromorphic system. A three-terminal neuromorphic transistor is one of the typical representatives. In addition, human body has five senses, including vision, touch, auditory sense, olfactory sense and gustatory sense, providing abundant information for brain. Inspired by the human perception system, developments in artificial perception system will give new vitality to intelligent robots. This review discusses the operation mechanism, function and application of neuromorphic transistors. The latest progresses in artificial perception systems based on neuromorphic transistors are provided. Finally, the opportunities and challenges of artificial perception systems are summarized.

Operating region-dependent characteristics of weight updates in synaptic In-Ga-Zn-O thin-film transistors

We present a study on characteristics of operating region-dependent weight updates in a synaptic thin-film transistor (Syn-TFT) with an amorphous In-Ga-Zn-O (IGZO) channel layer. For a synaptic behavior (e.g. a memory phenomenon) of the IGZO TFT, a defective oxide (e.g. SiO₂) is intentionally used for a charge trapping due to programming pulses to the gate terminal. Based on this synaptic behavior, a conductance of the Syn-TFT is modulated depending on the programming pulses, thus weight updates. This weight update characteristics of the Syn-TFT is analyzed in terms of a dynamic ratio (dr_w) for two operating regions (i.e. the above-threshold and sub-threshold regimes). Here, the operating region is chosen depending on the level of the gate read-voltage relative to the threshold voltage of the Syn-TFT. To verify these, the static and pulsed characteristics of the fabricated Syn-TFT are monitored experimentally. As experimental results, it is found that the dr_w of the sub-threshold regime is larger compared to the above-threshold regime. In addition, the weight linearity in the sub-threshold regime is observed to be better compared to the above-threshold regime. Since it is expected that either the dr_w or weight linearity can affect performances (e.g. a classification accuracy) of an analog accelerator (AA) constructed with the Syn-TFTs, the AA simulation is performed to check this with a crossbar simulator.

Low-Consumption Synaptic Devices Based on Gate-All-Around InAs Nanowire Field-Effect Transistors

In this work, an artificial electronic synaptic device based on gate-all-around InAs nanowire field-effect transistor is proposed and analyzed. The deposited oxide layer (In₂O₃) on the InAs nanowire surface serves as a charge trapping layer for information storage. The gate voltage pulse serves as stimuli of the presynaptic membrane, and the drain current and channel conductance are treated as post-synaptic current and weights of the postsynaptic membrane, respectively. At low gate voltages, the device simulates synaptic behaviors including short-term depression and long-term depression. By increasing the amplitude and quantity of gate voltage pulses, the transition from short-term depression to long-term potentiation can be achieved. The device exhibits a large memory window of over 1 V and a minimal energy consumption of 12.5 pJ per synaptic event. This work may pave the way for the development of miniaturized low-consumption synaptic devices and related neuromorphic systems.

Emergence of associative learning in a neuromorphic inference network

OBJECTIVE

In the theoretical framework of predictive coding and active inference, the brain can be viewed as instantiating a rich generative model of the world that predicts incoming sensory data while continuously updating its parameters via minimization of prediction errors. While this theory has been successfully applied to cognitive processes - by modelling the activity of functional neural networks at a mesoscopic scale - the validity of the approach when modelling neurons as an ensemble of inferring agents, in a biologically plausible architecture, remained to be explored.

APPROACH

We modelled a simplified cerebellar circuit with individual neurons acting as Bayesian agents to simulate the classical delayed eyeblink conditioning protocol. Neurons and synapses adjusted their activity to minimize their prediction error, which was used as the network cost function. This cerebellar network was then implemented in hardware by replicating digital neuronal elements via a low-power microcontroller.

MAIN RESULTS

Persistent changes of synaptic strength - that mirrored neurophysiological observations - emerged via local (neurocentric) prediction error minimization, leading to the expression of associative learning. The same paradigm was effectively emulated in low-power hardware showing remarkably efficient performance compared to conventional neuromorphic architectures.

SIGNIFICANCE

These findings show that: i) an ensemble of free energy minimizing neurons - organized in a biological plausible architecture - can recapitulate functional self-organization observed in nature, such as associative plasticity, and ii) a neuromorphic network of inference units can learn unsupervised tasks without embedding predefined learning rules in the circuit, thus providing a potential avenue to a novel form of brain-inspired artificial intelligence.

Stochastic Resonance in Organic Electronic Devices

Stochastic Resonance (SR) is a phenomenon in which noise improves the performance of a system. With the addition of noise, a weak input signal to a nonlinear system, which may exceed its threshold, is transformed into an output signal. In the other words, noise-driven signal transfer is achieved. SR has been observed in nonlinear response systems, such as biological and artificial systems, and this review will focus mainly on examples of previous studies of mathematical models and experimental realization of SR using poly(hexylthiophene)-based organic field-effect transistors (OFETs). This phenomenon may contribute to signal processing with low energy consumption. However, the generation of SR requires a noise source. Therefore, the focus is on OFETs using materials such as organic materials with unstable electrical properties and critical elements due to unidirectional signal transmission, such as neural synapses. It has been reported that SR can be observed in OFETs by application of external noise. However, SR does not occur under conditions where the input signal exceeds the OFET threshold without external noise. Here, we present an example of a study that analyzes the behavior of SR in OFET systems and explain how SR can be made observable. At the same time, the role of internal noise in OFETs will be explained.

4K-memristor analog-grade passive crossbar circuit

The superior density of passive analog-grade memristive crossbar circuits enables storing large neural network models directly on specialized neuromorphic chips to avoid costly off-chip communication. To ensure efficient use of such circuits in neuromorphic systems, memristor variations must be substantially lower than those of active memory devices. Here we report a 64 × 64 passive crossbar circuit with ~99% functional nonvolatile metal-oxide memristors. The fabrication technology is based on a foundry-compatible process with etch-down patterning and a low-temperature budget. The achieved <26% coefficient of variance in memristor switching voltages is sufficient for programming a 4K-pixel gray-scale pattern with a <4% relative tuning error on average. Analog properties are also successfully verified via experimental demonstration of a 64 × 10 vector-by-matrix multiplication with an average 1% relative conductance import accuracy to model the MNIST image classification by ex-situ trained single-layer perceptron, and modeling of a large-scale multilayer perceptron classifier based on more advanced conductance tuning algorithm.

The superior density of passive analog memristive devices can potentially enable efficient implementation of very large scale neural networks; however, device to device variability is currently too large to take advantage of this. Here, Kim et al demonstrate an impressive reduction in this variability, with a large passive memristive array.

A Brain-Inspired Homeostatic Neuron Based on Phase-Change Memories for Efficient Neuromorphic Computing

One of the main goals of neuromorphic computing is the implementation and design of systems capable of dynamic evolution with respect to their own experience. In biology, synaptic scaling is the homeostatic mechanism which controls the frequency of neural spikes within stable boundaries for improved learning activity. To introduce such control mechanism in a hardware spiking neural network (SNN), we present here a novel artificial neuron based on phase change memory (PCM) devices capable of internal regulation via homeostatic and plastic phenomena. We experimentally show that this mechanism increases the robustness of the system thus optimizing the multi-pattern learning under spike-timing-dependent plasticity (STDP). It also improves the continual learning capability of hybrid supervised-unsupervised convolutional neural networks (CNNs), in terms of both resilience and accuracy. Furthermore, the use of neurons capable of self-regulating their fire responsivity as a function of the PCM internal state enables the design of dynamic networks. In this scenario, we propose to use the PCM-based neurons to design bio-inspired recurrent networks for autonomous decision making in navigation tasks. The agent relies on neuronal spike-frequency adaptation (SFA) to explore the environment via penalties and rewards. Finally, we show that the conductance drift of the PCM devices, contrarily to the applications in neural network accelerators, can improve the overall energy efficiency of neuromorphic computing by implementing bio-plausible active forgetting.

Nonideal resistive and synaptic characteristics in Ag/ZnO/TiN device for neuromorphic system

Ideal resistive switching in resistive random-access memory (RRAM) should be ensured for synaptic devices in neuromorphic systems. We used an Ag/ZnO/TiN RRAM structure to investigate the effects of nonideal resistive switching, such as an unstable high-resistance state (HRS), negative set (N-set), and temporal disconnection, during the set process and the conductance saturation feature for synaptic applications. The device shows an I–V curve based on the positive set in the bipolar resistive switching mode. In 1000 endurance tests, we investigated the changes in the HRS, which displays large fluctuations compared with the stable low-resistance state, and the negative effect on the performance of the device resulting from such an instability. The impact of the N-set, which originates from the negative voltage on the top electrode, was studied through the process of intentional N-set through the repetition of 10 ON/OFF cycles. The Ag/ZnO/TiN device showed saturation characteristics in conductance modulation according to the magnitude of the applied pulse. Therefore, potentiation or depression was performed via consecutive pulses with diverse amplitudes. We also studied the spontaneous conductance decay in the saturation feature required to emulate short-term plasticity.

Metal chalcogenides for neuromorphic computing: emerging materials and mechanisms

The approaching end of Moore's law scaling has significantly accelerated multiple fields of research including neuromorphic-, quantum-, and photonic computing, each of which possesses unique benefits unobtained through conventional binary computers. One of the most compelling arguments for neuromorphic computing systems is power consumption, noting that computations made in the human brain are approximately 10⁶times more efficient than conventional CMOS logic. This review article focuses on the materials science and physical mechanisms found in metal chalcogenides that are currently being explored for use in neuromorphic applications. We begin by reviewing the key biological signal generation and transduction mechanisms within neuronal components of mammalian brains and subsequently compare with observed experimental measurements in chalcogenides. With robustness and energy efficiency in mind, we will focus on short-range mechanisms such as structural phase changes and correlated electron systems that can be driven by low-energy stimuli, such as temperature or electric field. We aim to highlight fundamental materials research and existing gaps that need to be overcome to enable further integration or advancement of metal chalcogenides for neuromorphic systems.

Adaptive Extreme Edge Computing for Wearable Devices

Wearable devices are a fast-growing technology with impact on personal healthcare for both society and economy. Due to the widespread of sensors in pervasive and distributed networks, power consumption, processing speed, and system adaptation are vital in future smart wearable devices. The visioning and forecasting of how to bring computation to the edge in smart sensors have already begun, with an aspiration to provide adaptive extreme edge computing. Here, we provide a holistic view of hardware and theoretical solutions toward smart wearable devices that can provide guidance to research in this pervasive computing era. We propose various solutions for biologically plausible models for continual learning in neuromorphic computing technologies for wearable sensors. To envision this concept, we provide a systematic outline in which prospective low power and low latency scenarios of wearable sensors in neuromorphic platforms are expected. We successively describe vital potential landscapes of neuromorphic processors exploiting complementary metal-oxide semiconductors (CMOS) and emerging memory technologies (e.g., memristive devices). Furthermore, we evaluate the requirements for edge computing within wearable devices in terms of footprint, power consumption, latency, and data size. We additionally investigate the challenges beyond neuromorphic computing hardware, algorithms and devices that could impede enhancement of adaptive edge computing in smart wearable devices.

Artificial Neuron and Synapse Devices Based on 2D Materials

Neuromorphic systems, which emulate neural functionalities of a human brain, are considered to be an attractive next-generation computing approach, with advantages of high energy efficiency and fast computing speed. After these neuromorphic systems are proposed, it is demonstrated that artificial synapses and neurons can mimic neural functions of biological synapses and neurons. However, since the neuromorphic functionalities are highly related to the surface properties of materials, bulk material-based neuromorphic devices suffer from uncontrollable defects at surfaces and strong scattering caused by dangling bonds. Therefore, 2D materials which have dangling-bond-free surfaces and excellent crystallinity have emerged as promising candidates for neuromorphic computing hardware. First, the fundamental synaptic behavior is reviewed, such as synaptic plasticity and learning rule, and requirements of artificial synapses to emulate biological synapses. In addition, an overview of recent advances on 2D materials-based synaptic devices is summarized by categorizing these into various working principles of artificial synapses. Second, the compulsory behavior and requirements of artificial neurons such as the all-or-nothing law and refractory periods to simulate a spike neural network are described, and the implementation of 2D materials-based artificial neurons to date is reviewed. Finally, future challenges and outlooks of 2D materials-based neuromorphic devices are discussed.

Mimicking associative learning using an ion-trapping non-volatile synaptic organic electrochemical transistor

Associative learning, a critical learning principle to improve an individual's adaptability, has been emulated by few organic electrochemical devices. However, complicated bias schemes, high write voltages, as well as process irreversibility hinder the further development of associative learning circuits. Here, by adopting a poly(3,4-ethylenedioxythiophene):tosylate/Polytetrahydrofuran composite as the active channel, we present a non-volatile organic electrochemical transistor that shows a write bias less than 0.8 V and retention time longer than 200 min without decoupling the write and read operations. By incorporating a pressure sensor and a photoresistor, a neuromorphic circuit is demonstrated with the ability to associate two physical inputs (light and pressure) instead of normally demonstrated electrical inputs in other associative learning circuits. To unravel the non-volatility of this material, ultraviolet-visible-near-infrared spectroscopy, X-ray photoelectron spectroscopy and grazing-incidence wide-angle X-ray scattering are used to characterize the oxidation level variation, compositional change, and the structural modulation of the poly(3,4-ethylenedioxythiophene):tosylate/Polytetrahydrofuran films in various conductance states. The implementation of the associative learning circuit as well as the understanding of the non-volatile material represent critical advances for organic electrochemical devices in neuromorphic applications.

In-Memory Computing with Resistive Memory Circuits: Status and Outlook

In-memory computing (IMC) refers to non-von Neumann architectures where data are processed in situ within the memory by taking advantage of physical laws. Among the memory devices that have been considered for IMC, the resistive switching memory (RRAM), also known as memristor, is one of the most promising technologies due to its relatively easy integration and scaling. RRAM devices have been explored for both memory and IMC applications, such as neural network accelerators and neuromorphic processors. This work presents the status and outlook on the RRAM for analog computing, where the precision of the encoded coefficients, such as the synaptic weights of a neural network, is one of the key requirements. We show the experimental study of the cycle-to-cycle variation of set and reset processes for HfO2-based RRAM, which indicate that gate-controlled pulses present the least variation in conductance. Assuming a constant variation of conductance σG, we then evaluate and compare various mapping schemes, including multilevel, binary, unary, redundant and slicing techniques. We present analytical formulas for the standard deviation of the conductance and the maximum number of bits that still satisfies a given maximum error. Finally, we discuss RRAM performance for various analog computing tasks compared to other computational memory devices. RRAM appears as one of the most promising devices in terms of scaling, accuracy and low-current operation.

Ta-Doped Sb2Te Allows Ultrafast Phase-Change Memory with Excellent High-Temperature Operation Characteristics

Phase-change memory (PCM) has considerable promise for new applications based on von Neumann and emerging neuromorphic computing systems. However, a key challenge in harnessing the advantages of PCM devices is achieving high-speed operation of these devices at elevated temperatures, which is critical for the efficient processing and reliable storage of data at full capacity. Herein, we report a novel PCM device based on Ta-doped antimony telluride (Sb₂Te), which exhibits both high-speed characteristics and excellent high-temperature characteristics, with an operation speed of 2 ns, endurance of > 10⁶ cycles, and reversible switching at 140 °C. The high coordination number of Ta and the strong bonds between Ta and Sb/Te atoms contribute to the robustness of the amorphous structure, which improves the thermal stability. Furthermore, the small grains in the three-dimensional limit lead to an increased energy efficiency and a reduced risk of layer segregation, reducing the power consumption and improving the long-term endurance. Our findings for this new Ta-Sb₂Te material system can facilitate the development of PCMs with improved performance and novel applications.

Integration and Co-design of Memristive Devices and Algorithms for Artificial Intelligence

Memristive devices share remarkable similarities to biological synapses, dendrites, and neurons at both the physical mechanism level and unit functionality level, making the memristive approach to neuromorphic computing a promising technology for future artificial intelligence. However, these similarities do not directly transfer to the success of efficient computation without device and algorithm co-designs and optimizations. Contemporary deep learning algorithms demand the memristive artificial synapses to ideally possess analog weighting and linear weight-update behavior, requiring substantial device-level and circuit-level optimization. Such co-design and optimization have been the main focus of memristive neuromorphic engineering, which often abandons the “non-ideal” behaviors of memristive devices, although many of them resemble what have been observed in biological components. Novel brain-inspired algorithms are being proposed to utilize such behaviors as unique features to further enhance the efficiency and intelligence of neuromorphic computing, which calls for collaborations among electrical engineers, computing scientists, and neuroscientists.

Enhancing Short-Term Plasticity by Inserting a Thin TiO2 Layer in WOx-Based Resistive Switching Memory

In this work, we emulate biological synaptic properties such as long-term plasticity (LTP) and short-term plasticity (STP) in an artificial synaptic device with a TiN/TiO2/WOx/Pt structure. The graded WOx layer with oxygen vacancies is confirmed via X-ray photoelectron spectroscopy (XPS) analysis. The control TiN/WOx/Pt device shows filamentary switching with abrupt set and gradual reset processes in DC sweep mode. The TiN/WOx/Pt device is vulnerable to set stuck because of negative set behavior, as verified by both DC sweep and pulse modes. The TiN/WOx/Pt device has good retention and can mimic long-term memory (LTM), including potentiation and depression, given repeated pulses. On the other hand, TiN/TiO2/WOx/Pt devices show non-filamentary type switching that is suitable for fine conductance modulation. Potentiation and depression are demonstrated in the TiN/TiO2 (2 nm)/WOx/Pt device with moderate conductance decay by application of identical repeated pulses. Short-term memory (STM) is demonstrated by varying the interval time of pulse inputs for the TiN/TiO2 (6 nm)/WOx/Pt device with a quick decay in conductance.

Sensory Adaptation and Neuromorphic Phototransistors Based on CsPb(Br1-xIx)3 Perovskite and MoS2 Hybrid Structure

Sensory adaptation is an essential part of biological neural systems for sustaining human life. Using the light-induced halide phase segregation of CsPb(Br_1-xI_x)₃ perovskite, we introduce neuromorphic phototransistors that emulate human sensory adaptation. The phototransistor based on a hybrid structure of perovskite and transition-metal dichalcogenide (TMD) emulates the sensory adaptation in response to a continuous light stimulus, similar to the neural system. The underlying mechanism for the sensory adaptation is the halide segregation of the mixed halide perovskites. The phase separation under visible-light illumination leads to the segregation of I and Br into separate iodide- and bromide-rich domains, significantly changing the photocurrent in the phototransistors. The devices are reversible upon the removal of the light stimulation, resulting in near-complete recovery of the photosensitivity before the phase segregation (sensitivity recovery of 96.65% for 5 min rest time). The proposed phototransistor based on the perovskite-TMD hybrid structure can be applied to other neuromorphic devices such as neuromorphic photonic devices, intelligent sensors, and selective light-detecting image sensors.

Transiently chaotic simulated annealing based on intrinsic nonlinearity of memristors for efficient solution of optimization problems

Optimization problems are ubiquitous in scientific research, engineering, and daily lives. However, solving a complex optimization problem often requires excessive computing resource and time and faces challenges in easily getting trapped into local optima. Here, we propose a memristive optimizer hardware based on a Hopfield network, which introduces transient chaos to simulated annealing in aid of jumping out of the local optima while ensuring convergence. A single memristor crossbar is used to store the weight parameters of a fully connected Hopfield network and adjust the network dynamics in situ. Furthermore, we harness the intrinsic nonlinearity of memristors within the crossbar to implement an efficient and simplified annealing process for the optimization. Solutions of continuous function optimizations on sphere function and Matyas function as well as combinatorial optimization on Max-cut problem are experimentally demonstrated, indicating great potential of the transiently chaotic memristive network in solving optimization problems in general.

Memory devices and applications for in-memory computing

Traditional von Neumann computing systems involve separate processing and memory units. However, data movement is costly in terms of time and energy and this problem is aggravated by the recent explosive growth in highly data-centric applications related to artificial intelligence. This calls for a radical departure from the traditional systems and one such non-von Neumann computational approach is in-memory computing. Hereby certain computational tasks are performed in place in the memory itself by exploiting the physical attributes of the memory devices. Both charge-based and resistance-based memory devices are being explored for in-memory computing. In this Review, we provide a broad overview of the key computational primitives enabled by these memory devices as well as their applications spanning scientific computing, signal processing, optimization, machine learning, deep learning and stochastic computing.

Experimental Demonstration of Supervised Learning in Spiking Neural Networks with Phase-Change Memory Synapses

Spiking neural networks (SNN) are computational models inspired by the brain’s ability to naturally encode and process information in the time domain. The added temporal dimension is believed to render them more computationally efficient than the conventional artificial neural networks, though their full computational capabilities are yet to be explored. Recently, in-memory computing architectures based on non-volatile memory crossbar arrays have shown great promise to implement parallel computations in artificial and spiking neural networks. In this work, we evaluate the feasibility to realize high-performance event-driven in-situ supervised learning systems using nanoscale and stochastic analog memory synapses. For the first time, the potential of analog memory synapses to generate precisely timed spikes in SNNs is experimentally demonstrated. The experiment targets applications which directly integrates spike encoded signals generated from bio-mimetic sensors with in-memory computing based learning systems to generate precisely timed control signal spikes for neuromorphic actuators. More than 170,000 phase-change memory (PCM) based synapses from our prototype chip were trained based on an event-driven learning rule, to generate spike patterns with more than 85% of the spikes within a 25 ms tolerance interval in a 1250 ms long spike pattern. We observe that the accuracy is mainly limited by the imprecision related to device programming and temporal drift of conductance values. We show that an array level scaling scheme can significantly improve the retention of the trained SNN states in the presence of conductance drift in the PCM. Combining the computational potential of supervised SNNs with the parallel compute power of in-memory computing, this work paves the way for next-generation of efficient brain-inspired systems.

Memristive and CMOS Devices for Neuromorphic Computing

Neuromorphic computing has emerged as one of the most promising paradigms to overcome the limitations of von Neumann architecture of conventional digital processors. The aim of neuromorphic computing is to faithfully reproduce the computing processes in the human brain, thus paralleling its outstanding energy efficiency and compactness. Toward this goal, however, some major challenges have to be faced. Since the brain processes information by high-density neural networks with ultra-low power consumption, novel device concepts combining high scalability, low-power operation, and advanced computing functionality must be developed. This work provides an overview of the most promising device concepts in neuromorphic computing including complementary metal-oxide semiconductor (CMOS) and memristive technologies. First, the physics and operation of CMOS-based floating-gate memory devices in artificial neural networks will be addressed. Then, several memristive concepts will be reviewed and discussed for applications in deep neural network and spiking neural network architectures. Finally, the main technology challenges and perspectives of neuromorphic computing will be discussed.

Ferroelectric Tunneling Junctions Based on Aluminum Oxide/ Zirconium-Doped Hafnium Oxide for Neuromorphic Computing

Ferroelectric tunneling junctions (FTJs) with tunable tunneling electroresistance (TER) are promising for many emerging applications, including non-volatile memories and neurosynaptic computing. One of the key challenges in FTJs is the balance between the polarization value and the tunneling current. In order to achieve a sizable on-current, the thickness of the ferroelectric layer needs to be scaled down below 5 nm. However, the polarization in these ultra-thin ferroelectric layers is very small, which leads to a low tunneling electroresistance (TER) ratio. In this paper, we propose and demonstrate a new type of FTJ based on metal/Al₂O₃/Zr-doped HfO₂/Si structure. The interfacial Al₂O₃ layer and silicon substrate enable sizable TERs even when the thickness of Zr-doped HfO₂ (HZO) is above 10 nm. We found that F-N tunneling dominates at read voltages and that the polarization switching in HZO can alter the effective tunneling barrier height and tune the tunneling resistance. The FTJ synapses based on Al₂O₃/HZO stacks show symmetric potentiation/depression characteristics and widely tunable conductance. We also show that spike-timing-dependent plasticity (STDP) can be harnessed from HZO based FTJs. These novel FTJs will have high potential in non-volatile memories and neural network applications.

Ferroelectric Tunneling Junctions Based on Aluminum Oxide/ Zirconium-Doped Hafnium Oxide for Neuromorphic Computing

Ferroelectric tunneling junctions (FTJs) with tunable tunneling electroresistance (TER) are promising for many emerging applications, including non-volatile memories and neurosynaptic computing. One of the key challenges in FTJs is the balance between the polarization value and the tunneling current. In order to achieve a sizable on-current, the thickness of the ferroelectric layer needs to be scaled down below 5 nm. However, the polarization in these ultra-thin ferroelectric layers is very small, which leads to a low tunneling electroresistance (TER) ratio. In this paper, we propose and demonstrate a new type of FTJ based on metal/Al₂O₃/Zr-doped HfO₂/Si structure. The interfacial Al₂O₃ layer and silicon substrate enable sizable TERs even when the thickness of Zr-doped HfO₂ (HZO) is above 10 nm. We found that F-N tunneling dominates at read voltages and that the polarization switching in HZO can alter the effective tunneling barrier height and tune the tunneling resistance. The FTJ synapses based on Al₂O₃/HZO stacks show symmetric potentiation/depression characteristics and widely tunable conductance. We also show that spike-timing-dependent plasticity (STDP) can be harnessed from HZO based FTJs. These novel FTJs will have high potential in non-volatile memories and neural network applications.

Ultra-wide temperature electronic synapses based on self-rectifying ferroelectric memristors

Memristors have been intensively studied in recent years as promising building blocks for next-generation nonvolatile memory, artificial neural networks and brain-inspired computing systems. However, most memristors cannot simultaneously function in extremely low and high temperatures, limiting their use for many harsh environment applications. Here, we demonstrate that the memristors based on high-Curie temperature ferroelectrics can resolve these issues. Excellent synaptic learning and memory functions can be achieved in BiFeO₃ (BFO)-based ferroelectric memristors in an ultra-wide temperature range. Correlation between electronic transport and ferroelectric properties is established by the coincidence of resistance and ferroelectricity switch and the direct visualization of local current and domain distributions. The interfacial barrier modification by the reversal of ferroelectric polarization leads to a robust resistance switching behavior. Various synaptic functions including long-term potentiation/depression, consecutive potentiation/depression and spike-timing dependent plasticity have been realized in the BFO ferroelectric memristors over an extremely wide temperature range of -170 °C ∼ 300 °C, which even can be extended to 500 °C due to the robust ferroelectricity of BFO at high temperatures. Our findings illustrate that the BFO ferroelectric memristors are promising candidates for ultra-wide temperature electronic synapse in extreme or harsh environments.

Fully Printed All-Solid-State Organic Flexible Artificial Synapse for Neuromorphic Computing

Nonvolatile, flexible artificial synapses that can be used for brain-inspired computing are highly desirable for emerging applications such as human-machine interfaces, soft robotics, medical implants, and biological studies. Printed devices based on organic materials are very promising for these applications due to their sensitivity to ion injection, intrinsic printability, biocompatibility, and great potential for flexible/stretchable electronics. Herein, we report the experimental realization of a nonvolatile artificial synapse using organic polymers in a scalable fabrication process. The three-terminal electrochemical neuromorphic device successfully emulates the key features of biological synapses: long-term potentiation/depression, spike timing-dependent plasticity learning rule, paired-pulse facilitation, and ultralow energy consumption. The artificial synapse network exhibits an excellent endurance against bending tests and enables a direct emulation of logic gates, which shows the feasibility of using them in futuristic hierarchical neural networks. Based on our demonstration of 100 distinct, nonvolatile conductance states, we achieved a high accuracy in pattern recognition and face classification neural network simulations.

Synaptic Resistors for Concurrent Inference and Learning with High Energy Efficiency

The fastest supercomputer, Summit, has a speed comparable to the human brain, but is much less energy-efficient (≈10¹⁰ FLOPS W^-1 , floating point operations per second per watt) than the brain (≈10¹⁵ FLOPS W^-1 ). The brain processes and learns from "big data" concurrently via trillions of synapses in parallel analog mode. By contrast, computers execute algorithms on physically separated logic and memory transistors in serial digital mode, which fundamentally restrains computers from handling "big data" efficiently. The existing electronic devices can perform inference with high speeds and energy efficiencies, but they still lack the synaptic functions to facilitate concurrent convolutional inference and correlative learning efficiently like the brain. In this work, synaptic resistors are reported to emulate the analog convolutional signal processing, correlative learning, and nonvolatile memory functions of synapses. By circumventing the fundamental limitations of computers, a synaptic resistor circuit performs speech inference and learning concurrently in parallel analog mode with an energy efficiency of ≈1.6 × 10¹⁷ FLOPS W^-1 , which is about seven orders of magnitudes higher than that of the Summit supercomputer. Scaled-up synstor circuits could circumvent the fundamental limitations in computers, and facilitate real-time inference and learning from "big data" with high efficiency and speed in intelligent systems.

Sc-Centered Octahedron Enables High-Speed Phase Change Memory with Improved Data Retention and Reduced Power Consumption

Phase change memory (PCM) with advantages of high operation speed, multilevel storage capability, spiking-time-dependent plasticity, etc., has wide application scenarios in both Von Neumann systems and neuromorphic systems. In the automotive application, intelligent system not only needs high efficiency to handle massive data processing but also good robustness to retain the existing data against high working temperature. In this work, Sc-doped GeTe is developed for PCM, which has achieved 120 °C data retention for 10 years, 6 ns operation speed, and 7 nJ low power consumption. The high data retention is attributed to the high coordination number of Sc and its strong bonds with Te atoms in the amorphous phase, which enhances the robustness of the atomic matrices. Sc-centered octahedrons in amorphous state provide a nucleation center, leading to fast crystallization. In the crystalline phase, Sc atoms occupy Ge vacancies to form a homogenous GeTe-like rhombohedral phase. The strong covalent-like Sc-Te bonds weaken the neighboring Ge-Te bonds, lowering energy for melting. Together with the increased energy efficiency originated from confined grain size, the reduced power consumption has been achieved. The improvements in data retention, speed, and power efficiency have made Sc-doped GeTe a promising candidate for high-performance automobile electronics application.

A Review of Germanium-Antimony-Telluride Phase Change Materials for Non-Volatile Memories and Optical Modulators

Chalcogenide phase change materials based on germanium-antimony-tellurides (GST-PCMs) have shown outstanding properties in non-volatile memory (NVM) technologies due to their high write and read speeds, reversible phase transition, high degree of scalability, low power consumption, good data retention, and multi-level storage capability. However, GST-based PCMs have shown recent promise in other domains, such as in spatial light modulation, beam steering, and neuromorphic computing. This paper reviews the progress in GST-based PCMs and methods for improving the performance within the context of new applications that have come to light in recent years.

Artificial synapses based on nanomaterials

Artificial synapses emulate biological synaptic signals in neuromorphic systems to attain brain-like computation and autonomous learning behaviors in non-von-Neumann systems. Several classes of materials have been applied to this field to achieve numerous functionalities of biological synapses. Nanomaterials (NMs), such as one-dimensional (1D) and two-dimensional (2D) NMs have shown great potential due to their nanometer feature size (1D) and molecular-level thickness (2D). In this paper, we review the development of artificial synapses, and discuss state-of-the-art artificial synapses based on NMs.

Extended memory lifetime in spiking neural networks employing memristive synapses with nonlinear conductance dynamics

Spiking neural networks (SNNs) employing memristive synapses are capable of life-long online learning. Because of their ability to process and classify large amounts of data in real-time using compact and low-power electronic systems, they promise a substantial technology breakthrough. However, the critical issue that memristor-based SNNs have to face is the fundamental limitation in their memory capacity due to finite resolution of the synaptic elements, which leads to the replacement of old memories with new ones and to a finite memory lifetime. In this study we demonstrate that the nonlinear conductance dynamics of memristive devices can be exploited to improve the memory lifetime of a network. The network is simulated on the basis of a spiking neuron model of mixed-signal digital-analogue sub-threshold neuromorphic CMOS circuits, and on memristive synapse models derived from the experimental nonlinear conductance dynamics of resistive memory devices when stimulated by trains of identical pulses. The network learning circuits implement a spike-based plasticity rule compatible with both spike-timing and rate-based learning rules. In order to get an insight on the memory lifetime of the network, we analyse the learning dynamics in the context of a classical benchmark of neural network learning, that is hand-written digit classification. In the proposed architecture, the memory lifetime and the performance of the network are improved for memristive synapses with nonlinear dynamics with respect to linear synapses with similar resolution. These results demonstrate the importance of following holistic approaches that combine the study of theoretical learning models with the development of neuromorphic CMOS SNNs with memristive devices used to implement life-long on-chip learning.

Dendrite Integration Mimicked on Starch-Based Electrolyte-Gated Oxide Dendrite Transistors

Emulation of dendrite integration on brain-inspired hardware devices is of great significance for neuromorphic engineering. Here, solution-processed starch-based electrolyte films are fabricated, demonstrating strong proton gating activities. Starch gated oxide dendrite transistors with multigates are fabricated, exhibiting good electrical performances. Most importantly, dendrite modulation, spatiotemporal dendrite integration, and linear/superlinear dendrite algorithm are demonstrated on the proposed dendrite transistor. Furthermore, a low energy consumption of ∼1.2 pJ is obtained for triggering a synaptic response on the dendrite transistor. Accordingly, the signal-to-noise ratio is still as high as ∼2.9, indicating a high sensitivity of ∼4.6 dB. Such artificial dendrite transistors have potential applications in brain-inspired neuromorphic platforms.

Biological plausibility and stochasticity in scalable VO2 active memristor neurons

Neuromorphic networks of artificial neurons and synapses can solve computationally hard problems with energy efficiencies unattainable for von Neumann architectures. For image processing, silicon neuromorphic processors outperform graphic processing units in energy efficiency by a large margin, but deliver much lower chip-scale throughput. The performance-efficiency dilemma for silicon processors may not be overcome by Moore's law scaling of silicon transistors. Scalable and biomimetic active memristor neurons and passive memristor synapses form a self-sufficient basis for a transistorless neural network. However, previous demonstrations of memristor neurons only showed simple integrate-and-fire behaviors and did not reveal the rich dynamics and computational complexity of biological neurons. Here we report that neurons built with nanoscale vanadium dioxide active memristors possess all three classes of excitability and most of the known biological neuronal dynamics, and are intrinsically stochastic. With the favorable size and power scaling, there is a path toward an all-memristor neuromorphic cortical computer.

Handwritten-Digit Recognition by Hybrid Convolutional Neural Network based on HfO2 Memristive Spiking-Neuron

Although there is a huge progress in complementary-metal-oxide-semiconductor (CMOS) technology, construction of an artificial neural network using CMOS technology to realize the functionality comparable with that of human cerebral cortex containing 1010-1011 neurons is still of great challenge. Recently, phase change memristor neuron has been proposed to realize a human-brain level neural network operating at a high speed while consuming a small amount of power and having a high integration density. Although memristor neuron can be scaled down to nanometer, integration of 1010-1011 neurons still faces many problems in circuit complexity, chip area, power consumption, etc. In this work, we propose a CMOS compatible HfO2 memristor neuron that can be well integrated with silicon circuits. A hybrid Convolutional Neural Network (CNN) based on the HfO2 memristor neuron is proposed and constructed. In the hybrid CNN, one memristive neuron can behave as multiple physical neurons based on the Time Division Multiplexing Access (TDMA) technique. Handwritten digit recognition is demonstrated in the hybrid CNN with a memristive neuron acting as 784 physical neurons. This work paves the way towards substantially shrinking the amount of neurons required in hardware and realization of more complex or even human cerebral cortex level memristive neural networks.

Neuromorphic computing with multi-memristive synapses

Neuromorphic computing has emerged as a promising avenue towards building the next generation of intelligent computing systems. It has been proposed that memristive devices, which exhibit history-dependent conductivity modulation, could efficiently represent the synaptic weights in artificial neural networks. However, precise modulation of the device conductance over a wide dynamic range, necessary to maintain high network accuracy, is proving to be challenging. To address this, we present a multi-memristive synaptic architecture with an efficient global counter-based arbitration scheme. We focus on phase change memory devices, develop a comprehensive model and demonstrate via simulations the effectiveness of the concept for both spiking and non-spiking neural networks. Moreover, we present experimental results involving over a million phase change memory devices for unsupervised learning of temporal correlations using a spiking neural network. The work presents a significant step towards the realization of large-scale and energy-efficient neuromorphic computing systems.

Memristive technology is a promising avenue towards realizing efficient non-von Neumann neuromorphic hardware. Boybat et al. proposes a multi-memristive synaptic architecture with a counter-based global arbitration scheme to address challenges associated with the non-ideal memristive device behavior.

Implementation of multilayer perceptron network with highly uniform passive memristive crossbar circuits

The progress in the field of neural computation hinges on the use of hardware more efficient than the conventional microprocessors. Recent works have shown that mixed-signal integrated memristive circuits, especially their passive (0T1R) variety, may increase the neuromorphic network performance dramatically, leaving far behind their digital counterparts. The major obstacle, however, is immature memristor technology so that only limited functionality has been reported. Here we demonstrate operation of one-hidden layer perceptron classifier entirely in the mixed-signal integrated hardware, comprised of two passive 20 × 20 metal-oxide memristive crossbar arrays, board-integrated with discrete conventional components. The demonstrated network, whose hardware complexity is almost 10× higher as compared to previously reported functional classifier circuits based on passive memristive crossbars, achieves classification fidelity within 3% of that obtained in simulations, when using ex-situ training. The successful demonstration was facilitated by improvements in fabrication technology of memristors, specifically by lowering variations in their I-V characteristics.

Unsupervised Hebbian learning experimentally realized with analogue memristive crossbar arrays

Conventional transistor electronics are reaching their limits in terms of scalability, power dissipation, and the underlying Boolean system architecture. To overcome this obstacle neuromorphic analogue systems are recently highly investigated. Particularly, the use of memristive devices in VLSI analogue concepts provides a promising pathway to realize novel bio-inspired computing architectures, which are able to unravel the foreseen difficulties of traditional electronics. Currently, a variety of materials and device structures are being studied along with novel computing schemes to make use of the attractive features of memristive devices for neuromorphic computing. However, a number of obstacles still have to be overcome to cast memristive devices into hardware systems. Most important is a physical implementation of memristive devices, which can cope with the high complexity of neural networks. This includes the integration of analogue and electroforming-free memristive devices into crossbar structures with no additional electronic components, such as selector devices. Here, an unsupervised, bio-motivated Hebbian based learning platform for visual pattern recognition is presented. The heart of the system is a crossbar array (16 × 16) which consists of selector-free and forming-free (non-filamentary) memristive devices, which exhibit analogue I-V characteristics.