Self-Limiting Oxides on WSe2 as Controlled Surface Acceptors and Low-Resistance Hole Contacts

Atomic Precision Processing of Two-Dimensional Materials for Next-Generation Microelectronics

The growth of the information era economy is driving the pursuit of advanced materials for microelectronics, spurred by exploration into "Beyond CMOS" and "More than Moore" paradigms. Atomically thin 2D materials, such as transition metal dichalcogenides (TMDCs), show great potential for next-generation microelectronics due to their properties and defect engineering capabilities. This perspective delves into atomic precision processing (APP) techniques like atomic layer deposition (ALD), epitaxy, atomic layer etching (ALE), and atomic precision advanced manufacturing (APAM) for the fabrication and modification of 2D materials, essential for future semiconductor devices. Additive APP methods like ALD and epitaxy provide precise control over composition, crystallinity, and thickness at the atomic scale, facilitating high-performance device integration. Subtractive APP techniques, such as ALE, focus on atomic-scale etching control for 2D material functionality and manufacturing. In APAM, modification techniques aim at atomic-scale defect control, offering tailored device functions and improved performance. Achieving optimal performance and energy efficiency in 2D material-based microelectronics requires a comprehensive approach encompassing fundamental understanding, process modeling, and high-throughput metrology. The outlook for APP in 2D materials is promising, with ongoing developments poised to impact manufacturing and fundamental materials science. Integration with advanced metrology and codesign frameworks will accelerate the realization of next-generation microelectronics enabled by 2D materials.

Innovations of metallic contacts on semiconducting 2D transition metal dichalcogenides toward advanced 3D-structured field-effect transistors

2D semiconductors, represented by transition metal dichalcogenides (TMDs), have the potential to be alternative channel materials for advanced 3D field-effect transistors, such as gate-all-around field-effect-transistors (GAAFETs) and complementary field-effect-transistors (C-FETs), due to their inherent atomic thinness, moderate mobility, and short scaling lengths. However, 2D semiconductors encounter several technological challenges, especially the high contact resistance issue between 2D semiconductors and metals. This review provides a comprehensive overview of the high contact resistance issue in 2D semiconductors, including its physical background and the efforts to address it, with respect to their applicability to GAAFET structures.

Van der Waals polarity-engineered 3D integration of 2D complementary logic

Vertical three-dimensional integration of two-dimensional (2D) semiconductors holds great promise, as it offers the possibility to scale up logic layers in the z axis1-3. Indeed, vertical complementary field-effect transistors (CFETs) built with such mixed-dimensional heterostructures4,5, as well as hetero-2D layers with different carrier types6-8, have been demonstrated recently. However, so far, the lack of a controllable doping scheme (especially p-doped WSe2 (refs. 9-17) and MoS2 (refs. 11,18-28)) in 2D semiconductors, preferably in a stable and non-destructive manner, has greatly impeded the bottom-up scaling of complementary logic circuitries. Here we show that, by bringing transition metal dichalcogenides, such as MoS2, atop a van der Waals (vdW) antiferromagnetic insulator chromium oxychloride (CrOCl), the carrier polarity in MoS2 can be readily reconfigured from n- to p-type via strong vdW interfacial coupling. The consequential band alignment yields transistors with room-temperature hole mobilities up to approximately 425 cm2 V-1 s-1, on/off ratios reaching 106 and air-stable performance for over one year. Based on this approach, vertically constructed complementary logic, including inverters with 6 vdW layers, NANDs with 14 vdW layers and SRAMs with 14 vdW layers, are further demonstrated. Our findings of polarity-engineered p- and n-type 2D semiconductor channels with and without vdW intercalation are robust and universal to various materials and thus may throw light on future three-dimensional vertically integrated circuits based on 2D logic gates.

Low Resistance Contact to P-Type Monolayer WSe2

Advanced microelectronics in the future may require semiconducting channel materials beyond silicon. Two-dimensional (2D) semiconductors, with their atomically thin thickness, hold great promise for future electronic devices. One challenge to achieving high-performance 2D semiconductor field effect transistors (FET) is the high contact resistance at the metal-semiconductor interface. In this study, we develop a charge-transfer doping strategy with WSe2/α-RuCl3 heterostructures to achieve low-resistance ohmic contact for p-type monolayer WSe2 transistors. We show that hole doping as high as 3 × 1013 cm-2 can be achieved in the WSe2/α-RuCl3 heterostructure due to its type-III band alignment, resulting in an ohmic contact with resistance of 4 kΩ μm. Based on that, we demonstrate p-type WSe2 transistors with an on-current of 35 μA·μm-1 and an ION/IOFF ratio exceeding 109 at room temperature.

High-Performance Contact-Doped WSe2 Transistors Using TaSe2 Electrodes

Two-dimensional (2D) transitional metal dichalcogenides (TMDs) have garnered significant attention due to their potential for next-generation electronics, which require device scaling. However, the performance of TMD-based field-effect transistors (FETs) is greatly limited by the contact resistance. This study develops an effective strategy to optimize the contact resistance of WSe2 FETs by combining contact doping and 2D metallic electrode materials. The contact regions were doped using a laser, and the metallic TaSe2 flakes were stacked on doped WSe2 as electrodes. Doping the contact areas decreases the depletion width, while introducing the TaSe2 contact results in a lower Schottky barrier. This method significantly improves the electrical performance of the WSe2 FETs. The doped WSe2/TaSe2 contact exhibits an ultralow Schottky barrier height of 65 meV and a contact resistance of 11 kΩ·μm, which is a 50-fold reduction compared to the conventional Cr/Au contact. Our method offers a way on fabricating high-performance 2D FETs.

Contributions of Light to Novel Logic Concepts Using Optoelectronic Materials

Instead of the current method of transmitting voltage or current signals in electronic circuit operation, light offers an alternative to conventional logic, allowing for the implementation of new logic concepts through interaction with light. This manuscript examines the use of light in implementing new logic concepts as an alternative to traditional logic circuits and as a future technology. This article provides an overview of how to implement logic operations using light rather than voltage or current signals using optoelectronic materials such as 2D materials, metal-oxides, carbon structures, polymers, small molecules, and perovskites. This review covers the various technologies and applications of using light to dope devices, implement logic gates, control logic circuits, and generate light as an output signal. Recent research on logic and the use of light to implement new functions is summarized. This review also highlights the potential of optoelectronic logic for future technological advancements.

Self-Aligned Top-Gate Structure in High-Performance 2D p-FETs via van der Waals Integration and Contact Spacer Doping

The potential of 2D materials in future CMOS technology is hindered by the lack of high-performance p-type field effect transistors (p-FETs). While utilization of the top-gate (TG) structure with a p-doped spacer area offers a solution to this challenge, the design and device processing to form gate stacks pose serious challenges in realization of ideal p-FETs and PMOS inverters. This study presents a novel approach to address these challenges by fabricating lateral p+-p-p+ junction WSe2 FETs with self-aligned TG stacks in which desired junction is formed by van der Waals (vdW) integration and selective oxygen plasma-doping into spacer regions. The exceptional electrostatic controllability with a high on/off current ratio and small subthreshold swing (SS) of plasma doped p-FETs is achieved with the self-aligned metal/hBN gate stacks. To demonstrate the effectiveness of our approach, we construct a PMOS inverter using this device architecture, which exhibits a remarkably low power consumption of approximately 4.5 nW.

High-Performance Complementary Circuits from Two-Dimensional MoTe2

Two-dimensional (2D) materials hold great promise for future complementary metal-oxide semiconductor (CMOS) technology. However, the lack of effective methods to tune the Schottky barrier poses a challenge in constructing high-performance complementary circuits from the same material. Here, we reveal that the polarity of pristine MoTe2 field-effect transistors (FETs) with minimized air exposure is n-type, irrespective of the metal contact type. The fabricated n-FETs with palladium contact can reach electron currents up to 275 μA/μm at VDS = 2 V. For p-FETs, we introduce a novel nitric oxide doping strategy, allowing a controlled transition of MoTe2 FETs from n-type to unipolar p-type. By doping only in the contact region, we demonstrate hole currents up to 170 μA/μm at VDS= -2 V with preserved Ion/Ioff ratios of 105. Finally, we present a complementary inverter circuit comprising the high-performance n- and p-type FETs based on MoTe2, promoting the application of 2D materials in future electronic systems.

Self-Limiting Growth of Monolayer Tungsten Disulfide Nanoribbons on Tungsten Oxide Nanowires

Transition metal dichalcogenides (TMDCs) are promising two-dimensional (2D) materials for next-generation optoelectronic devices; they can also provide opportunities for further advances in physics. Structuring 2D TMDC sheets as nanoribbons has tremendous potential for electronic state modification. However, a bottom-up synthesis of long TMDC nanoribbons with high monolayer selectivity on a large scale has not yet been reported yet. In this study, we successfully synthesized long W_xO_y nanowires and grew monolayer WS₂ nanoribbons on their surface. The supply of source atoms from a vapor-solid bilayer and chemical reaction at the atomic-scale interface promoted a self-limiting growth process. The developed method exhibited a high monolayer selection yield on a large scale and enabled the growth of long (∼100 μm) WS₂ nanoribbons with electronic properties characterized by optical spectroscopy and electrical transport measurements. The produced nanoribbons were isolated from W_xO_y nanowires by mechanical exfoliation and used as channels for field-effect transistors. The findings of this study can be used in future optoelectronic device applications and advanced physics research.

Se-Vacancy Healing with Substitutional Oxygen in WSe2 for High-Mobility p-Type Field-Effect Transistors

Transition-metal dichalcogenides possess high carrier mobility and can be scaled to sub-nanometer dimensions, making them viable alternative to Si electronics. WSe₂ is capable of hole and electron carrier transport, making it a key component in CMOS logic circuits. However, since the p-type electrical performance of the WSe₂-field effect transistor (FET) is still limited, various approaches are being investigated to circumvent this issue. Here, we formed a heterostructural multilayer WSe₂ channel and solution-processed aluminum-doped zinc oxide (AZO) for compositional modification of WSe₂ to obtain a device with excellent electrical properties. Supplying oxygen anions from AZO to the WSe₂ channel eliminated subgap states through Se-deficiency healing, resulting in improved transport capacity. Se vacancies are known to cause mobility degradation due to scattering, which is mitigated through ionic compensation. Consequently, the hole mobility can reach high values, with a maximum of approximately 100 cm²/V s. Further, the transport behavior of the oxygen-doped WSe₂-FET is systematically analyzed using density functional theory simulations and photoexcited charge collection spectroscopy measurements.

Noninvasive Photodelamination of van der Waals Semiconductors for High-Performance Electronics

Atomically thin 2D van der Waals semiconductors are promising candidate materials for post-silicon electronics. However, it remains challenging to attain completely uniform monolayer semiconductor wafers free of over-grown islands. Here, the observation of the energy-funneling effect and ambient photodelamination phenomenon in inhomogeneous few-layer WS₂ flakes under low-illumination fluencies down to several nW µm^-2 and its potential as a noninvasive atomic-layer etching strategy for selectively stripping the local excessive overlying islands are reported. Photoluminescent tracking on the photoetching traces reveals relatively fast etching rates of around 0.3-0.8 µm min^-1 at varied temperatures and an activation energy of 1.7 eV. By using crystallographic and electronic characterization, the noninvasive nature of the low-power photodelamination and the highly preserved lattice quality are also confirmed in the as-etched monolayer products, featuring a comparable density of atomic defects (≈4.2 × 10¹³ cm^-2 ) to pristine flakes and a high electron mobility of up to 80 cm² V^-1 s^-1 at room temperature. This approach opens a noninvasive postetching route for thickness uniformity management in 2D van der Waals semiconductor wafers for electronic applications.

Hysteresis-Free Contact Doping for High-Performance Two-Dimensional Electronics

Contact doping is considered crucial for reducing the contact resistance of two-dimensional (2D) transistors. However, a process for achieving robust contact doping for 2D electronics is lacking. Here, we developed a two-step doping method for effectively doping 2D materials through a defect-repairing process. The method achieves strong and hysteresis-free doping and is suitable for use with the most widely used transition-metal dichalcogenides. Through our method, we achieved a record-high sheet conductance (0.16 mS·sq^-1 without gating) of monolayer MoS₂ and a high mobility and carrier concentration (4.1 × 10¹³ cm^-2). We employed our robust method for the successful contact doping of a monolayer MoS₂ Au-contact device, obtaining a contact resistance as low as 1.2 kΩ·μm. Our method represents an effective means of fabricating high-performance 2D transistors.

Nanostructured doping of WSe2via block copolymer patterns and its self-powered photodetector application

Transition metal dichalcogenides (TMDs), e.g., MoS₂, MoSe₂, ReS₂, and WSe₂, are effective materials for advanced optoelectronics owing to their intriguing optical, structural, and electrical properties. Various approaches for manipulating the surface of the TMDs have been suggested to unleash the optoelectronic potential of the TMDs. Herein, we employed the self-assembly of the poly(styrene-b-methyl methacrylate) (PS-b-PMMA) block copolymer (BCP) to prepare a nanoporous pattern and generate nanostructured charge-transfer p-doping on the WSe₂ surface, maximizing the depletion region in the absorber layer. After the spin coating and thermal annealing of PS-b-PMMA, followed by the selective etching of PMMA cylindrical microdomains using oxygen reactive-ion plasma, nanopatterned WO_x with high electron affinity was grown on the WSe₂ surface, forming a three-dimensional homojunction. The nanopatterned WO_x significantly expanded the depletion region in the WSe₂ layer, thus enhancing optoelectronic performance and self-powered photodetection. The proposed approach based on the nanostructured doping of the TMDs via BCP nanolithography can help create a promising platform for highly functional optoelectrical devices.

High-Performance Solution-Processed 2D P-Type WSe2 Transistors and Circuits through Molecular Doping

Semiconducting ink based on 2D single-crystal flakes with dangling-bond-free surfaces enables the implementation of high-performance devices on form-free substrates by cost-effective and scalable printing processes. However, the lack of solution-processed p-type 2D semiconducting inks with high mobility is an obstacle to the development of complementary integrated circuits. Here, a versatile strategy of doping with Br₂ is reported to enhance the hole mobility by orders of magnitude for p-type transistors with 2D layered materials. Br₂ -doped WSe₂ transistors show a field-effect hole mobility of more than 27 cm²  V^-1  s^-1 , and a high on/off current ratio of ≈10⁷ , and exhibits excellent operational stability during the on-off switching, cycling, and bias stressing testing. Moreover, complementary inverters composed of patterned p-type WSe₂ and n-type MoS₂ layered films are demonstrated with an ultra-high gain of 1280 under a driving voltage (V_DD ) of 7 V. This work unveils the high potential of solution-processed 2D semiconductors with low-temperature processability for flexible devices and monolithic circuitry.

Synthesis of mono- and few-layered n-type WSe2 from solid state inorganic precursors

Tuning the charge transport properties of two-dimensional transition metal dichalcogenides (TMDs) is pivotal to their future device integration in post-silicon technologies. To date, co-doping of TMDs during growth still proves to be challenging, and the synthesis of doped WSe2, an otherwise ambipolar material, has been mainly limited to p-doping. Here, we demonstrate the synthesis of high-quality n-type monolayered WSe2 flakes using a solid-state precursor for Se, zinc selenide. n-Type transport has been reported with prime electron mobilities of up to 10 cm2 V-1 s-1. We also demonstrate the tuneability of doping to p-type transport with hole mobilities of 50 cm2 V-1 s-1 after annealing in air. n-Doping has been attributed to the presence of Zn adatoms on the WSe2 flakes as revealed by X-ray photoelectron spectroscopy (XPS), spatially resolved time of flight secondary ion mass spectroscopy (SIMS) and angular dark-field scanning transmission electron microscopy (AD-STEM) characterization of WSe2 flakes. Monolayer WSe2 flakes exhibit a sharp photoluminescence (PL) peak at room temperature and highly uniform emission across the entire flake area, indicating a high degree of crystallinity of the material. This work provides new insight into the synthesis of TMDs with charge carrier control, to pave the way towards post-silicon electronics.

Selective Electron Beam Patterning of Oxygen-Doped WSe2 for Seamless Lateral Junction Transistors

Surface charge transfer doping (SCTD) using oxygen plasma to form a p-type dopant oxide layer on transition metal dichalcogenide (TMDs) is a promising doping technique for 2D TMDs field-effect transistors (FETs). However, patternability of SCTD is a key challenge to effectively switch FETs. Herein, a simple method to selectively pattern degenerately p-type (p⁺ )-doped WSe₂ FETs via electron beam (e-beam) irradiation is reported. The effect of the selective e-beam irradiation is confirmed by the gate-tunable optical responses of seamless lateral p⁺ -p diodes. The OFF state of the devices by inducing trapped charges via selective e-beam irradiation onto a desired channel area in p⁺ -doped WSe₂ , which is in sharp contrast to globally p⁺ -doped WSe₂ FETs, is realized. Selective e-beam irradiation of the PMMA-passivated p⁺ -WSe₂ enables accurate control of the threshold voltage (V_th ) of WSe₂ devices by varying the pattern size and e-beam dose, while preserving the low contact resistance. By utilizing hBN as the gate dielectric, high-performance WSe₂ p-FETs with a saturation current of -280 µA µm^-1 and on/off ratio of 10⁹ are achieved. This study's technique demonstrates a facile approach to obtain high-performance TMD p-FETs by e-beam irradiation, enabling efficient switching and patternability toward various junction devices.

Recent Progress in 1D Contacts for 2D-Material-Based Devices

Recent studies have intensively examined 2D materials (2DMs) as promising materials for use in future quantum devices due to their atomic thinness. However, a major limitation occurs when 2DMs are in contact with metals: a van der Waals (vdW) gap is generated at the 2DM-metal interfaces, which induces metal-induced gap states that are responsible for an uncontrollable Schottky barrier (SB), Fermi-level pinning (FLP), and high contact resistance (R_C ), thereby substantially lowering the electronic mobility of 2DM-based devices. Here, vdW-gap-free 1D edge contact is reviewed for use in 2D devices with substantially suppressed carrier scattering of 2DMs with hexagonal boron nitride (hBN) encapsulation. The 1D contact further enables uniform carrier transport across multilayered 2DM channels, high-density transistor integration independent of scaling, and the fabrication of double-gate transistors suitable for demonstrating unique quantum phenomena of 2DMs. The existing 1D contact methods are reviewed first. As a promising technology toward the large-scale production of 2D devices, seamless lateral contacts are reviewed in detail. The electronic, optoelectronic, and quantum devices developed via 1D contacts are subsequently discussed. Finally, the challenges regarding the reliability of 1D contacts are addressed, followed by an outlook of 1D contact methods.

P-type electrical contacts for two-dimensional transition metal dichalcogenides

Digital logic circuits are based on complementary pairs of n- and p-type field effect transistors (FETs) via complementary metal oxide semiconductor (CMOS) technology. In three dimensional (3D or bulk) semiconductors, substitutional doping of acceptor or donor impurities is used to achieve p- and n-type FETs. However, the controllable p-type doping of low-dimensional semiconductors such as two-dimensional transition metal dichalcogenides (2D TMDs) has proved to be challenging. Although it is possible to achieve high quality, low resistance n-type van der Waals (vdW) contacts on 2D TMDs^1-5, obtaining p-type devices from evaporating high work function metals onto 2D TMDs has not been realised so far. Here we report high-performance p-type devices on single and few-layered molybdenum disulphide (MoS₂) and tungsten diselenide (WSe₂) based on industry-compatible electron beam evaporation of high work function metals such as Pd and Pt. Using atomic resolution imaging and spectroscopy, we demonstrate near ideal vdW interfaces without chemical interactions between the 2D TMDs and 3D metals. Electronic transport measurements reveal that the Fermi level is unpinned and p-type FETs based on vdW contacts exhibit low contact resistance of 3.3 kΩ·µm, high mobility values of ~ 190 cm²-V^-1s^-1 at room temperature with saturation currents in excess of > 10^-5 Amperes per micron (A-μm^-1) and on/off ratio of 10⁷. We also demonstrate an ultra-thin photovoltaic cell based on n- and p-type vdW contacts with an open circuit voltage of 0.6 V and power conversion efficiency of 0.82%.

High-Efficiency WSe2 Photovoltaic Devices with Electron-Selective Contacts

A rapid surge in global energy consumption has led to a greater demand for renewable energy to overcome energy resource limitations and environmental problems. Recently, a number of van der Waals materials have been highlighted as efficient absorbers for very thin and highly efficient photovoltaic (PV) devices. Despite the predicted potential, achieving power conversion efficiencies (PCEs) above 5% in PV devices based on van der Waals materials has been challenging. Here, we demonstrate a vertical WSe₂ PV device with a high PCE of 5.44% under one-sun AM1.5G illumination. We reveal the multifunctional nature of a tungsten oxide layer, which promotes a stronger internal electric field by overcoming limitations imposed by the Fermi-level pinning at WSe₂ interfaces and acts as an electron-selective contact in combination with monolayer graphene. Together with the developed bottom contact scheme, this simple yet effective contact engineering method improves the PCE by more than five times.

Recessed-Channel WSe2 Field-Effect Transistor via Self-Terminated Doping and Layer-by-Layer Etching

Effective channel control with low contact resistance can be accomplished through selective ion implantation in Si and III-V semiconductor technologies; however, this approach cannot be adopted for ultrathin van der Waals materials. Herein, we demonstrate a self-aligned fabrication process based on self-terminated p-doping and layer-by-layer chemical etching to achieve low contact resistance as well as a high on/off current ratio in ultrathin tungsten diselenide (WSe₂) field-effect transistors (FETs). Damage-free layer-by-layer thinning of the WSe₂ channel is repeated up to a thickness of approximately 1.4 nm, while maintaining the selectively p-doped source/drain regions. The device characteristics of the recessed-channel WSe₂ FET are systematically monitored during this layer-by-layer recess-channel process. The WSe₂ etching rate is estimated to be 2-3 layers per cycle of oxidation and subsequent chemical etching. The self-terminated tungsten oxide (WO_X) layer grown through ultraviolet-ozone treatment induces robust p-doping in the neighboring (or underlying) WSe₂ through the electron withdrawal mechanism, which remains in the source/drain regions after channel oxide removal. The adopted self-terminated and self-aligned recess-channel process for ultrathin WSe₂ FETs enables the realization of a high on/off output current ratio (>10⁸) and field-effect mobility (∼190 cm²/V·s), while maintaining low contact resistance (0.9-6.1 kΩ·μm) without a postannealing process. The proposed facile and reproducible doping and atomic-layer-etching method for the fabrication of a recessed-channel FET with an ultrathin body can be helpful for high-performance two-dimensional semiconductor devices and is applicable to post-Si complementary metal-oxide semiconductor devices.

Morphotaxy of Layered van der Waals Materials

Layered van der Waals (vdW) materials have attracted significant attention due to their materials properties that can enhance diverse applications including next-generation computing, biomedical devices, and energy conversion and storage technologies. This class of materials is typically studied in the two-dimensional (2D) limit by growing them directly on bulk substrates or exfoliating them from parent layered crystals to obtain single or few layers that preserve the original bonding. However, these vdW materials can also function as a platform for obtaining additional phases of matter at the nanoscale. Here, we introduce and review a synthesis paradigm, morphotaxy, where low-dimensional materials are realized by using the shape of an initial nanoscale precursor to template growth or chemical conversion. Using morphotaxy, diverse non-vdW materials such as HfO₂ or InF₃ can be synthesized in ultrathin form by changing the composition but preserving the shape of the original 2D layered material. Morphotaxy can also enable diverse atomically precise heterojunctions and other exotic structures such as Janus materials. Using this morphotaxial approach, the family of low-dimensional materials can be substantially expanded, thus creating vast possibilities for future fundamental studies and applied technologies.

Performance Enhancement of SnS/h-BN Heterostructure p-Type FET via the Thermodynamically Predicted Surface Oxide Conversion Method

Searching for the counterpart of well-developed two-dimensional (2D) n-type field effect transistors (FETs) is indispensable for complementary logic circuit applications for 2D devices. Although SnS is regarded as a potential candidate for high-performance p-type FETs, recent experiments only show poor results deviating from the theoretically predicted high mobility. In this research, the serious performance degradation due to the surface oxidation of SnS, which commonly occurs in most 2D materials, is addressed through surface oxide conversion using highly reactive Ti. In this conversion process, which is confirmed by systematic characterization, the reduction of SnS surface oxide is accompanied by the formation of functional titanium oxide, which works as both a conductive intermediate layer to improve the contact property and a buffer layer of the high-k top gate insulator at the channel region. Consequently, a record-high field effect mobility of 87.4 cm² V^-1 s^-1 in SnS p-type FETs is achieved. The surface oxide conversion method applied here is consistent with our previous thermodynamic prediction, and this novel technique can be widely introduced to all 2D materials that are vulnerable to oxidation and facilitate the future development of 2D devices.

Fermi Level Pinning Dependent 2D Semiconductor Devices: Challenges and Prospects

Motivated by the high expectation for efficient electrostatic modulation of charge transport at very low voltages, atomically thin 2D materials with a range of bandgaps are investigated extensively for use in future semiconductor devices. However, researchers face formidable challenges in 2D device processing mainly originated from the out-of-plane van der Waals (vdW) structure of ultrathin 2D materials. As major challenges, untunable Schottky barrier height and the corresponding strong Fermi level pinning (FLP) at metal interfaces are observed unexpectedly with 2D vdW materials, giving rise to unmodulated semiconductor polarity, high contact resistance, and lowered device mobility. Here, FLP observed from recently developed 2D semiconductor devices is addressed differently from those observed from conventional semiconductor devices. It is understood that the observed FLP is attributed to inefficient doping into 2D materials, vdW gap present at the metal interface, and hybridized compounds formed under contacting metals. To provide readers with practical guidelines for the design of 2D devices, the impact of FLP occurring in 2D semiconductor devices is further reviewed by exploring various origins responsible for the FLP, effects of FLP on 2D device performances, and methods for improving metallic contact to 2D materials.

Thermodynamic Perspective on the Oxidation of Layered Materials and Surface Oxide Amelioration in 2D Devices

Surface oxidation is an unneglectable problem for 2D semiconductors because it hinders the practical application of 2D material-based devices. In this research, the oxidation of layered materials is investigated by a thermodynamic approach to verify their oxidation tendency. It was found that almost all 2D materials are thermodynamically unstable in the presence of oxygen at room temperature. Two potential solutions for surface oxidation are proposed in this work: (i) the conversion of the surface oxides to functional oxides through the deposition of active metals and (ii) the recovery of original 2D materials from the surface oxides by 2D material heterostructure formation with the same chalcogen group. Supported by thermodynamic calculations, both approaches are feasible to ameliorate the surface oxides of 2D materials by the appropriate selection of metals for deposition or 2D materials for heterostructure formation. Thermodynamic data of 64 elements and 75 2D materials are included and compared in this research, which can improve gate insulator or electrode contact material selection in 2D devices to solve the surface oxidation issue. For instance, yttrium and titanium are good candidates for surface oxide conversion, while zirconium and hafnium chalcogenide can trigger the recovery of original 2D materials from their surface oxides. The systematic diagrams presented in this work can serve as a guideline for considering surface oxidation in future device fabrication from various 2D materials.

An Ultrafast WSe2 Photodiode Based on a Lateral p-i-n Homojunction

High-quality homogeneous junctions are of great significance for developing transition metal dichalcogenides (TMDs) based electronic and optoelectronic devices. Here, we demonstrate a lateral p-type/intrinsic/n-type (p-i-n) homojunction based multilayer WSe₂ diode. The photodiode is formed through selective doping, more specifically by utilizing self-aligning surface plasma treatment at the contact regions, while keeping the WSe₂ channel intrinsic. Electrical measurements of such a diode reveal an ideal rectifying behavior with a current on/off ratio as high as 1.2 × 10⁶ and an ideality factor of 1.14. While operating in the photovoltaic mode, the diode presents an excellent photodetecting performance under 450 nm light illumination, including an open-circuit voltage of 340 mV, a responsivity of 0.1 A W^-1, and a specific detectivity of 2.2 × 10¹³ Jones. Furthermore, benefiting from the lateral p-i-n configuration, the slow photoresponse dynamics including the photocarrier diffusion in undepleted regions and photocarrier trapping/detrapping due to dopants or doping process induced defect states are significantly suppressed. Consequently, a record-breaking response time of 264 ns and a 3 dB bandwidth of 1.9 MHz are realized, compared with the previously reported TMDs based photodetectors. The above-mentioned desirable properties, together with CMOS compatible processes, make this WSe₂ p-i-n junction diode promising for future applications in self-powered high-frequency weak signal photodetection.

Controlling Native Oxidation of HfS2 for 2D Materials Based Flash Memory and Artificial Synapse

Two-dimensional (2D) materials based artificial synapses are important building blocks for the brain-inspired computing systems that are promising in handling large amounts of informational data with high energy-efficiency in the future. However, 2D devices usually rely on deposited or transferred insulators as the dielectric layer, resulting in various challenges in device compatibility and fabrication complexity. Here, we demonstrate a controllable and reliable oxidation process to turn 2D semiconductor HfS₂ into native oxide, HfO_x, which shows good insulating property and clean interface with HfS₂. We then incorporate the HfO_x/HfS₂ heterostructure into a flash memory device, achieving a high on/off current ratio of ∼10⁵, a large memory window over 60 V, good endurance, and a long retention time over 10³ seconds. In particular, the memory device can work as an artificial synapse to emulate basic synaptic functions and feature good linearity and symmetry in conductance change during long-term potentiation/depression processes. A simulated artificial neural network based on our synaptic device achieves a high accuracy of ∼88% in MNIST pattern recognition. Our work provides a simple and effective approach for integrating high-k dielectrics into 2D material-based memory and synaptic devices.

Satisfiability Attack-Resistant Camouflaged Two-Dimensional Heterostructure Devices

Reverse engineering (RE) is one of the major security threats to the semiconductor industry due to the involvement of untrustworthy parties in an increasingly globalized chip manufacturing supply chain. RE efforts have already been successful in extracting device level functionalities from an integrated circuit (IC) with very limited resources. Camouflaging is an obfuscation method that can thwart such RE. Existing work on IC camouflaging primarily involves transformable interconnects and/or covert gates where variation in doping and dummy contacts hide the circuit structure or build cells that look alike but have different functionalities. Emerging solutions, such as polymorphic gates based on a giant spin Hall effect and Si nanowire field effect transistors (FETs), are also promising but add significant area overhead and are successfully decamouflaged by the satisfiability solver (SAT)-based RE techniques. Here, we harness the properties of two-dimensional (2D) transition-metal dichalcogenides (TMDs) including MoS₂, MoSe₂, MoTe₂, WS₂, and WSe₂ and their optically transparent transition-metal oxides (TMOs) to demonstrate area efficient camouflaging solutions that are resilient to SAT attack and automatic test pattern generation attacks. We show that resistors with resistance values differing by 5 orders of magnitude, diodes with variable turn-on voltages and reverse saturation currents, and FETs with adjustable conduction type, threshold voltages, and switching characteristics can be optically camouflaged to look exactly similar by engineering TMO/TMD heterostructures, allowing hardware obfuscation of both digital and analog circuits. Since this 2D heterostructure devices family is intrinsically camouflaged, NAND/NOR/AND/OR gates in the circuit can be obfuscated with significantly less area overhead, allowing 100% logic obfuscation compared to only 5% for complementary metal oxide semiconductor (CMOS)-based camouflaging. Finally, we demonstrate that the largest benchmarking circuit from ISCAS'85, comprised of more than 4000 logic gates when obfuscated with the CMOS-based technique, is successfully decamouflaged by SAT attack in <40 min; whereas, it renders to be invulnerable even in more than 10 h when camouflaged with 2D heterostructure devices, thereby corroborating our hypothesis of high resilience against RE. Our approach of connecting material properties to innovative devices to secure circuits can be considered as a one of a kind demonstration, highlighting the benefits of cross-layer optimization.

Directly visualizing carrier transport and recombination at individual defects within 2D semiconductors

Two-dimensional semiconductors (2DSCs) are promising materials for a wide range of optoelectronic applications. While the fabrication of 2DSCs with thicknesses down to the monolayer limit has been demonstrated through a variety of routes, a robust understanding of carrier transport within these materials is needed to guide the rational design of improved practical devices. In particular, the influence of different types of structural defects on transport is critical, but difficult to interrogate experimentally. Here, a new approach to visualizing carrier transport within 2DSCs, Carrier Generation-Tip Collection Scanning Electrochemical Cell Microscopy (CG-TC SECCM), is described which is capable of providing information at the single-defect level. In this approach, carriers are locally generated within a material using a focused light source and detected as they drive photoelectrochemical reactions at a spatially-offset electrolyte interface created through contact with a pipet-based probe, allowing carrier transport across well-defined, µm-scale paths within a material to be directly interrogated. The efficacy of this approach is demonstrated through studies of minority carrier transport within mechanically-exfoliated n-type WSe2 nanosheets. CG-TC SECCM imaging experiments carried out within pristine basal planes revealed highly anisotropic hole transport, with in-plane and out-of-plane hole diffusion lengths of 2.8 µm and 5.8 nm, respectively. Experiments were also carried out to probe recombination across individual step edge defects within n-WSe2 which suggest a significant surface charge (∼5 mC m-2) exists at these defects, significantly influencing carrier transport. Together, these studies demonstrate a powerful new approach to visualizing carrier transport and recombination within 2DSCs, down to the single-defect level.

High Current Density in Monolayer MoS2 Doped by AlOx

Semiconductors require stable doping for applications in transistors, optoelectronics, and thermoelectrics. However, this has been challenging for two-dimensional (2D) materials, where existing approaches are either incompatible with conventional semiconductor processing or introduce time-dependent, hysteretic behavior. Here we show that low-temperature (<200 °C) substoichiometric AlO_x provides a stable n-doping layer for monolayer MoS₂, compatible with circuit integration. This approach achieves carrier densities >2 × 10¹³ cm^-2, sheet resistance as low as ∼7 kΩ/□, and good contact resistance ∼480 Ω·μm in transistors from monolayer MoS₂ grown by chemical vapor deposition. We also reach record current density of nearly 700 μA/μm (>110 MA/cm²) along this three-atom-thick semiconductor while preserving transistor on/off current ratio >10⁶. The maximum current is ultimately limited by self-heating (SH) and could exceed 1 mA/μm with better device heat sinking. With their 0.1 nA/μm off-current, such doped MoS₂ devices approach several low-power transistor metrics required by the international technology roadmap.

Selective p-Doping of 2D WSe2 via UV/Ozone Treatments and Its Application in Field-Effect Transistors

Development of two-dimensional (2D) semiconductor devices with good Ohmic contact is essential to utilize their full potential for nanoelectronics applications. Among the methods that have been introduced to reduce the Schottky barrier in 2D material-based electronic devices, charge transfer doping has attracted significant interest because of its efficiency, simplicity, and compatibility with the microelectronic fabrication process. In this study, 2D WSe₂-based field-effect transistors (FETs) were subjected to selective UV/ozone treatment to improve the Ohmic contact by forming WO_X with a high work function, which induced hole doping in the neighboring WSe₂ via electron transfer. The atomic force microscopy, cross-sectional transmission electron microscopy, and micro-Raman spectroscopy analyses confirmed the self-limiting formation of WO_X while maintaining the crystallinity of the underlying WSe₂. The channel layer of the back-gated 2D WSe₂ FETs was encapsulated using 2D hexagonal boron nitride to prevent the UV/ozone-induced oxidation. By contrast, the regions that were in contact with the underlying metal electrodes were open, which allowed area-selective p-doping in the 2D WSe₂. Our study demonstrated that the Ohmic-like behaviors obtained after area-selective UV/ozone treatment improved the electrical properties of the 2D WSe₂-based FETs such as the field-effect mobility (improvement of 3-4 orders of magnitude) and current on/off ratio (improvement of five orders of magnitude), while maintaining the p-type normally-off characteristics. These results provide useful insights into an effective and facile method to reduce contact resistance in 2D semiconductor materials, thereby enhancing the electrical performances of 2D material-based electronic devices.

Ab-initio investigation of preferential triangular self-formation of oxide heterostructures of monolayer [Formula: see text]

Triangular growth patterns of pristine two-dimensional (2D) transition metal dichalcogenides (TMDs) are ubiquitous in experiments. Here, we use first-principles calculations to investigate the growth of triangular shaped oxide islands upon layer-by-layer controlled oxidation in monolayer and few-layer [Formula: see text] systems. Pristine 2D TMDs with a trigonal prismatic geometry prefer the triangular growth morphology due to structural stability arising from the edge chalcogen atoms along its three sides. Our ab-initio energetics and thermodynamic study show that, since the Se atoms are more susceptible to oxygen replacement, the preferential oxidation happens along the Se zigzag lines, producing triangular islands of transition metal oxides. The thermodynamic stability arising from the preferential triangular self-formation of TMD based oxide heterostructures and their electronic properties opens a new avenue for their exploration in advanced electronic and optoelectronic devices.

Melt Blown Fiber-Assisted Solvent-Free Device Fabrication at Low-Temperature

In this paper, we propose a solvent-free device fabrication method using a melt-blown (MB) fiber to minimize potential chemical and thermal damages to transition-metal-dichalcogenides (TMDCs)-based semiconductor channel. The fabrication process is composed of three steps; (1) MB fibers alignment as a shadow mask, (2) metal deposition, and (3) lifting-up MB fibers. The resulting WSe₂-based p-type metal-oxide-semiconductor (PMOS) device shows an ON/OFF current ratio of ~2 × 10⁵ (ON current of ~-40 µA) and a remarkable linear hole mobility of ~205 cm²/V·s at a drain voltage of -0.1 V. These results can be a strong evidence supporting that this MB fiber-assisted device fabrication can effectively suppress materials damage by minimizing chemical and thermal exposures. Followed by an MoS₂-based n-type MOS (NMOS) device demonstration, a complementary MOS (CMOS) inverter circuit application was successfully implemented, consisted of an MoS₂ NMOS and a WSe₂ PMOS as a load and a driver transistor, respectively. This MB fiber-based device fabrication can be a promising method for future electronics based on chemically reactive or thermally vulnerable materials.

All 2D Heterostructure Tunnel Field-Effect Transistors: Impact of Band Alignment and Heterointerface Quality

Van der Waals heterostructures are the ideal material platform for tunnel field-effect transistors (TFETs) because a band-to-band tunneling (BTBT) dominant current is feasible at room temperature (RT) because of ideal, dangling bond-free heterointerfaces. However, achieving subthreshold swing (SS) values lower than 60 mV dec^-1 of the Boltzmann limit is still challenging. In this work, we systematically studied the band alignment and heterointerface quality in n-MoS₂ channel heterostructure TFETs. By selecting a p⁺-MoS₂ source with a sufficiently high doping level, stable gate modulation to a type III band alignment was achieved regardless of the number of MoS₂ channel layers. For the gate stack formation, it was found that the deposition of Al₂O₃ as the top gate introduces defect states for the generation current under reverse bias, while the integration of a hexagonal boron nitride (h-BN) top gate provides a defect-free, clean interface, resulting in the BTBT dominant current even at RT. All 2D heterostructure TFETs produced by combining the type III n-MoS₂/p⁺-MoS₂ heterostructure with the h-BN top-gate insulator resulted in low SS values at RT.

Thickness Trends of Electron and Hole Conduction and Contact Carrier Injection in Surface Charge Transfer Doped 2D Field Effect Transistors

One of the main limiting factors in the performance of devices based on two-dimensional (2D) materials is Fermi level pinning at the contacts, which creates Schottky barriers (SBs) that increase contact resistance and, for most transition metal dichalcogenides (TMDs), limit hole conduction. A promising method to mitigate these problems is surface charge transfer doping (SCTD), which places fixed charge at the surface of the material and thins the SBs by locally shifting the energy bands. We use a mild O₂ plasma to convert the top few layers of a given TMD into a substoichiometric oxide that serves as a p-type SCTD layer. A comprehensive experimental study, backed by TCAD simulations, involving MoS₂, MoSe₂, MoTe₂, WS₂, and WSe₂ flakes of various thicknesses exposed to different plasma times is used to investigate the underlying mechanisms responsible for SCTD. The surface charge at the top of the channel and the gate-modulated surface potential at the bottom are found to have competing effects on the channel potential, which results in a decrease in the doping-induced threshold shift and an increase in minimum OFF state current with increasing thickness. Additionally, an undoped channel region is shown to mitigate carrier injection issues in sufficiently thin flakes. Notably, the band movements underlying the SCTD effects are independent of the particular semiconductor material, SCTD strategy, and doping polarity. Consequently, our findings provide critical insights for the design of high-performance transistors for a wide range of materials and SCTD mechanisms including TMD devices with strong hole conduction.

Probing the Importance of Charge Balance and Noise Current in WSe2/WS2/MoS2 van der Waals Heterojunction Phototransistors by Selective Electrostatic Doping

Heterojunction structures using 2D materials are promising building blocks for electronic and optoelectronic devices. The limitations of conventional silicon photodetectors and energy devices are able to be overcome by exploiting quantum tunneling and adjusting charge balance in 2D p-n and n-n junctions. Enhanced photoresponsivity in 2D heterojunction devices can be obtained with WSe2 and BP as p-type semiconductors and MoS2 and WS2 as n-type semiconductors. In this study, the relationship between photocurrent and the charge balance of electrons and holes in van der Waals heterojunctions is investigated. To observe this phenomenon, a p-WSe2/n-WS2/n-MoS2 heterojunction device with both p-n and n-n junctions is fabricated. The device can modulate the charge carrier balance between heterojunction layers to generate photocurrent upon illumination by selectively applying electrostatic doping to a specific layer. Using photocurrent mapping, the operating transition zones for the device is demonstrated, allowing to accurately identify the locations where photocurrent generates. Finally, the origins of flicker and shot noise at the different semiconductor interfaces are analyzed to understand their effect on the photoresponsivity and detectivity of unit active area (2.5 µm2, λ = 405 nm) in the p-WSe2/n-WS2/n-MoS2 heterojunction device.

Self-Terminated Surface Monolayer Oxidation Induced Robust Degenerate Doping in MoTe2 for Low Contact Resistance

We introduce an effective method to degenerately dope MoTe₂ by oxidizing its surface into the p-dopant MoO_x in oxygen plasma. As a self-terminated process, the oxidation is restricted only in the very top layer, therefore offering us an easy and efficient control. The degenerate p-doping with the hole concentration of 2.5 × 10¹³ cm^-2 can be obtained by applying a ∼300 s O₂ plasma treatment. Using the degenerately doped MoTe₂, we demonstrate a record low contact resistance of 0.6 kΩ μm for MoTe₂. Our measurement highlights an excellent stability for the plasma-doped MoTe₂. The doped characteristics are robust with no significant degradation even after a one-year exposure to the air. The oxygen plasma doping technique is compatible with the conventional semiconductor processes, which can be utilized to realize high-performance MoTe₂ field-effect transistors (FETs) or tunnel FETs in the future.

Gate-Modulated Ultrasensitive Visible and Near-Infrared Photodetection of Oxygen Plasma-Treated WSe2 Lateral pn-Homojunctions

We investigate the development of gate-modulated tungsten diselenide (WSe₂)-based lateral pn-homojunctions for visible and near-infrared photodetector applications via an effective oxygen (O₂) plasma treatment. O₂ plasma acts to induce the p-type WSe₂ for the otherwise n-type WSe₂ by forming a tungsten oxide (WO_x) layer upon O₂ plasma treatment. The WSe₂ lateral pn-homojunctions displayed an enhanced photoresponse and resulted in open-circuit voltage (V_OC) and short-circuit current (I_SC) originating from the pn-junction formed after O₂ plasma treatment. We further notice that the amplitude of the photocurrent can be modulated by different gate biases. The fabricated WSe₂ pn-homojunctions exhibit greater photoresponse with photoresponsivities (ratio of the photocurrent and incident laser power) of 250 and 2000 mA/W, high external quantum efficiency values (%, total number of charge carriers generated for the number of incident photons on photodetectors) of 97 and 420%, and superior detectivity values (magnitude of detector sensitivity) of 7.7 × 10⁹ and 7.2 × 10¹⁰ Jones upon illumination with visible (520 nm) and near-infrared lasers (852 nm), respectively, at low bias (V_g = 0 V and V_d = 1 V) at room temperature, demonstrating very high-performance in the IR region superior to the contending two-dimensional material-based photonic devices. These superior optoelectronic properties are attributed to the junctions induced by O₂ plasma doping, which facilitate the effective carrier generation and separation of photocarriers with applied external drain bias upon strong light absorption.

P-type laser-doped WSe2/MoTe2 van der Waals heterostructure photodetector

Van der Waals heterostructures (vdWHs) based on two-dimensional (2D) materials are being studied extensively for their prospective applications in photodetectors. As the pristine WSe₂/MoTe₂ heterostructure is a type I (straddling gap) structure, it cannot be used as a photovoltaic device theoretically, although both WSe₂ and MoTe₂ have excellent photoelectric properties. The Fermi level of p-doped WSe₂ is close to its valence band. The p-doped WSe₂/MoTe₂ heterostructure can perform as a photovoltaic device because a built-in electric field appears at the interface between MoTe₂ and p-doped WSe₂. Here, a 633 nm laser was used for scanning the surface of WSe₂ in order to obtain the p-doped WSe₂. x-ray photoelectron spectroscopy (XPS) and electrical measurements verified that p-type doping in WSe₂ is produced through laser treatment. The p-type doping in WSe₂ includes substoichiometric WO_x and nonstoichiometric WSe_x. A photovoltaic device using p-doped WSe₂ and MoTe₂ was successfully fabricated. The band structure, light-matter reactions, and carrier-transport in the p-doped WSe₂/MoTe₂ heterojunction were analyzed. The results showed that this photodetector has an on/off ratio of ≈10⁴, dark current of ≈1 pA, and response time of 72 μs under the illumination of 633 nm laser at zero bias (V _ds = 0 V). The proposed p-doping method may provide a new approach to improve the performance of nanoscale optoelectronic devices.

Monolithic Interface Contact Engineering to Boost Optoelectronic Performances of 2D Semiconductor Photovoltaic Heterojunctions

In optoelectronic devices based on two-dimensional (2D) semiconductor heterojunctions, the efficient charge transport of photogenerated carriers across the interface is a critical factor to determine the device performances. Here, we report an unexplored approach to boost the optoelectronic device performances of the WSe₂-MoS₂ p-n heterojunctions via the monolithic-oxidation-induced doping and resultant modulation of the interface band alignment. In the proposed device, the atomically thin WO_x layer, which is directly formed by layer-by-layer oxidation of WSe₂, is used as a charge transport layer for promoting hole extraction. The use of the ultrathin oxide layer significantly enhanced the photoresponsivity of the WSe₂-MoS₂ p-n junction devices, and the power conversion efficiency increased from 0.7 to 5.0%, maintaining the response time. The enhanced characteristics can be understood by the formation of the low Schottky barrier and favorable interface band alignment, as confirmed by band alignment analyses and first-principle calculations. Our work suggests a new route to achieve interface contact engineering in the heterostructures toward realizing high-performance 2D optoelectronics.

Spatially controlled lateral heterostructures of graphene and transition metal dichalcogenides toward atomically thin and multi-functional electronics

Edge contacts between two-dimensional (2D) materials in the in-plane direction can achieve minimal contact area and low contact resistance, producing atomically thin devices with improved performance. Particularly, lateral heterojunctions of metallic graphene and semiconducting transition metal dichalcogenides (TMDs) exhibit small Schottky barrier heights due to graphene's low work-function. However, issues exist with the fabrication of highly transparent and flexible multi-functional devices utilizing lateral heterostructures (HSs) of graphene and TMDs via spatially controlled growth. This review demonstrates the growth and electronic applications of lateral HSs of graphene and TMDs, highlighting key technologies controlling the wafer-scale growth of continuous films for practical applications. It deepens the understanding of the spatially controlled growth of lateral HSs using chemical vapor deposition methods, and also contributes to the applications that depend on the scale-up of all-2D electronics with ultra-high electrical performance.

Graphene-Transition Metal Dichalcogenide Heterojunctions for Scalable and Low-Power Complementary Integrated Circuits

The most pressing barrier for the development of advanced electronics based on two-dimensional (2D) layered semiconductors stems from the lack of site-selective synthesis of complementary n- and p-channels with low contact resistance. Here, we report an in-plane epitaxial route for the growth of interlaced 2D semiconductor monolayers using chemical vapor deposition with a gas-confined scheme, in which patterned graphene (Gr) serves as a guiding template for site-selective growth of Gr-WS₂-Gr and Gr-WSe₂-Gr heterostructures. The Gr/2D semiconductor interface exhibits a transparent contact with a nearly ideal pinning factor of 0.95 for the n-channel WS₂ and 0.92 for the p-channel WSe₂. The effective depinning of the Fermi level gives an ultralow contact resistance of 0.75 and 1.20 kΩ·μm for WS₂ and WSe₂, respectively. Integrated logic circuits including inverter, NAND gate, static random access memory, and five-stage ring oscillator are constructed using the complementary Gr-WS₂-Gr-WSe₂-Gr heterojunctions as a fundamental building block, featuring the prominent performance metrics of high operation frequency (>0.2 GHz), low-power consumption, large noise margins, and high operational stability. The technology presented here provides a speculative look at the electronic circuitry built on atomic-scale semiconductors in the near future.

All WSe2 1T1R resistive RAM cell for future monolithic 3D embedded memory integration

3D monolithic integration of logic and memory has been the most sought after solution to surpass the Von Neumann bottleneck, for which a low-temperature processed material system becomes inevitable. Two-dimensional materials, with their excellent electrical properties and low thermal budget are potential candidates. Here, we demonstrate a low-temperature hybrid co-integration of one-transistor-one-resistor memory cell, comprising a surface functionalized 2D WSe₂p-FET, with a solution-processed WSe₂ Resistive Random Access Memory. The employed plasma oxidation technique results in a low Schottky barrier height of 25 meV with a mobility of 230 cm² V⁻¹ s⁻¹, leading to a 100x performance enhanced WSe₂p-FET, while the defective WSe₂ Resistive Random Access Memory exhibits a switching energy of 2.6 pJ per bit. Furthermore, guided by our device-circuit modelling, we propose vertically stacked channel FETs for high-density sub-0.01 μm² memory cells, offering a new beyond-Si solution to enable 3-D embedded memories for future computing systems.

Designing efficient, scalable and low-thermal-budget 2D Materials for 3D integration remains a challenge. Here, the authors report the development of a hybrid-(solution-processed-exfoliated) integration of 2D Material based 1T1R which uses a multilayer WSe₂p-FET and a multilayer printed WSe₂ RRAM.

Intimate Ohmic contact to two-dimensional WSe2 via thermal alloying

The most important interface in semiconductor devices is the interface between the semiconductor and the first layer of the metal contact. However, the van der Waals (vdWs) gap in two-dimensional (2D) materials hindered the formation of an intimate contact between the 2D material and the metal electrode, limiting the device performances. We demonstrated a gapless Ohmic contact to 2D WSe₂ by forming a Pt-W-Se alloy, which significantly improved the device performances (contact resistance, current on/off ratio, output current density, field-effect mobility, and hysteresis) of the 2D WSe₂ field-effect transistor. The contact resistance to 2D WSe₂ was reduced by more than seven orders of magnitude after thermal alloying. The disappearance of the vdW gap confirmed by scanning transmission electron microscopy enhanced the hole conduction and quenched the electron conduction. Our strategy of metallurgical alloying is effective to form a low-resistance stable Ohmic contact to WSe₂, which paves the way for utilization of the full potential of 2D materials.

Barrier Formation at the Contacts of Vanadium Dioxide and Transition-Metal Dichalcogenides

Phase-transition field-effect transistors (FETs) are a class of steep-slope devices that show abrupt on/off switching owing to the metal-insulator transition (MIT) induced in the contacting materials. An important avenue to develop phase-transition FETs is to understand the charge injection mechanism at the junction of the contacting MIT materials and semiconductor channels. Here, toward the realization of high-performance phase-transition FETs, we investigate the contact properties of heterojunctions between semiconducting transition-metal dichalcogenides (TMDCs) and vanadium dioxide (VO₂) that undergoes a MIT at a critical temperature (T_c) of approximately 340 K. We fabricated transistors based on molybdenum disulfide (MoS₂) and tungsten diselenide (WSe₂) in contact with the VO₂ source/drain electrodes. The VO₂-contacted MoS₂ transistor exhibited n-type transport both below and above T_c. Across the MIT, the on-current was observed to increase only by a factor of 5, in contrast to the order-of-magnitude change in the resistance of the VO₂ electrodes, suggesting the existence of high contact resistance. The Arrhenius analyses of the gate-dependent drain current confirmed the formation of the interfacial barrier at the VO₂/MoS₂ contacts, irrespective of the phase state of VO₂. The VO₂-contacted WSe₂ transistor showed ambipolar transport, indicating that the Fermi level lies near the mid gap of WSe₂. These observations provide insights into the contact properties of phase-transition FETs based on VO₂ and TMDCs and suggest the need for contact engineering for high-performance operations.

The device level modulation of carrier transport in a 2D WSe2 field effect transistor via a plasma treatment

Tungsten diselenide (WSe₂) has received significant attention because it shows the pristine ambipolar property arising from the Fermi level located near the midgap and can be converted to uni-polar form. In this study, we observe the formation of tungsten oxide (WO_x) on the WSe₂ surface after oxygen plasma treatment and show that the p-type WO_x dopes WSe₂. In our devices that underwent plasma treatment, it was interesting to find a strong correlation between the changes in the work function of WSe₂ and a gold electrode, and the channel and contact resistances. The channel resistance changes very sensitively at a rate of 64 meV per dec with the increase in the WSe₂ channel work function, which is close to the thermal limit; this indicates the defect-free oxidized WSe₂ channel. The carrier transport in the oxidized WSe₂ FET is shown to change to a high performance p-type device with greatly reduced channel and contact resistances with the increase in the plasma oxidation time.

Effect of Facile p-Doping on Electrical and Optoelectronic Characteristics of Ambipolar WSe2 Field-Effect Transistors

We investigated the electrical and optoelectronic characteristics of ambipolar WSe₂ field-effect transistors (FETs) via facile p-doping process during the thermal annealing in ambient. Through this annealing, the oxygen molecules were successfully doped into the WSe₂ surface, which ensured higher p-type conductivity and the shift of the transfer curve to the positive gate voltage direction. Besides, considerably improved photoswitching response characteristics of ambipolar WSe₂ FETs were achieved by the annealing in ambient. To explore the origin of the changes in electrical and optoelectronic properties, the analyses via X-ray photoelectron, Raman, and photoluminescence spectroscopies were performed. From these analyses, it turned out that WO₃ layers formed by the annealing in ambient introduced p-doping to ambipolar WSe₂ FETs, and disorders originated from the WO₃/WSe₂ interfaces acted as non-radiative recombination sites, leading to significantly improved photoswitching response time characteristics.

A homogeneous p-n junction diode by selective doping of few layer MoSe2 using ultraviolet ozone for high-performance photovoltaic devices

The realization of p-n homojunctions, which can be achieved via spatially controlled carrier-type modulation, remains a challenge for two-dimensional transition metal dichalcogenides. Here, we report an effective method to tune intrinsic n-type few-layer MoSe₂ to p-type through controlling precisely the ultraviolet-ozone treatment time, which can be attributed to the surface charge transfer from the underlying MoSe₂ to MoO_x (x < 3). The resulting hole mobility and concentration are ∼20.1 cm² V^-1 s^-1 and ∼1.9 × 10¹² cm^-2, respectively, and the on-off ratio is ∼10⁵, which are comparable to the values of pristine n-type MoSe₂. Moreover, the lateral p-n homojunction prepared by partially treating MoSe₂ displays a high rectification ratio of 2.4 × 10⁴, an ideality factor of 1.1, and a high photoresponsivity of 0.23 A W^-1 to the 633 nm laser at V_d = 0 V and V_g = 0 V due to the built-in potential in the p-n homojunction area. Our findings ensure the MoSe₂ p-n diode as a promising candidate for future low-power operating photodevices.

Band Structure Engineering of Layered WSe2 via One-Step Chemical Functionalization

Chemical functionalization is demonstrated to enhance the p-type electrical performance of two-dimensional (2D) layered tungsten diselenide (WSe₂) field-effect transistors (FETs) using a one-step dipping process in an aqueous solution of ammonium sulfide [(NH₄)₂S(aq)]. Molecularly resolved scanning tunneling microscopy and spectroscopy reveal that molecular adsorption on a monolayer WSe₂ surface induces a reduction of the electronic band gap from 2.1 to 1.1 eV and a Fermi level shift toward the WSe₂ valence band edge (VBE), consistent with an increase in the density of positive charge carriers. The mechanism of electronic transformation of WSe₂ by (NH₄)₂S(aq) chemical treatment is elucidated using density functional theory calculations which reveal that molecular "SH" adsorption on the WSe₂ surface introduces additional in-gap states near the VBE, thereby, inducing a Fermi level shift toward the VBE along with a reduction in the electronic band gap. As a result of the (NH₄)₂S(aq) chemical treatment, the p-branch ON-currents (I_ON) of back-gated few-layer ambipolar WSe₂ FETs are enhanced by about 2 orders of magnitude, and a ∼6× increase in the hole field-effect mobility is observed, the latter primarily resulting from the p-doping-induced narrowing of the Schottky barrier width leading to an enhanced hole injection at the WSe₂/contact metal interface. This (NH₄)₂S(aq) chemical functionalization technique can serve as a model method to control the electronic band structure and enhance the performance of devices based on 2D layered transition-metal dichalcogenides.

Room-Temperature Mesoscopic Fluctuations and Coulomb Drag in Multilayer WSe2

Mesoscopic fluctuations, manifesting the quantum interference (QI) of electrons, have been theoretically proposed in bilayer Coulomb drag systems. Unfortunately, these phenomena are usually observed at cryogenic temperatures, which severely limits their novel physics for pragmatic applications. In this paper, observation of room-temperature QI and Coulomb drag in a multilayer WSe₂ transistor is reported via graphene contacts separately at its top and bottom layers. The central layers of WSe₂ act as an insulating region with a width of few nanometers, which spatially separates the top and bottom conducting channels and provides a strong Coulomb interaction between them, leading to large conductance oscillations at room temperature. The gradual suppression of the oscillations with the increase in the applied magnetic field and/or injected current further confirms the QI phenomenon. With the decrease in temperature, the Coulomb drag effect is exhibited in the system owing to the increased thickness of the insulating region. This study reveals a novel approach for realization of advanced quantum electronics operating at high temperatures.