Adaptive logic circuits with doping-free ambipolar carbon nanotube transistors

Enhancement-Mode Ambipolar Thin-Film Transistors and CMOS Logic Circuits using Bilayer Ga2O3/NiO Semiconductors

Recent advancements in power electronics have been driven by Ga2O3-based ultrawide bandgap (UWBG) semiconductor devices, enabling efficient high-current switching. However, integrating Ga2O3 power devices with essential silicon CMOS logic circuits for advanced control poses fabrication challenges. Researchers have introduced Ga2O3-based NMOS and pseudo-CMOS circuits for integration, but these circuits may either consume more power or increase the design complexity. Hence, this article proposes Ga2O3-based CMOS realized using heterogeneous 3D-stacked bilayer ambipolar transistors. These ambipolar transistors consist of HfO2/NiO/Ga2O3/NiO/HfO2 heterostructures that are wrapped around by the Ti/Au gate electrode, resulting in record high electron and hole current on/off ratios of 109 and 107. The threshold voltage, subthreshold swing, and current density measured from 100 ambipolar devices (across 5 batches) are around -7.99 ± 0.92 V (p-channel) and 7.81 ± 0.81 V (n-channel), 0.59 ± 0.07 V/dec (p-channel) and 0.61 ± 0.06 V/dec (n-channel), and 0.99 ± 0.26 mA/mm (p-channel) and 58.23 ± 12.99 mA/mm (n-channel), respectively. All the 100 ambipolar devices showed decent long-term stability over a period of 200 days, exhibiting reliable electrical performance. The threshold voltage shift (ΔVTH) after negative bias stressing for a period of 3500 s is around 11.52 V (p-channel) and 10.21 V (n-channel), respectively. Notably, the n-channels exhibit ∼2 orders higher on/off ratio than the best Ga2O3 unipolar transistors at 300 °C. Moreover, the polarities of ambipolar transistors are reconfigurable into p- or n-MOS, which are integrated to demonstrate CMOS inverter, NOR, and NAND logic gates. The switching periods from "0" to "1" and from "1" to "0" of NOR are 0.12 and 0.17 μs, and those of NAND are 0.16 and 0.13 μs. This work lays the foundation of oxide-semiconductor-based CMOS for future integrated electronics.

Ambipolar 2D Semiconductors and Emerging Device Applications

With the rise of 2D materials, new physics and new processing techniques have emerged, triggering possibilities for the innovation of electronic and optoelectronic devices. Among them, ambipolar 2D semiconductors are of excellent gate-controlled capability and distinctive physical characteristic that the major charge carriers can be dynamically, reversibly and rapidly tuned between holes and electrons by electrostatic field. Based on such properties, novel devices, like ambipolar field-effect transistors, light-emitting transistors, electrostatic-field-charging PN diodes, are developed and show great advantages in logic and reconfigurable circuits, integrated optoelectronic circuits, and artificial neural network image sensors, enriching the functions of conventional devices and bringing breakthroughs to build new architectures. This review first focuses on the basic knowledge including fundamental principle of ambipolar semiconductors, basic material preparation techniques, and how to obtain the ambipolar behavior through electrical contact engineering. Then, the current ambipolar 2D semiconductors and their preparation approaches and main properties are summarized. Finally, the emerging new device structures are overviewed in detail, along with their novel electronic and optoelectronic applications. It is expected to shed light on the future development of ambipolar 2D semiconductors, exploring more new devices with novel functions and promoting the applications of 2D materials.

Ambipolar Charge Transport in Two-Dimensional WS2 Metal-Insulator-Semiconductor and Metal-Insulator-Semiconductor Field-Effect Transistors

Two-dimensional (2D) materials with ambipolar transport characteristics have attracted considerable attention as post-complementary metal-oxide semiconductor (CMOS) materials. These materials allow for electron- or hole-dominant conduction to be achieved in a single channel of the field-effect transistors (FETs) without an extrinsic doping. In this study, all-2D metal-insulator-semiconductor (MIS)-based devices, which were composed of all-2D graphene, hexagonal boron nitride, and WS₂, exhibited ambipolar and symmetrical transport characteristics with a low surface state density (D_it, min ≈ 7 × 10¹¹ cm^-2·eV^-1). Hole- or electron-dominant inversion under the influence of electrostatic doping was obtained in a WS₂-based 2D capacitor up to a frequency range of 1 MHz. n- and p-channel conductions with enhancement-mode operations were selectively realized in a single MISFET, which presented a current on/off ratio of >10⁶ and high field-effect mobility (μ_e = 58-67 cm²/V·s and μ_h = 19-30 cm²/V·s). Furthermore, a monolithic CMOS-like logic inverter, which employed a single WS₂ flake, exhibited a high gain of 78. These results can be used to reduce the footprints of the device architectures and simplify the device fabrication processes of next-generation CMOS integrated circuits.

Data on liquid gated CNT network FETs on flexible substrates

This article presents the raw and analyzed data from a set of experiments performed to study the role of junctions on the electrostatic gating of carbon nanotube (CNT) network field effect transistor (FET) aptasensors. It consists of the raw data used for the calculation of junction and bundle densities and describes the calculation of metallic content of the bundles. In addition, the data set consists of the electrical measurement data in a liquid gated environment for 119 different devices with four different CNT densities and summarizes their electrical properties. The data presented in this article are related to research article titled “Metallic-semiconducting junctions create sensing hot-spots in carbon nanotube FET aptasensors near percolation” (doi:10.1016/j.bios.2018.09.021) [1].

Mechanosensation-Active Matrix Based on Direct-Contact Tribotronic Planar Graphene Transistor Array

Mechanosensitive electronics aims at replicating the multifunctions of human skin to realize quantitative conversion of external stimuli into electronic signals and provide corresponding feedback instructions. Here, we report a mechanosensation-active matrix based on a direct-contact tribotronic planar graphene transistor array. Ion gel is utilized as both the dielectric in the graphene transistor and the friction layer for triboelectric potential coupling to achieve highly efficient gating and sensation properties. Different contact distances between the ion gel and other friction materials produce different triboelectric potentials, which are directly coupled to the graphene channel and lead to different output signals through modulating the Fermi level of graphene. Based on this mechanism, the tribotronic graphene transistor is capable of sensing approaching distances, recognizing the category of different materials, and even distinguishing voices. It possesses excellent sensing properties, including high sensitivity (0.16 mm^-1), fast response time (∼15 ms), and excellent durability (over 1000 cycles). Furthermore, the fabricated mechanosensation-active matrix is demonstrated to sense spatial contact distances and visualize a 2D color mapping of the target object. The tribotronic active matrix with ion gel as dielectric/friction layer provides a route for efficient and low-power-consuming mechanosensation in a noninvasive fashion. It is of great significance in multifunction sensory systems, wearable human-machine interactive interfaces, artificial electronic skin, and future telemedicine for patient surveillance.

Metallic-semiconducting junctions create sensing hot-spots in carbon nanotube FET aptasensors near percolation

Easily fabricated random network carbon nanotube field-effect transistors (CNT-FETs) have benefitted from improved separation techniques to deliver CNTs with current formulations providing at least 99% semiconducting tube content. Amongst the most promising applications of this device platform are electronic biosensors, where the network conduction is affected through tethered probes such as aptamers which act as molecular scale electrostatic gates. However, the prevailing assumption that these biosensor devices would be optimized if metallic tubes were entirely eliminated has not been examined. Here, we show that metallic-semiconducting junctions in aptasensors are sensing hotspots and that their impact on sensing is heightened by the CNT network's proximity to percolation. First, we use a biased conducting AFM tip to gate a CNT-FET at the nanoscale and demonstrate that the strongest device response occurs when gating at metallic-semiconducting junctions. Second, we resolve the target sensitivity of an aptasensor as a function of tube density and show heightened sensitivity at densities close to the percolation threshold. We find the strongest sensing response where the 1% of metallic tubes generate a high density of metallic-semiconducting junctions but cannot form a percolated metallic path across the network. These findings highlight the critical role of metallic tubes in CNT-FET biosensor devices and demonstrate that network composition is an important variable to boost the performance of electronic biosensors.

Single walled carbon nanotube/Si heterojunctions for high responsivity photodetectors

Single walled carbon nanotube/n-Si (SWCNT/n-Si) hetero-junctions have been obtained by depositing SWCNT ultra-thin films on the surface of an n-Si substrate by dry transfer method. The as obtained junctions are photo sensitive in the measured wavelength range (300-1000 nm) and show zero bias responsivity and detectivity values of the order of 1 A W^-1 and 10¹⁴ Jones respectively, which are higher than those previously observed in carbon based devices. Moreover, under on-off light excitation, the junctions show response speed as fast as 1 μs or better and noise equivalent powers comparable to commercial Si photomultipliers. Current-voltage measurements in dark and under illumination suggest that the devices consist of Schottky and semiconductor/semiconductor junctions both contributing to the fast and high responses observed.

An All-Solution-Based Hybrid CMOS-Like Quantum Dot/Carbon Nanotube Inverter

The development of low-cost, flexible electronic devices is subordinated to the advancement in solution-based and low-temperature-processable semiconducting materials, such as colloidal quantum dots (QDs) and single-walled carbon nanotubes (SWCNTs). Here, excellent compatibility of QDs and SWCNTs as a complementary pair of semiconducting materials for fabrication of high-performance complementary metal-oxide-semiconductor (CMOS)-like inverters is demonstrated. The n-type field effect transistors (FETs) based on I^- capped PbS QDs (V_th = 0.2 V, on/off = 10⁵ , S_S-th = 114 mV dec^-1 , µ_e = 0.22 cm² V^-1 s^-1 ) and the p-type FETs with tailored parameters based on low-density random network of SWCNTs (V_th = -0.2 V, on/off > 10⁵ , S_S-th = 63 mV dec^-1 , µ_h = 0.04 cm² V^-1 s^-1 ) are integrated on the same substrate in order to obtain high-performance hybrid inverters. The inverters operate in the sub-1 V range (0.9 V) and have high gain (76 V/V), large maximum-equal-criteria noise margins (80%), and peak power consumption of 3 nW, in combination with low hysteresis (10 mV).

Universal Selective Dispersion of Semiconducting Carbon Nanotubes from Commercial Sources Using a Supramolecular Polymer

Selective extraction of semiconducting carbon nanotubes is a key step in the production of high-performance, solution-processed electronics. Here, we describe the ability of a supramolecular sorting polymer to selectively disperse semiconducting carbon nanotubes from five commercial sources with diameters ranging from 0.7 to 2.2 nm. The sorting purity of the largest-diameter nanotubes (1.4 to 2.2 nm; from Tuball) was confirmed by short channel measurements to be 97.5%. Removing the sorting polymer by acid-induced disassembly increased the transistor mobility by 94 and 24% for medium-diameter and large-diameter carbon nanotubes, respectively. Among the tested single-walled nanotube sources, the highest transistor performance of 61 cm²/V·s and on/off ratio >10⁴ were realized with arc discharge carbon nanotubes with a diameter range from 1.2 to 1.7 nm. The length and quality of nanotubes sorted from different sources is compared using measurements from atomic force microscopy and Raman spectroscopy. The transistor mobility is found to correlate with the G/D ratio extracted from the Raman spectra.

Carbon nanotube radio-frequency electronics

Carbon nanotube (CNT) is considered a promising material for radio-frequency (RF) applications, owing to its high carrier mobility and saturated drift velocity, as well as ultra-small intrinsic gate capacitance. Here, we review progress on CNT-based devices and integrated circuits for RF applications, including theoretical projection of RF performance of CNT-based devices, preparation of CNT materials, fabrication, optimization of RF field-effect transistors (FETs) structures, and ambipolar FET-based RF applications, and we outline challenges and prospects of CNT-based RF applications.

High-Performance Complementary Transistors and Medium-Scale Integrated Circuits Based on Carbon Nanotube Thin Films

Solution-derived carbon nanotube (CNT) network films with high semiconducting purity are suitable materials for the wafer-scale fabrication of field-effect transistors (FETs) and integrated circuits (ICs). However, it is challenging to realize high-performance complementary metal-oxide semiconductor (CMOS) FETs with high yield and stability on such CNT network films, and this difficulty hinders the development of CNT-film-based ICs. In this work, we developed a doping-free process for the fabrication of CMOS FETs based on solution-processed CNT network films, in which the polarity of the FETs was controlled using Sc or Pd as the source/drain contacts to selectively inject carriers into the channels. The fabricated top-gated CMOS FETs showed high symmetry between the characteristics of n- and p-type devices and exhibited high-performance uniformity and excellent scalability down to a gate length of 1 μm. Many common types of CMOS ICs, including typical logic gates, sequential circuits, and arithmetic units, were constructed based on CNT films, and the fabricated ICs exhibited rail-to-rail outputs because of the high noise margin of CMOS circuits. In particular, 4-bit full adders consisting of 132 CMOS FETs were realized with 100% yield, thereby demonstrating that this CMOS technology shows the potential to advance the development of medium-scale CNT-network-film-based ICs.

Electronic properties and transistors of the NbS2-MoS2-NbS2 NR heterostructure

Based on density function theory and nonequilibrium Green's functions, we construct a NbS2-MoS2-NbS2 NR inplane heterostructure. The effects of channel length, width, chirality and vacancy of the heterostructure on transport properties are systematically investigated. The electron transport of the armchair-edge heterostructure device shows ballistic transport properties, while the zigzag-edge heterostructure device exhibits resonance tunneling transport properties. Further study indicates NbS2-MoS2-NbS2 field effect transistors (FETs) to be excellent ambipolar transistors. The FETs have high performances with current on/off ratio 4.7 × 105 and subthreshold swing 90 mV/decade with channel length m = 16 and width n = 6.  Increases in the channel length sharply reduce the off-state current and enhance the performance of the devices significantly.

Single-walled carbon nanotubes coated with ZnO by atomic layer deposition

The possibility of ZnO deposition on the surface of single-walled carbon nanotubes (SWCNTs) with the help of an atomic layer deposition (ALD) technique was successfully demonstrated. The utilization of pristine SWCNTs as a support resulted in a non-uniform deposition of ZnO in the form of nanoparticles. To achieve uniform ZnO coating, the SWCNTs first needed to be functionalized by treating the samples in a controlled ozone atmosphere. The uniformly ZnO coated SWCNTs were used to fabricate UV sensing devices. An UV irradiation of the ZnO coated samples turned them from hydrophobic to hydrophilic behaviour. Furthermore, thin films of the ZnO coated SWCNTs allowed us switch p-type field effect transistors made of pristine SWCNTs to have ambipolar characteristics.

Reconfigurable van der Waals Heterostructured Devices with Metal-Insulator Transition

Atomically thin two-dimensional (2D) materials range from semimetallic graphene to insulating hexagonal boron nitride to semiconducting transition-metal dichalcogenides. Recently, metal-insulator-semiconductor field effect transistors built from these 2D elements were studied for flexible and transparent electronics. However, to induce ambipolar characteristics for alternative power-efficient circuitry, ion-gel gating is often employed for high capacitive coupling, limiting stable operation at ambient conditions. Here, we report reconfigurable MoTe₂ optoelectronic transistors with all 2D components, where the device can be reconfigured by both drain and gate voltages. Eight different configurations for each fixed voltage are spatially resolved by scanning photocurrent microscopy. In addition, metal-insulator transitions are observed in both electron and hole carriers under 2 V due to strong Coulomb interaction in the system. Furthermore, the vertical tunneling photocurrent through multiple van der Waals layers between the gate and source contacts is measured. Our reconfigurable devices offer potential building blocks for system-on-a-chip optoelectronics.

Orthogonal Ambipolar Semiconductor Nanostructures for Complementary Logic Gates

We report orthogonal ambipolar semiconductors that exhibit hole and electron transport in perpendicular directions based on aligned films of nanocrystalline "shish-kebabs" containing poly(3-hexylthiophene) (P3HT) and N,N'-di-n-octyl-3,4,9,10-perylenetetracarboxylic diimide (PDI) as p- and n-type components, respectively. Polarized optical microscopy, scanning electron microscopy, and X-ray diffraction measurements reveal a high degree of in-plane alignment. Relying on the orientation of interdigitated electrodes to enable efficient charge transport from either the respective p- or n-channel materials, we demonstrate semiconductor films with high anisotropy in the sign of charge carriers. Films of these aligned crystalline semiconductors were used to fabricate complementary inverter devices, which exhibited good switching behavior and a high noise margin of 80% of 1/2 Vdd. Moreover, complementary "NAND" and "NOR" logic gates were fabricated and found to exhibit excellent voltage transfer characteristics and low static power consumption. The ability to optimize the performance of these devices, simply by adjusting the solution concentrations of P3HT and PDI, makes this a simple and versatile method for preparing ambipolar organic semiconductor devices and high-performance logic gates. Further, we demonstrate that this method can also be applied to mixtures of PDI with another conjugated polymer, poly[2,5-bis(3-tetradecylthiophen-2-yl)thieno[3,2-b]thiophene]) (PBTTT), with better hole transport characteristics than P3HT, opening the door to orthogonal ambipolar semiconductors with higher performance.

Sorting centimetre-long single-walled carbon nanotubes

While several approaches have been developed for sorting metallic (m) or semiconducting (s) single-walled carbon nanotubes (SWCNTs), the length of SWCNTs is limited within a micrometer, which restricts excellent electrical performances of SWCNTs for macro-scale applications. Here, we demonstrate a simple sorting method of centimetre-long aligned m- and s-SWCNTs. Ni particles were selectively and uniformly coated along the 1-cm-long m-SWCNTs by applying positive gate bias during electrochemical deposition with continuous electrolyte injection. To sort s-SWCNTs, the Ni coating was oxidized to form insulator outer for blocking of current flow through inner m-SWCNTs. Sorting of m-SWCNTs were demonstrated by selective etching of s-SWCNTs via oxygen plasma, while the protected m-SWCNTs by Ni coating remained intact. The series of source-drain pairs were patterned along the 1-cm-long sorted SWCNTs, which confirmed high on/off ratio of 10(4)-10(8) for s-SWCNTs and nearly 1 for m-SWCNTs.

Inkjet Printed Circuits on Flexible and Rigid Substrates Based on Ambipolar Carbon Nanotubes with High Operational Stability

Inkjet printed ambipolar transistors and circuits with high operational stability are demonstrated on flexible and rigid substrates employing semiconducting single-walled carbon nanotubes (SWCNTs). All patterns, which include electrodes, semiconductors, and vias, are realized by inkjet printing without the use of rigid physical masks and photolithography. An Al2O3 layer deposited on devices by atomic layer deposition (ALD) transforms p-type SWCNT thin-film transistors (TFTs) into ambipolar SWCNT TFTs and encapsulates them effectively. The ambipolar SWCNT TFTs have balanced electron and hole mobilities, which facilitates their use in multicomponent circuits. For example, a variety of logic gates and ring oscillators are demonstrated based on the ambipolar TFTs. The three-stage ring oscillator operates continuously for longer than 80 h under ambient conditions with only slight deviations in oscillation frequency. The successful demonstration of ambipolar devices by inkjet printing will enable a new class of circuits that utilize n-channel, p-channel, and ambipolar circuit components.

Reconfigurable Boolean logic using magnetic single-electron transistors

We propose a novel hybrid single-electron device for reprogrammable low-power logic operations, the magnetic single-electron transistor (MSET). The device consists of an aluminium single-electron transistor with a GaMnAs magnetic back-gate. Changing between different logic gate functions is realized by reorienting the magnetic moments of the magnetic layer, which induces a voltage shift on the Coulomb blockade oscillations of the MSET. We show that we can arbitrarily reprogram the function of the device from an n-type SET for in-plane magnetization of the GaMnAs layer to p-type SET for out-of-plane magnetization orientation. Moreover, we demonstrate a set of reprogrammable Boolean gates and its logical complement at the single device level. Finally, we propose two sets of reconfigurable binary gates using combinations of two MSETs in a pull-down network.

Highly stable carbon nanotube top-gate transistors with tunable threshold voltage

Carbon-nanotube top-gate transistors with fluorinated dielectrics are presented. With PTrFE as the dielectric, the devices have absent or small hysteresis at different sweep rates and excellent bias-stress stability under ambient conditions. Ambipolar single-walled carbon nanotube (SWNT) transistors are observed when P(VDF-TrFE-CTFE) is utilized as a topgate dielectric. Furthermore, continuous tuning of the threshold voltages of both unipolar and ambipolar SWNT thin-film transistors (TFTs) is demonstrated for the first time.

Carbon nanotubes and graphene towards soft electronics

Although silicon technology has been the main driving force for miniaturizing device dimensions to improve cost and performance, the current application of Si to soft electronics (flexible and stretchable electronics) is limited due to material rigidity. As a result, various prospective materials have been proposed to overcome the rigidity of conventional Si technology. In particular, nano-carbon materials such as carbon nanotubes (CNTs) and graphene are promising due to outstanding elastic properties as well as an excellent combination of electronic, optoelectronic, and thermal properties compared to conventional rigid silicon. The uniqueness of these nano-carbon materials has opened new possibilities for soft electronics, which is another technological trend in the market. This review covers the recent progress of soft electronics research based on CNTs and graphene. We discuss the strategies for soft electronics with nano-carbon materials and their preparation methods (growth and transfer techniques) to devices as well as the electrical characteristics of transparent conducting films (transparency and sheet resistance) and device performances in field effect transistor (FET) (structure, carrier type, on/off ratio, and mobility). In addition to discussing state of the art performance metrics, we also attempt to clarify trade-off issues and methods to control the trade-off on/off versus mobility). We further demonstrate accomplishments of the CNT network in flexible integrated circuits on plastic substrates that have attractive characteristics. A future research direction is also proposed to overcome current technological obstacles necessary to realize commercially feasible soft electronics.

Outlook and emerging semiconducting materials for ambipolar transistors

Ambipolar or bipolar transistors are transistors in which both holes and electrons are mobile inside the conducting channel. This device allows switching among several states: the hole-dominated on-state, the off-state, and the electron-dominated on-state. In the past year, it has attracted great interest in exotic semiconductors, such as organic semiconductors, nanostructured materials, and carbon nanotubes. The ability to utilize both holes and electrons inside one device opens new possibilities for the development of more compact complementary metal-oxide semiconductor (CMOS) circuits, and new kinds of optoelectronic device, namely, ambipolar light-emitting transistors. This progress report highlights the recent progresses in the field of ambipolar transistors, both from the fundamental physics and application viewpoints. Attention is devoted to the challenges that should be faced for the realization of ambipolar transistors with different material systems, beginning with the understanding of the importance of interface modification, which heavily affects injections and trapping of both holes and electrons. The recent development of advanced gating applications, including ionic liquid gating, that open up more possibility to realize ambipolar transport in materials in which one type of charge carrier is highly dominant is highlighted. Between the possible applications of ambipolar field-effect transistors, we focus on ambipolar light-emitting transistors. We put this new device in the framework of its prospective for general lightings, embedded displays, current-driven laser, as well as for photonics-electronics interconnection.

Photo-patternable ion gel-gated graphene transistors and inverters on plastic

We demonstrate photo-patternable ion gel-gated graphene transistors and inverters on plastic substrates. The photo-patternable ion gel can be used as a negative photoresist for the patterning of underlying graphene as well as gate dielectrics. As a result, an extra graphene-patterning step is not required, which simplifies the device fabrication and avoids a side effect arising from the photoresist residue. The high capacitance of ion gel gate dielectrics yielded a low voltage operation (~2 V) of the graphene transistor and inverter. The graphene transistors on plastic showed an on/off-current ratio of ~11.5, along with hole and electron mobilities of 852 ± 124 and 452 ± 98 cm(2) V(-1) s(-1), respectively. In addition, the flexible graphene inverter was successfully fabricated on plastic through the potential superposition effect from the drain bias. These devices show excellent mechanical flexibility and fatigue stability.

Aerosol jet printed, low voltage, electrolyte gated carbon nanotube ring oscillators with sub-5 μs stage delays

A central challenge for printed electronics is to achieve high operating frequencies (short transistor switching times) at low supply biases compatible with thin film batteries. In this report, we demonstrate partially printed five-stage ring oscillators with >20 kHz operating frequencies and stage delays <5 μs at supply voltages below 3 V. The fastest ring oscillator achieved 1.2 μs delay time at 2 V supply. The inverter stages in these ring oscillators were based on ambipolar thin film transistors (TFTs) employing semiconducting, single-walled carbon nanotube (CNT) networks and a high capacitance (∼1 μF/cm(2)) ion gel electrolyte as the gate dielectric. All materials except the source and drain electrodes were aerosol jet printed. The TFTs exhibited high electron and hole mobilities (∼20 cm(2)/(V s)) and ON/OFF current ratios (up to 10(5)). Inverter switching times t were systematically characterized as a function of transistor channel length and ionic conductivity of the gel dielectric, demonstrating that both the semiconductor and the ion gel play a role in switching speed. Quantitative scaling analysis suggests that with suitable optimization low voltage, printed ion gel gated CNT inverters could operate at frequencies on the order of 1 MHz.

A review of fabrication and applications of carbon nanotube film-based flexible electronics

Flexible electronics offer a wide-variety of applications such as flexible circuits, flexible displays, flexible solar cells, skin-like pressure sensors, and conformable RFID tags. Carbon nanotubes (CNTs) are a promising material for flexible electronics, both as the channel material in field-effect transistors (FETs) and as transparent electrodes, due to their high intrinsic carrier mobility, conductivity, and mechanical flexibility. In this feature article, we review the recent progress of CNTs in flexible electronics by describing both the processing and the applications of CNT-based flexible devices. To employ CNTs as the channel material in FETs, single-walled carbon nanotubes (SWNTs) are used. There are generally two methods of depositing SWNTs on flexible substrates-transferring CVD-grown SWNTs or solution-depositing SWNTs. Since CVD-grown SWNTs can be highly aligned, they often outperform solution-processed SWNT films that are typically in the form of random network. However, solution-based SWNTs can be printed at a large-scale and at low-cost, rendering them more appropriate for manufacturing. In either case, the removal of metallic SWNTs in an effective and a scalable manner is critical, which must still be developed and optimized. Nevertheless, promising results demonstrating SWNT-based flexible circuits, displays, RF-devices, and biochemical sensors have been reported by various research groups, proving insight into the exciting possibilities of SWNT-based FETs. In using carbon nanotubes as transparent electrodes (TEs), two main strategies have been implemented to fabricate highly conductive, transparent, and mechanically compliant films-superaligned films of CNTs drawn from vertically grown CNT forests using the "dry-drawing" technique and the deposition or embedding of CNTs onto flexible or stretchable substrates. The main challenge for CNT based TEs is to fabricate films that are both highly conductive and transparent. These CNT based TEs have been used in stretchable and flexible pressure, strain, and chemical and biological sensors. In addition, they have also been used as the anode and cathode in flexible light emitting diodes, solar cells, and supercapacitors. In summary, there are a number of challenges yet to overcome to optimize the processing and performance of CNT-based flexible electronics; nonetheless, CNTs remain a highly suitable candidate for various flexible electronic applications in the near future.

High performance ambipolar field-effect transistor of random network carbon nanotubes

Ambipolar field-effect transistors of random network carbon nanotubes are fabricated from an enriched dispersion utilizing a conjugated polymer as the selective purifying medium. The devices exhibit high mobility values for both holes and electrons (3 cm(2) /V·s) with a high on/off ratio (10(6) ). The performance demonstrates the effectiveness of this process to purify semiconducting nanotubes and to remove the residual polymer.

Coplanar-gate transparent graphene transistors and inverters on plastic

Transparent flexible graphene transistors and inverters in a coplanar-gate configuration were presented for the first time using only two materials: graphene and an ion gel gate dielectric. The novel device configuration simplifies device fabrication such that only two printing steps were required to fabricate transistors and inverters. The devices exhibited excellent device performances including low-voltage operation with a high transistor-on-current and mobility, excellent mechanical flexibility, environmental stability, and a reasonable inverting behavior upon connecting the two transistors.

Carbon nanotube field-effect transistors for use as pass transistors in integrated logic gates and full subtractor circuits

The use of carbon nanotube (CNT)-based field-effect transistors (FETs) as pass transistors is investigated. Logic gates are designed and constructed with these CNT FETs in the pass-transistor logic (PTL) style. Because two of the three terminals of every CNT FET are used as inputs, the efficiency per transistor in PTL circuits is significantly improved. With the PTL style, a single pair of FETS, one n-type and one p-type, is sufficient to construct high-performance AND or OR gates in which the measured output voltages are consistent with those quantitatively derived using the characteristics of the pair of the constituent n- and p-FETs. A one-bit full subtractor, which requires a total of 28 FETs to construct in the usual CMOS circuit, is realized on individual CNTs for the first time using the PTL style with only three pairs of n- and p-FETs.

CMOS-based carbon nanotube pass-transistor logic integrated circuits

Field-effect transistors based on carbon nanotubes have been shown to be faster and less energy consuming than their silicon counterparts. However, ensuring these advantages are maintained for integrated circuits is a challenge. Here we demonstrate that a significant reduction in the use of field-effect transistors can be achieved by constructing carbon nanotube-based integrated circuits based on a pass-transistor logic configuration, rather than a complementary metal-oxide semiconductor configuration. Logic gates are constructed on individual carbon nanotubes via a doping-free approach and with a single power supply at voltages as low as 0.4 V. The pass-transistor logic configurarion provides a significant simplification of the carbon nanotube-based circuit design, a higher potential circuit speed and a significant reduction in power consumption. In particular, a full adder, which requires a total of 28 field-effect transistors to construct in the usual complementary metal-oxide semiconductor circuit, uses only three pairs of n- and p-field-effect transistors in the pass-transistor logic configuration.

Purity-enhanced bulk synthesis of thin single-wall carbon nanotubes using iron-copper catalysts

We report high purity and high yield synthesis of single-wall carbon nanotubes (SWCNTs) of narrow diameter from iron-copper bimetal catalysts. The SWCNTs with diameter of 0.8-1.2 nm are synthesized using the zeolite-supported alcohol chemical vapour deposition method. Single metal and bimetal catalysts are systematically investigated to achieve both the enhancement of SWCNT yield and the suppression of the undesired formation of graphitic impurities. The relative yield and purity of SWCNTs are quantified using optical absorption spectroscopy with an ultracentrifuge-based purification technique. For the single metal catalyst, iron shows the highest catalytic activity compared with the other metals such as cobalt, nickel, molybdenum, copper, and platinum. It has been found that the addition of copper to iron results in the suppression of carbonaceous impurity formation without decreasing the SWCNT yield. The purity-enhanced SWCNT shows fairly low sheet resistance due to the improvement of inter-nanotube contacts. This scalable design of SWCNT synthesis with enhanced purity is therefore a promising tool for shaping future high performance devices.

Strategy for carrier control in carbon nanotube transistors

Carbon nanotubes exhibit remarkable mechanical and electronic properties and are, therefore, being regarded as a new functional material for next generation electronics. Nevertheless, several obstacles still exist for an application in industry. The control of carriers in carbon nanotubes is of critical importance prior to an industrial application in transistors. As carbon nanotubes exhibit p-type behavior under ambient conditions, it is difficult to convert them from a p- to an n-type transistor. Also, doping control is a critical issue for applying traditional CMOS technology. Here, we discuss various approaches for preparing operating carbon nanotube transistors: i) impurity doping that employs conventional and interstitial insertion of group III or V materials, ii) chemical doping that induces charge transfer between chemicals and CNTs, iii) carrier control that utilizes the work function difference between metal and CNTs, iv) electrostatic doping that controls the carrier type by using a gate bias, and v) ambipolarity that does not use chemical doping. Advantages and drawbacks of these approaches will be discussed extensively in the text.

Thermionic field emission transport in carbon nanotube transistors

With experimental and analytical analysis, we demonstrate a relationship between the metal contact work function and the electrical transport properties saturation current (Isat) and differential conductance (σsd=∂Isd/∂Vsd) in ambient exposed carbon nanotubes (CNT). A single chemical vapor deposition (CVD) grown 6 mm long semiconducting single-walled CNT is electrically contacted with a statistically significant number of Hf, Cr, Ti, Pd, and Au electrodes, respectively. The observed exponentially increasing relationship of Isat and σsd with metal contact work function is explained by a theoretical model derived from thermionic field emission. Statistical analysis and spread of the data suggest that the conduction variability in same CNT devices results from differences in local surface potential of the metal contact. Based on the theoretical model and methodology, an improved CNT-based gas sensing device layout is suggested. A method to experimentally determine gas-induced work function changes in metals is also examined.

Scalable complementary logic gates with chemically doped semiconducting carbon nanotube transistors

Use of random network carbon nanotube (CNT) transistors and their applications to complementary logic gates have been limited by several factors such as control of CNT density, existence of metallic CNTs producing a poor yield of devices, absence of stable n-dopant and control of precise position of the dopant, and absence of a scalable and cost-effective fabrication process. Here, we report a scalable and cost-effective fabrication of complementary logic gates by precisely positioning an air-stable n-type dopant, viologen, by inkjet printing on a separated semiconducting CNTs network. The obtained CNT transistors showed a high yield of nearly 100% with an on/off ratio of greater than 10(3) in an optimized channel length (∼9 μm). The n-doped semiconducting carbon nanotube transistors showed a nearly symmetric behavior in the on/off current and threshold voltage with p-type transistors. CMOS inverter, NAND, and NOR logic gates were integrated on a HfO2/Si substrate using the n/p transistor arrays. The gain of inverter is extraordinarily high, which is around 45, and NAND and NOR logic gates revealed excellent output on and off voltages. These series of whole processes were conducted under ambient conditions, which can be used for large-area and flexible thin film technology.

Small hysteresis nanocarbon-based integrated circuits on flexible and transparent plastic substrate

We report small hysteresis integrated circuits by introducing monolayer graphene for the electrodes and a single-walled carbon nanotube network for the channel. Small hysteresis of the device originates from a defect-free graphene surface, where hysteresis was modulated by oxidation. This uniquely combined nanocarbon material device with transparent and flexible properties shows remarkable device performance; subthreshold voltage of 220 mV decade(-1), operation voltage of less than 5 V, on/off ratio of approximately 10(4), mobility of 81 cm(2) V(-1) s(-1), transparency of 83.8% including substrate, no significant transconductance changes in 1000 times of bending test, and only 36% resistance decrease at a tensile strain of 50%. Furthermore, because of the nearly Ohmic contact nature between the graphene and carbon nanotubes, this device demonstrated a contact resistance 100 times lower and a mobility 20 times higher, when compared to an Au electrode.

Lithography-free fabrication of carbon nanotube network transistors

A novel non-lithographic technique for the fabrication of carbon nanotube thin film transistors is presented. The whole transistor fabrication process requires only one mask which is used both to pattern transistor channels based on aerosol synthesized carbon nanotubes and to deposit electrodes by metal evaporation at different angles. An important effect of electrodynamic focusing was utilized for the directed assembly of transistor channels with feature sizes smaller than the mask openings. This dry non-lithographic method opens up new avenues for device fabrication especially for low cost flexible and transparent electronics.

Printed, sub-3V digital circuits on plastic from aqueous carbon nanotube inks

Printing electronic components on plastic foils with functional liquid inks is an attractive approach for achieving flexible and low-cost circuitry for applications such as bendable displays and large-area sensors. The challenges for printed electronics, however, include characteristically slow switching frequencies and associated high supply voltages, which together impede widespread application. Combining printable high-capacitance dielectrics with printable high-mobility semiconductors could potentially solve these problems. Here we demonstrate fast, flexible digital circuits based on semiconducting carbon nanotube (CNT) networks and high-capacitance ion gel gate dielectrics, which were patterned by jet printing of liquid inks. Ion gel-gated CNT thin-film transistors (TFTs) with 50 microm channel lengths display ambipolar transport with electron and hole mobilities >20 cm(2)/V.s; these devices form the basis of printed inverters, NAND gates, and ring oscillators on both polyimide and SiO(2) substrates. Five-stage ring oscillators achieve frequencies >2 kHz at supply voltages of 2.5 V, corresponding to stage delay times of 50 micros. This performance represents a substantial improvement for printed circuitry fabricated from functional liquid inks.

Anomalous Schottky barriers and contact band-to-band tunneling in carbon nanotube transistors

Devices incorporating nanoscale materials, particularly carbon nanotubes (CNTs), offer exceptional electrical performance. Absent, however, is an experimentally backed model explaining contact-metal work function, device layout, and environment effects. To fill the void, this report introduces a surface-inversion channel model based on low temperature and electrical measurements of a distinct single-walled semiconducting CNT contacted by Hf, Cr, Ti, and Pd electrodes. Anomalous barrier heights and metal-contact dependent band-to-band tunneling phenomena are utilized to show that, dependent upon contact work function and gate field, transport occurs either directly between the metal and CNT channel or indirectly via injection of carriers from the metal-covered CNT region to the CNT channel. The model is consistent with previously contradictory experimental results, and the methodology is simple enough to apply in other contact-dominant systems.

Electrical properties and memory effects of field-effect transistors from networks of single- and double-walled carbon nanotubes

We study field-effect transistors made of single- and double-walled carbon nanotube networks for applications as memory devices. The transfer characteristics of the transistors exhibit a reproducible hysteresis which enables their use as nano-sized memory cells with operations faster than 10 ms, endurance longer than 10(+4) cycles and charge retention of a few hours in air. We propose water enhanced charge trapping at the SiO(2)/air interface close to the nanotubes as the dominant mechanism for charge storage. We show that charge storage can be improved by limiting exposure of the device to air.