Ultrafast non-volatile flash memory based on van der Waals heterostructures

A Reliable High-Performance Floating-Gate Transistor Based on ZrS2 Native Oxidation for Optoelectronic Synergistic Artificial Synapses

Floating-gate transistors (FGTs), considered the most promising structure among three-terminal van der Waals (vdW) synaptic transistors, possess superiorities in improved data retention, excellent endurance properties, and multibit storage capacity, thereby overcoming the von Neumann bottleneck in conventional computing architectures. However, the dielectric layer in FGT devices typically depends on atomic layer deposition or mechanically transferred insulators, posing several challenges in terms of device compatibility, manufacturing complexity, and performance degradation. Therefore, it is crucial to discover dielectrics compatible with two-dimensional (2D) materials for further simplifying FGT structures and achieving optimal performance. Here, we present a controllable and reliable oxidation process to convert the 2D semiconductor ZrS2 into its native oxide ZrOx and combine ZrOx/ZrS2 with the MoS2 channel to form MoS2/ZrOx/ZrS2 FGT, which exhibits a high on/off ratio of 107, a wide memory window of 101 V, a long retention time of 103 s, a large storage capacity of 7 bits, an excellent PPF index of 269.4%, and low power consumption of 5 pJ. Under photoelectric stimulation, the device stimulates various biological synapse behaviors, including associative memory function and retina-like adaptation. In particular, the device achieves information storage and erasure under solely optical stimulation, exhibiting high consistency with synaptic weight modulation in optogenetics and outstanding optoelectronic storage performance. These results suggest that our work provides a novel and effective approach for simplifying FGT structures and enhancing their performance, holding significant potential for application in next-generation multifunctional memory devices and systems.

Ultralow Power Cold-Fuse Memory Based on Metal-Oxide-CNT Structure

One-time programmable (OTP) memory is an essential component in chips, which has extremely high security to protect the stored critical information from being altered. However, traditional OTP memory based on the thermal breakdown of the dielectric has a large programming current, which leads to high power consumption. Here, we report a gate tunneling-induced "cold" breakdown phenomenon in carbon nanotube (CNT) field-effect transistors, and based on this we construct a "cold" fuse (C-fuse) memory where applying a mild gate voltage can break down the CNT channel without damaging the gate dielectric. The C-fuse is intrinsically different from dielectric-breakdown OTP, and it exhibits extremely low programming current (10-12 A), a large high-low resistance ratio (>1011), and a long retention time (>10 years). As the first reported OTP memory based on low-dimensional nanomaterials, C-fuse memory exhibits excellent storage performance and good uniformity, demonstrating great potential in constructing next-generation secure storage circuits.

van der Waals Photonic Bipolar Junction Transistors Capable of Simultaneously Discerning Wavelength Bands and Dual-Function Chip Application

The exponential growth of the Internet of Things (IoTs) has led to the widespread deployment of millions of sensors, crucial for the sensing layer's perception capabilities. In particular, there is a strong interest in intelligent photonic sensing. However, the current photonic sensing device and chip typically offer limited functionality, and the devices providing their power take up excessive amounts of space. There is a pressing need for smart, multifunctional sensing chips with the capability of intelligent recognition. Here, we propose and demonstrate the functionalities of a two-dimensional van der Waals photonic bipolar junction transistor (2D-vdW photonic BJT) in simultaneous sensing and discerning different wavelength bands of light. Also, a dual-function chip application is given. The optoelectronic detection characteristics in the vision-near-infrared (vis-NIR) band and photovoltaic characteristics are systematically studied. It exhibits negative photoconductivity (NPC) for the 1064 nm laser while maintaining positive photoconductivity (PPC) for the 638 and 1550 nm lasers. Also, the electrical tunable response is realized. Moreover, the function of this chip under real-application conditions has shown its efficacy in applications such as detecting dim light with ∼10 lx illuminance, identifying wavelength bands, and generating power photovoltaically. This work provides a solution for the interconnection of everything.

Two-Dimensional Materials for Brain-Inspired Computing Hardware

Recent breakthroughs in brain-inspired computing promise to address a wide range of problems from security to healthcare. However, the current strategy of implementing artificial intelligence algorithms using conventional silicon hardware is leading to unsustainable energy consumption. Neuromorphic hardware based on electronic devices mimicking biological systems is emerging as a low-energy alternative, although further progress requires materials that can mimic biological function while maintaining scalability and speed. As a result of their diverse unique properties, atomically thin two-dimensional (2D) materials are promising building blocks for next-generation electronics including nonvolatile memory, in-memory and neuromorphic computing, and flexible edge-computing systems. Furthermore, 2D materials achieve biorealistic synaptic and neuronal responses that extend beyond conventional logic and memory systems. Here, we provide a comprehensive review of the growth, fabrication, and integration of 2D materials and van der Waals heterojunctions for neuromorphic electronic and optoelectronic devices, circuits, and systems. For each case, the relationship between physical properties and device responses is emphasized followed by a critical comparison of technologies for different applications. We conclude with a forward-looking perspective on the key remaining challenges and opportunities for neuromorphic applications that leverage the fundamental properties of 2D materials and heterojunctions.

Charge-Selective 2D Heterointerface-Driven Multifunctional Floating Gate Memory for In Situ Sensing-Memory-Computing

Flash memory, dominating data storage due to its substantial storage density and cost efficiency, faces limitations such as slow response, high operating voltages, absence of optoelectronic response, etc., hindering the development of sensing-memory-computing capability. Here, we present an ultrathin platinum disulfide (PtS2)/hexagonal boron nitride (hBN)/multilayer graphene (MLG) van der Waals heterojunction with atomically sharp interfaces, achieving selective charge tunneling behavior and demonstrating ultrafast operations, a high on/off ratio (108), extremely low operating voltage, robust endurance (105 cycles), and retention exceeding 10 years. Additionally, we achieve highly linear synaptic potentiation and depression, and observe the reversibly gate-tunable transitions between positive and negative photoconductivity. Furthermore, we employed the VGG11 neural network for in situ trained in-sensor-memory-computing to classify the CIFAR-10 data set, pushing accuracy levels comparable to pure digital systems. This work could pave the way for seamlessly integrated sensing, memory, and computing capabilities for diverse edge computing.

Parallel Logic Operations in Electrically Tunable Two-Dimensional Homojunctions

Two-dimensional materials show great potential for future electronics beyond silicon materials. Here, we report an exotic multiple-port device based on multiple electrically tunable planar p-n homojunctions formed in a two-dimensional (2D) ambipolar semiconductor, tungsten diselenide (WSe2). In this device, we prepare multiple gates consisting of a global gate and several local gates, by which electrostatically induced holes and electrons are simultaneously accumulated in a WSe2 channel, and furthermore, at the boundaries, p-n junctions are formed as directly visualized by Kelvin probe force microscopy. Therefore, in addition to the gate voltages in our device, the drain/source bias can also be used to switch the 2D WSe2 channel on/off due to the rectification effect of the formed p-n junctions. More importantly, when the voltage on the global gate electrode is altered, all p-n junctions are affected, which makes it possible to perform parallel logic operations.

An Aquatic Autonomic Nervous System

Reproducing human nervous systems with endogenous mechanisms has attracted increasing attention, driven by its great potential in streamlining the neuro-electronic interfaces with bilateral signaling. Here, an artificial aquatic autonomic nervous system (ANS) with switchable excitatory/inhibitory characteristics and acetylcholine (ACh)-mediated plasticity is reported based on the newly emerged organic photoelectrochemical transistor (OPECT). Under the modulation of spatial light and ACh, the system exhibits an immediate switch between excitation and inhibition, and many pulse patterns as well as advanced ANS functions are mimicked. To demonstrate its potential usage, the artificial ANS is then utilized to control artificial pupils and muscles to emulate real biological responses during an emergency. In contrast to previous solid-state attempts, this ANS is aqueous compatible just like biological nervous systems, which are capable of real neurotransmitter mediation.

Electronics and Optoelectronics Based on Tellurium

As a true 1D system, group-VIA tellurium (Te) is composed of van der Waals bonded molecular chains within a triangular crystal lattice. This unique crystal structure endows Te with many intriguing properties, including electronic, optoelectronic, thermoelectric, piezoelectric, chirality, and topological properties. In addition, the bandgap of Te exhibits thickness dependence, ranging from 0.31 eV in bulk to 1.04 eV in the monolayer limit. These diverse properties make Te suitable for a wide range of applications, addressing both established and emerging challenges. This review begins with an elaboration of the crystal structures and fundamental properties of Te, followed by a detailed discussion of its various synthesis methods, which primarily include solution phase, and chemical and physical vapor deposition technologies. These methods form the foundation for designing Te-centered devices. Then the device applications enabled by Te nanostructures are introduced, with an emphasis on electronics, optoelectronics, sensors, and large-scale circuits. Additionally, performance optimization strategies are discussed for Te-based field-effect transistors. Finally, insights into future research directions and the challenges that lie ahead in this field are shared.

Dual-Mode Reconfigurable Split-Gate Logic Transistor through Van der Waals Integration

As silicon-based transistors approach their physical size limitations, two-dimensional material-based reconfigurable functional electronic devices are considered the most promising novel device architectures beyond Moore strategies. While these devices have garnered significant attention, they often require complex device fabrication processes and extra electric fields. Additionally, the device performance is usually limited by the metal-semiconductor interface properties. In this Letter, we have constructed a reconfigurable logic device based on a WSe2 transistor with a nanofloating gate and split-gates through van der Waals integration. This device achieves a small Schottky barrier height due to the van der Waals contacts. By varying the split-gate biases, we can realize volatile reconfigurable homojunctions as well as AND, OR, NOR, and NAND logic operations with just a single device. Furthermore, with the charge trapping effect of nanofloating gate, we can also achieve nonvolatile reconfigurable homojunctions, as well as AND and OR logic operations. The volatile and nonvolatile logic operations are similar to the short-term plasticity and long-term plasticity, respectively, of synapses in the human brain. This work offers a potential approach for creating novel reconfigurable functional electronic devices with a simple fabrication process and low cost.

An Ultrafast Multibit Memory Based on the ReS2/h-BN/Graphene Heterostructure

The exponential growth of data in the big data era has made it imperative to improve the data storage density and calculation speed. Therefore, the development of a multibit memory with an ultrafast operational speed is of great significance. In this work, a floating-gate (FG) memory based on the ReS2/h-BN/graphene van der Waals heterostructure is reported. The device exhibits ultrafast and multilevel nonvolatile memory characteristics, notably featuring an exceptionally large memory window of 113.36 V, a substantial erasing/programming current ratio of 107, an ultrafast operational speed of 30 ns, outstanding endurance exceeding 1000 cycles, and retention performance exceeding 1100 s. Furthermore, the device exhibits both electrically and optically tunable multilevel nonvolatile memory behavior. By controlling the voltage and light pulse parameters, the device achieves an electrical memory state of 130 levels (>7 bits) and an optical memory state of 45 levels (>5 bits).

Performance Limits and Advancements in Single 2D Transition Metal Dichalcogenide Transistor

Two-dimensional (2D) transition metal dichalcogenides (TMDs) allow for atomic-scale manipulation, challenging the conventional limitations of semiconductor materials. This capability may overcome the short-channel effect, sparking significant advancements in electronic devices that utilize 2D TMDs. Exploring the dimension and performance limits of transistors based on 2D TMDs has gained substantial importance. This review provides a comprehensive investigation into these limits of the single 2D-TMD transistor. It delves into the impacts of miniaturization, including the reduction of channel length, gate length, source/drain contact length, and dielectric thickness on transistor operation and performance. In addition, this review provides a detailed analysis of performance parameters such as source/drain contact resistance, subthreshold swing, hysteresis loop, carrier mobility, on/off ratio, and the development of p-type and single logic transistors. This review details the two logical expressions of the single 2D-TMD logic transistor, including current and voltage. It also emphasizes the role of 2D TMD-based transistors as memory devices, focusing on enhancing memory operation speed, endurance, data retention, and extinction ratio, as well as reducing energy consumption in memory devices functioning as artificial synapses. This review demonstrates the two calculating methods for dynamic energy consumption of 2D synaptic devices. This review not only summarizes the current state of the art in this field but also highlights potential future research directions and applications. It underscores the anticipated challenges, opportunities, and potential solutions in navigating the dimension and performance boundaries of 2D transistors.

Enhancing 2D Photonics and Optoelectronics with Artificial Microstructures

By modulating subwavelength structures and integrating functional materials, 2D artificial microstructures (2D AMs), including heterostructures, superlattices, metasurfaces and microcavities, offer a powerful platform for significant manipulation of light fields and functions. These structures hold great promise in high-performance and highly integrated optoelectronic devices. However, a comprehensive summary of 2D AMs remains elusive for photonics and optoelectronics. This review focuses on the latest breakthroughs in 2D AM devices, categorized into electronic devices, photonic devices, and optoelectronic devices. The control of electronic and optical properties through tuning twisted angles is discussed. Some typical strategies that enhance light-matter interactions are introduced, covering the integration of 2D materials with external photonic structures and intrinsic polaritonic resonances. Additionally, the influences of external stimuli, such as vertical electric fields, enhanced optical fields and plasmonic confinements, on optoelectronic properties is analysed. The integrations of these devices are also thoroughly addressed. Challenges and future perspectives are summarized to stimulate research and development of 2D AMs for future photonics and optoelectronics.

Non-volatile 2D MoS2/black phosphorus heterojunction photodiodes in the near- to mid-infrared region

Cutting-edge mid-wavelength infrared (MWIR) sensing technologies leverage infrared photodetectors, memory units, and computing units to enhance machine vision. Real-time processing and decision-making challenges emerge with the increasing number of intelligent pixels. However, current operations are limited to in-sensor computing capabilities for near-infrared technology, and high-performance MWIR detectors for multi-state switching functions are lacking. Here, we demonstrate a non-volatile MoS2/black phosphorus (BP) heterojunction MWIR photovoltaic detector featuring a semi-floating gate structure design, integrating near- to mid-infrared photodetection, memory and computing (PMC) functionalities. The PMC device exhibits the property of being able to store a stable responsivity, which varies linearly with the stored conductance state. Significantly, device weights (stable responsivity) can be programmed with power consumption as low as 1.8 fJ, and the blackbody peak responsivity can reach 1.68 A/W for the MWIR band. In the simulation of Faster Region with convolution neural network (CNN) based on the FLIR dataset, the PMC hardware responsivity weights can reach 89% mean Average Precision index of the feature extraction network software weights. This MWIR photovoltaic detector, with its versatile functionalities, holds significant promise for applications in advanced infrared object detection and recognition systems.

The Nonvolatile Memory and Neuromorphic Simulation of ReS2/h-BN/Graphene Floating Gate Devices Under Photoelectrical Hybrid Modulations

The floating gate devices, as a kind of nonvolatile memory, obtain great application potential in logic-in-memory chips. The 2D materials have been greatly studied due to atomically flat surfaces, higher carrier mobility, and excellent photoelectrical response. The 2D ReS2 flake is an excellent candidate for channel materials due to thickness-independent direct bandgap and outstanding optoelectronic response. In this paper, the floating gate devices are prepared with the ReS2/h-BN/Gr heterojunction. It obtains superior nonvolatile electrical memory characteristics, including a higher memory window ratio (81.82%), tiny writing/erasing voltage (±8 V/2 ms), long retention (>1000 s), and stable endurance (>1000 times) as well as multiple memory states. Meanwhile, electrical writing and optical erasing are achieved by applying electrical and optical pulses, and multilevel storage can easily be achieved by regulating light pulse parameters. Finally, due to the ideal long-time potentiation/depression synaptic weights regulated by light pulses and electrical pulses, the convolutional neural network (CNN) constructed by ReS2/h-BN/Gr floating gate devices can achieve image recognition with an accuracy of up to 98.15% for MNIST dataset and 91.24% for Fashion-MNIST dataset. The research work adds a powerful option for 2D materials floating gate devices to apply to logic-in-memory chips and neuromorphic computing.

Recent Advance in Synaptic Plasticity Modulation Techniques for Neuromorphic Applications

Manipulating the expression of synaptic plasticity of neuromorphic devices provides fascinating opportunities to develop hardware platforms for artificial intelligence. However, great efforts have been devoted to exploring biomimetic mechanisms of plasticity simulation in the last few years. Recent progress in various plasticity modulation techniques has pushed the research of synaptic electronics from static plasticity simulation to dynamic plasticity modulation, improving the accuracy of neuromorphic computing and providing strategies for implementing neuromorphic sensing functions. Herein, several fascinating strategies for synaptic plasticity modulation through chemical techniques, device structure design, and physical signal sensing are reviewed. For chemical techniques, the underlying mechanisms for the modification of functional materials were clarified and its effect on the expression of synaptic plasticity was also highlighted. Based on device structure design, the reconfigurable operation of neuromorphic devices was well demonstrated to achieve programmable neuromorphic functions. Besides, integrating the sensory units with neuromorphic processing circuits paved a new way to achieve human-like intelligent perception under the modulation of physical signals such as light, strain, and temperature. Finally, considering that the relevant technology is still in the basic exploration stage, some prospects or development suggestions are put forward to promote the development of neuromorphic devices.

Ultrafast Non-Volatile Floating-Gate Memory Based on All-2D Materials

The explosive growth of massive-data storage and the demand for ultrafast data processing require innovative memory devices with exceptional performance. 2D materials and their van der Waal heterostructures with atomically sharp interfaces hold great promise for innovations in memory devices. Here, this work presents non-volatile, floating-gate memory devices with all functional layers made of 2D materials, achieving ultrafast programming/erasing speeds (20 ns), high extinction ratios (up to 108), and multi-bit storage capability. These devices also exhibit long-term data retention exceeding 10 years, facilitated by a high gate-coupling ratio (GCR) and atomically sharp interfaces between functional layers. Additionally, this work demonstrates the realization of an "OR" logic gate on a single-device unit by synergistic electrical and optical operations. The present results provide a solid foundation for next-generation ultrahigh-speed, ultralong lifespan, non-volatile memory devices, with a potential for scale-up manufacturing and flexible electronics applications.

Gap State-Modulated Van Der Waals Short-Term Memory with Broad Band Negative Photoconductance

Floating gate memory (FGM), composed of van der Waals (vdW) junctions with an atomically thin floating layer for charge storage, is widely employed to develop logic-in memories and in-sensor computing devices. Most research efforts of FGM are spent on achieving long-term charge storage and fast reading/writing for flash and random-access memory. However, dynamic modulation of memory time via a tunneling barrier and vdW interfaces, which is critical for synaptic computing and machine vision, is still lacking. Here, a van der Waals short-term memory with tunable memory windows and retention times from milliseconds to thousands of seconds is reported, which is approximately exponentially proportional to the thickness h-BN (hexagonal boron nitride) barrier. The specific h-BN barrier with fruitful gap states provides charge release channels for trapped charges, making the vdW device switchable between positive photoconductance and negative photoconductance with a broadband light from IR to UV range. The dynamic short-term memory with tunable photo response highlights the design strategy of novel vdW memory vis interface engineering for further intelligent information storage and optoelectronic detection.

Gate Voltage- and Bias Voltage-Tunable Staggered-Gap to Broken-Gap Transition Based on WSe2/Ta2NiSe5 Heterostructure for Multimode Optoelectronic Logic Gate

Two-dimensional (2D) materials with superior properties exhibit tremendous potential in developing next-generation electronic and optoelectronic devices. Integrating various functions into one device is highly expected as that endows 2D materials great promise for more Moore and more-than-Moore device applications. Here, we construct a WSe2/Ta2NiSe5 heterostructure by stacking the p-type WSe2 and the n-type narrow gap Ta2NiSe5 with the aim to achieve a multifunction optoelectronic device. Owing to the large interface potential barrier, the heterostructure device reveals a prominent diode feature with a large rectify ratio (7.6 × 104) and a low dark current (10-12 A). Especially, gate voltage- and bias voltage-tunable staggered-gap to broken-gap transition is achieved on the heterostructure device, which enables gate voltage-tunable forward and reverse rectifying features. As results, the heterostructure device exhibits superior self-powered photodetection properties, including a high detectivity of 1.08 × 1010 Jones and a fast response time of 91 μs. Additionally, the intrinsic structural anisotropy of Ta2NiSe5 endows the heterostructure device with strong polarization-sensitive photodetection and high-resolution polarization imaging. Based on these characteristics, a multimode optoelectronic logic gate is realized on the heterostructure via synergistically modulating the light on/off, polarization angle, gate voltage, and bias voltage. This work shed light on the future development of constructing high-performance multifunctional optoelectronic devices.

Can 2D Semiconductors Be Game-Changers for Nanoelectronics and Photonics?

2D semiconductors have interesting physical and chemical attributes that have led them to become one of the most intensely investigated semiconductor families in recent history. They may play a crucial role in the next technological revolution in electronics as well as optoelectronics or photonics. In this Perspective, we explore the fundamental principles and significant advancements in electronic and photonic devices comprising 2D semiconductors. We focus on strategies aimed at enhancing the performance of conventional devices and exploiting important properties of 2D semiconductors that allow fundamentally interesting device functionalities for future applications. Approaches for the realization of emerging logic transistors and memory devices as well as photovoltaics, photodetectors, electro-optical modulators, and nonlinear optics based on 2D semiconductors are discussed. We also provide a forward-looking perspective on critical remaining challenges and opportunities for basic science and technology level applications of 2D semiconductors.

Resistive Memory Devices at the Thinnest Limit: Progress and Challenges

The Si-based integrated circuits industry has been developing for more than half a century, by focusing on the scaling-down of transistor. However, the miniaturization of transistors will soon reach its physical limits, thereby requiring novel material and device technologies. Resistive memory is a promising candidate for in-memory computing and energy-efficient synaptic devices that can satisfy the computational demands of the future applications. However, poor cycle-to-cycle and device-to-device uniformities hinder its mass production. 2D materials, as a new type of semiconductor, is successfully employed in various micro/nanoelectronic devices and have the potential to drive future innovation in resistive memory technology. This review evaluates the potential of using the thinnest advanced materials, that is, monolayer 2D materials, for memristor or memtransistor applications, including resistive switching behavior and atomic mechanism, high-frequency device performances, and in-memory computing/neuromorphic computing applications. The scaling-down advantages of promising monolayer 2D materials including graphene, transition metal dichalcogenides, and hexagonal boron nitride are presented. Finally, the technical challenges of these atomic devices for practical applications are elaborately discussed. The study of monolayer-2D-material-based resistive memory is expected to play a positive role in the exploration of beyond-Si electronic technologies.

Two-Dimensional Semiconductors and Transistors for Future Integrated Circuits

Silicon transistors are approaching their physical limit, calling for the emergence of a technological revolution. As the acknowledged ultimate version of transistor channels, 2D semiconductors are of interest for the development of post-Moore electronics due to their useful properties and all-in-one potentials. Here, the promise and current status of 2D semiconductors and transistors are reviewed, from materials and devices to integrated applications. First, we outline the evolution and challenges of silicon-based integrated circuits, followed by a detailed discussion on the properties and preparation strategies of 2D semiconductors and van der Waals heterostructures. Subsequently, the significant progress of 2D transistors, including device optimization, large-scale integration, and unconventional devices, are presented. We also examine 2D semiconductors for advanced heterogeneous and multifunctional integration beyond CMOS. Finally, the key technical challenges and potential strategies for 2D transistors and integrated circuits are also discussed. We envision that the field of 2D semiconductors and transistors could yield substantial progress in the upcoming years and hope this review will trigger the interest of scientists planning their next experiment.

Controlled Preparation of High Quality Bubble-Free and Uniform Conducting Interfaces of Vertical van der Waals Heterostructures of Arrays

Sharp and clean interfaces of van der Waals (vdW) heterostructures are highly demanded in two-dimensional (2D) materials-based devices. However, current assembly methods usually cause interfacial bubbles and wrinkles, hindering carrier interlayer transport. The preparation of a large-scale vdW heterostructure with a bubble-free interface is still a challenge. Although many efforts have been made to eliminate bubbles, the evolution processes of the interfacial bubbles are rarely studied. Here, the interface bubble formation and evolution of the transferred 2D materials and their vdW heterostructure are systemically studied by the atomic force microscopy (AFM) technique and high-resolution surface current mapping. A thermal annealing procedure is developed to reduce the number of bubbles and to improve the quality of interfaces. In addition, influences of the interface residues and nanosteps on bubble evolution are also discussed. Further, we develop the polystyrene (PS)-mediated polydimethylsiloxane (PDMS) transfer technique to realize the high-quality transfer of heterostructure arrays. Finally, high-resolution surface current mapping results confirm that we can now produce highly uniform electrical conduction interfaces of heterojunctions. This study provides guidance for assembling high quality interfaces and paves the way for production of bubble-free heterostructure-based electronic devices with high performance and good uniformity.

Hierarchical processing enabled by 2D ferroelectric semiconductor transistor for low-power and high-efficiency AI vision system

The growth of data and Internet of Things challenges traditional hardware, which encounters efficiency and power issues owing to separate functional units for sensors, memory, and computation. In this study, we designed an α-phase indium selenide (α-In2Se3) transistor, which is a two-dimensional ferroelectric semiconductor as the channel material, to create artificial optic-neural and electro-neural synapses, enabling cutting-edge processing-in-sensor (PIS) and computing-in-memory (CIM) functionalities. As an optic-neural synapse for low-level sensory processing, the α-In2Se3 transistor exhibits a high photoresponsivity (2855 A/W) and detectivity (2.91 × 1014 Jones), facilitating efficient feature extraction. For high-level processing tasks as an electro-neural synapse, it offers a fast program/erase speed of 40 ns/50 µs and ultralow energy consumption of 0.37 aJ/spike. An AI vision system using α-In2Se3 transistors has been demonstrated. It achieved an impressive recognition accuracy of 92.63% within 12 epochs owing to the synergistic combination of the PIS and CIM functionalities. This study demonstrates the potential of the α-In2Se3 transistor in future vision hardware, enhancing processing, power efficiency, and AI applications.

2D van der Waals Heterostructure with Tellurene Floating-Gate for Wide Range and Multi-Bit Optoelectronic Memory

Intensive research on optoelectronic memory (OEM) devices based on two-dimensional (2D) van der Waals heterostructures (vdWhs) is being conducted due to their distinctive advantages for electrical-optical writing and multilevel storage. These features make OEM a promising candidate for the logic of reconfigurable operations. However, the realization of nonvolatile OEM with broadband absorption (from visible to infrared) and a high switching ratio remains challenging. Herein, we report a nonvolatile OEM based on a heterostructure consisting of rhenium disulfide (ReS2), hexagonal boron nitride (hBN) and tellurene (2D Te). The 2D Te-based floating-gate (FG) device exhibits excellent performance metrics, including a high switching on/off ratio (∼106), significant endurance (>1000 cycles) and impressive retention (>104 s). In addition, the narrow band gap of 2D Te endows the device with broadband optical programmability from the visible to near-infrared regions at room temperature. Moreover, by applying different gate voltages, light wavelengths, and laser powers, multiple bits can be successfully generated. Additionally, the device is specifically designed to enable reconfigurable inverter logic circuits (including AND and OR gates) through controlled electrical and optical inputs. These significant findings demonstrate that the 2D vdWhs with a 2D Te FG are a valuable approach in the development of high-performance OEM devices.

Rational Design of Stimuli-Responsive Inorganic 2D Materials via Molecular Engineering: Toward Molecule-Programmable Nanoelectronics

The ability of electronic devices to act as switches makes digital information processing possible. Succeeding graphene, emerging inorganic 2D materials (i2DMs) have been identified as alternative 2D materials to harbor a variety of active molecular components to move the current silicon-based semiconductor technology forward to a post-Moore era focused on molecule-based information processing components. In this regard, i2DMs benefits are not only for their prominent physiochemical properties (e.g., the existence of bandgap), but also for their high surface-to-volume ratio rich in reactive sites. Nonetheless, since this field is still in an early stage, having knowledge of both i) the different strategies for molecularly functionalizing the current library of i2DMs, and ii) the different types of active molecular components is a sine qua non condition for a rational design of stimuli-responsive i2DMs capable of performing logical operations at the molecular level. Consequently, this Review provides a comprehensive tutorial for covalently anchoring ad hoc molecular components-as active units triggered by different external inputs-onto pivotal i2DMs to assess their role in the expanding field of molecule-programmable nanoelectronics for electrically monitoring bistable molecular switches. Limitations, challenges, and future perspectives of this emerging field which crosses materials chemistry with computation are critically discussed.

Electron-Sponge Nature of Polyoxometalates for Next-Generation Electrocatalytic Water Splitting and Nonvolatile Neuromorphic Devices

Designing next-generation molecular devices typically necessitates plentiful oxygen-bearing sites to facilitate multiple-electron transfers. However, the theoretical limits of existing materials for energy conversion and information storage devices make it inevitable to hunt for new competitors. Polyoxometalates (POMs), a unique class of metal-oxide clusters, have been investigated exponentially due to their structural diversity and tunable redox properties. POMs behave as electron-sponges owing to their intrinsic ability of reversible uptake-release of multiple electrons. In this review, numerous POM-frameworks together with desired features of a contender material and inherited properties of POMs are systematically discussed to demonstrate how and why the electron-sponge-like nature of POMs is beneficial to design next-generation water oxidation/reduction electrocatalysts, and neuromorphic nonvolatile resistance-switching random-access memory devices. The aim is to converge the attention of scientists who are working separately on electrocatalysts and memory devices, on a point that, although the application types are different, they all hunt for a material that could exhibit electron-sponge-like feature to realize boosted performances and thus, encouraging the scientists of two completely different fields to explore POMs as imperious contenders to design next-generation nanodevices. Finally, challenges and promising prospects in this research field are also highlighted.

Ni Single-Atoms Based Memristors with Ultrafast Speed and Ultralong Data Retention

Memristor with low-power, high density, and scalability fulfills the requirements of the applications of the new computing system beyond Moore's law. However, there are still nonideal device characteristics observed in the memristor to be solved. The important observation is that retention and speed are correlated parameters of memristor with trade off against each other. The delicately modulating distribution and trapping level of defects in electron migration-based memristor is expected to provide a compromise method to address the contradictory issue of improving both switching speed and retention capability. Here, high-performance memristor based on the structure of ITO/Ni single-atoms (NiSAs/N-C)/Polyvinyl pyrrolidone (PVP)/Au is reported. By utilizing well-distributed trapping sites , small tunneling barriers/distance and high charging energy, the memristor with an ultrafast switching speed of 100 ns, ultralong retention capability of 106  s, a low set voltage (Vset ) of ≈0.7 V, a substantial ON/OFF ration of 103 , and low spatial variation in cycle-to-cycle (500 cycles) and device-to-device characteristics (128 devices) is demonstrated. On the premise of preserving the strengths of a fast switching speed, this memristor exhibits ultralong retention capability comparable to the commercialized flash memory. Finally, a memristor ratioed logic-based combinational memristor array to realize the one-bit full adder is further implemented.

Polarized Tunneling Transistor for Ultralow-Energy-Consumption Artificial Synapse toward Neuromorphic Computing

Neural networks based on low-power artificial synapses can significantly reduce energy consumption, which is of great importance in today's era of artificial intelligence. Two-dimensional (2D) material-based floating-gate transistors (FGTs) have emerged as compelling candidates for simulating artificial synapses owing to their multilevel and nonvolatile data storage capabilities. However, the low erasing/programming speed of FGTs renders them unsuitable for low-energy-consumption artificial synapses, thereby limiting their potential in high-energy-efficient neuromorphic computing. Here, we introduce a FGT-inspired MoS2/Trap/PZT heterostructure-based polarized tunneling transistor (PTT) with a simple fabrication process and significantly enhanced erasing/programming speed. Distinct from the FGT, the PTT lacks a tunnel layer, leading to a marked improvement in its erasing/programming speed. The PTT's highest erasing/programming (operation) speed can reach ∼20 ns, which outperforms the performance of most FGTs based on 2D heterostructures. Furthermore, the PTT has been utilized as an artificial synapse, and its weight-update energy consumption can be as low as 0.0002 femtojoule (fJ), which benefits from the PTT's ultrahigh operation speed. Additionally, PTT-based artificial synapses have been employed in constructing artificial neural network simulations, achieving facial-recognition accuracy (95%). This groundbreaking work makes it possible for fabricating future high-energy-efficient neuromorphic transistors utilizing 2D materials.

A 2D Heterostructure-Based Multifunctional Floating Gate Memory Device for Multimodal Reservoir Computing

The demand for economical and efficient data processing has led to a surge of interest in neuromorphic computing based on emerging two-dimensional (2D) materials in recent years. As a rising van der Waals (vdW) p-type Weyl semiconductor with many intriguing properties, tellurium (Te) has been widely used in advanced electronics/optoelectronics. However, its application in floating gate (FG) memory devices for information processing has never been explored. Herein, an electronic/optoelectronic FG memory device enabled by Te-based 2D vdW heterostructure for multimodal reservoir computing (RC) is reported. When subjected to intense electrical/optical stimuli, the device exhibits impressive nonvolatile electronic memory behaviors including ≈108 extinction ratio, ≈100 ns switching speed, >4000 cycles, >4000-s retention stability, and nonvolatile multibit optoelectronic programmable characteristics. When the input stimuli weaken, the nonvolatile memory degrades into volatile memory. Leveraging these rich nonlinear dynamics, a multimodal RC system with high recognition accuracy of 90.77% for event-type multimodal handwritten digit-recognition is demonstrated.

Highly Reliable Van Der Waals Memory Boosted by a Single 2D Charge Trap Medium

Charge trap materials that can store carriers efficiently and controllably are desired for memory applications. 2D materials are promising for highly compacted and reliable memory mainly due to their ease of constructing atomically uniform interfaces, however, remain unexplored as being charge trap media. Here it is discovered that 2D semiconducting PbI2 is an excellent charge trap material for nonvolatile memory and artificial synapses. It is simple to construct PbI2 -based charge trap devices since no complicated synthesis or additional defect manufacturing are required. As a demonstration, MoS2 /PbI2 device exhibits a large memory window of 120 V, fast write speed of 5 µs, high on-off ratio around 106 , multilevel memory of over 8 distinct states, high reliability with endurance up to 104 cycles and retention over 1.2 × 104 s. It is envisioned that PbI2 with ionic activity caused by the natively formed iodine vacancies is unique to combine with unlimited 2D materials for versatile van der Waals devices with high-integration and multifunctionality.

Self-Powered Programmable van der Waals Photodetectors with Nonvolatile Semifloating Gate

Tunable photovoltaic photodetectors are of significant relevance in the fields of programmable and neuromorphic optoelectronics. However, their widespread adoption is hindered by intricate architectural design and energy consumption challenges. This study employs a nonvolatile MoTe2/hexagonal boron nitride/graphene semifloating photodetector to address these issues. Programed with pulsed gate voltage, the MoTe2 channel can be reconfigured from an n+-n to a p-n homojunction and the photocurrent transition changes from negative to positive values. Scanning photocurrent mapping reveals that the negative and positive photocurrents are attributed to Schottky junction and p-n homojunction, respectively. In the p-n configuration, the device demonstrates self-driven, linear, rapid response (∼3 ms), and broadband sensitivity (from 405 to 1500 nm) for photodetection, with typical performances of responsivity at ∼0.5 A/W and detectivity ∼1.6 × 1012 Jones under 635 nm illumination. These outstanding photodetection capabilities emphasize the potential of the semifloating photodetector as a pioneering approach for advancing logical and nonvolatile optoelectronics.

Vitality of Intralayer Vibration in hBN for Effective Long-Range Interlayer Hole Transfer across High Barriers in MoSe2/hBN/WSe2 Heterostructures

Introducing the two-dimensional (2D) hexagonal boron nitride (hBN) between 2D transition metal dichalcogenide (TMD) layers promises convenient manipulation of the interlayer exciton (IX) and interlayer charge transfer in TMD/hBN/TMD heterostructures, while the role of inserted hBN layers during IX formation is controversial. Employing ab initio nonadiabatic molecular dynamics (NAMD) simulations and the electron-phonon coupling model, we systematically investigate interlayer hole transfer in MoSe2/WSe2 bilayers intercalated by hBN layers with various thicknesses. The conventional direct hole transfer from MoSe2 to WSe2 is decelerated by 2-3 orders of magnitude after the hBN insertion. Meanwhile, a novel channel intermediated by a deeper hole of WSe2 becomes dominant, where the intralayer shear mode of hBN plays a crucial role by reducing the energy barriers for this new channel. The unique role of hBN layers is revealed for the first time, enriching the knowledge of the underlying microscopic mechanisms and providing instructive guidance to practical van der Waals optoelectronic devices.

PZT-Enabled MoS2 Floating Gate Transistors: Overcoming Boltzmann Tyranny and Achieving Ultralow Energy Consumption for High-Accuracy Neuromorphic Computing

Low-power electronic devices play a pivotal role in the burgeoning artificial intelligence era. The study of such devices encompasses low-subthreshold swing (SS) transistors and neuromorphic devices. However, conventional field-effect transistors (FETs) face the inherent limitation of the "Boltzmann tyranny", which restricts SS to 60 mV decade-1 at room temperature. Additionally, FET-based neuromorphic devices lack sufficient conductance states for highly accurate neuromorphic computing due to a narrow memory window. In this study, we propose a pioneering PZT-enabled MoS2 floating gate transistor (PFGT) configuration, demonstrating a low SS of 46 mV decade-1 and a wide memory window of 7.2 V in the dual-sweeping gate voltage range from -7 to 7 V. The wide memory window provides 112 distinct conductance states for PFGT. Moreover, the PFGT-based artificial neural network achieves an outstanding facial-recognition accuracy of 97.3%. This study lays the groundwork for the development of low-SS transistors and highly energy efficient artificial synapses utilizing two-dimensional materials.

A review on advanced band-structure engineering with dynamic control for nonvolatile memory based 2D transistors

With advancements in information technology, an enormous amount of data is being generated that must be quickly accessible. However, conventional Si memory cells are approaching their physical limits and will be unable to meet the requirements of intense applications in the future. Notably, 2D atomically thin materials have demonstrated multiple novel physical and chemical properties that can be used to investigate next-generation electronic devices and breakthrough physical limits to continue Moore's law. Band structure is an important semiconductor parameter that determines their electrical and optical properties. In particular, 2D materials have highly tunable bandgaps and Fermi levels that can be achieved through band structure engineering methods such as heterostructure, substrate engineering, chemical doping, intercalation, and electrostatic doping. In particular, dynamic control of band structure engineering can be used in recent advancements in 2D devices to realize nonvolatile storage performance. This study examines recent advancements in 2D memory devices that utilize band structure engineering. The operational mechanisms and memory characteristics are described for each band structure engineering method. Band structure engineering provides a platform for developing new structures and realizing superior performance with respect to nonvolatile memory.

High-Speed Optoelectronic Nonvolatile Memory Based on van der Waals Heterostructures

High-performance optoelectronic nonvolatile memory is promising candidate for next-generation information memory devices. Here, a floating-gate memory is constructed based on van der Waals heterostructure, which exhibits a large storage window ratio (≈75.5%) and an extremely high on/off ratio (107 ), as well as an ultrafast electrical writing/erasing speed (40 ns). The enhanced performance enables as-fabricated devices to present excellent multilevel data storage, robust retention, and endurance performance. Moreover, stable optical erasing operations can be achieved by illuminating the device with a laser pulse, showcasing outstanding optoelectronic storage performance (optical erasing speed ≈ 2.3 ms). The nonvolatile and high-speed characteristics of these devices hold significant potential for the integration of high-performance nonvolatile memory.

Indium-Gallium-Zinc Oxide-Based Synaptic Charge Trap Flash for Spiking Neural Network-Restricted Boltzmann Machine

Recently, neuromorphic computing has been proposed to overcome the drawbacks of the current von Neumann computing architecture. Especially, spiking neural network (SNN) has received significant attention due to its ability to mimic the spike-driven behavior of biological neurons and synapses, potentially leading to low-power consumption and other advantages. In this work, we designed the indium-gallium-zinc oxide (IGZO) channel charge-trap flash (CTF) synaptic device based on a HfO2/Al2O3/Si3N4/Al2O3 layer. Our IGZO-based CTF device exhibits synaptic functions with 128 levels of synaptic weight states and spike-timing-dependent plasticity. The SNN-restricted Boltzmann machine was used to simulate the fabricated CTF device to evaluate the efficiency for the SNN system, achieving the high pattern-recognition accuracy of 83.9%. We believe that our results show the suitability of the fabricated IGZO CTF device as a synaptic device for neuromorphic computing.

Tuning and exploiting interlayer coupling in two-dimensional van der Waals heterostructures

Two-dimensional (2D) layered materials can stack into new material systems, with van der Waals (vdW) interaction between the adjacent constituent layers. This stacking process of 2D atomic layers creates a new degree of freedom-interlayer interface between two adjacent layers-that can be independently studied and tuned from the intralayer degree of freedom. In such heterostructures (HSs), the physical properties are largely determined by the vdW interaction between the individual layers,i.e.interlayer coupling, which can be effectively tuned by a number of means. In this review, we summarize and discuss a number of such approaches, including stacking order, electric field, intercalation, and pressure, with both their experimental demonstrations and theoretical predictions. A comprehensive overview of the modulation on structural, optical, electrical, and magnetic properties by these four approaches are also presented. We conclude this review by discussing several prospective research directions in 2D HSs field, including fundamental physics study, property tuning techniques, and future applications.

Porous crystalline materials for memories and neuromorphic computing systems

Porous crystalline materials usually include metal-organic frameworks (MOFs), covalent organic frameworks (COFs), hydrogen-bonded organic frameworks (HOFs) and zeolites, which exhibit exceptional porosity and structural/composition designability, promoting the increasing attention in memory and neuromorphic computing systems in the last decade. From both the perspective of materials and devices, it is crucial to provide a comprehensive and timely summary of the applications of porous crystalline materials in memory and neuromorphic computing systems to guide future research endeavors. Moreover, the utilization of porous crystalline materials in electronics necessitates a shift from powder synthesis to high-quality film preparation to ensure high device performance. This review highlights the strategies for preparing porous crystalline materials films and discusses their advancements in memory and neuromorphic electronics. It also provides a detailed comparative analysis and presents the existing challenges and future research directions, which can attract the experts from various fields (e.g., materials scientists, chemists, and engineers) with the aim of promoting the applications of porous crystalline materials in memory and neuromorphic computing systems.

Review of Semiconductor Flash Memory Devices for Material and Process Issues

Vertically integrated NAND (V-NAND) flash memory is the main data storage in modern handheld electronic devices, widening its share even in the data centers where installation and operation costs are critical. While the conventional scaling rule has been applied down to the design rule of ≈15 nm (year 2013), the current method of increasing device density is stacking up layers. Currently, 176-layer-stacked V-NAND flash memory is available on the market. Nonetheless, increasing the layers invokes several challenges, such as film stress management and deep contact hole etching. Also, there should be an upper bound for the attainable stacking layers (400-500) due to the total allowable chip thickness, which will be reached within 6-7 years. This review summarizes the current status and critical challenges of charge-trap-based flash memory devices, with a focus on the material (floating-gate vs charge-trap-layer), array-level circuit architecture (NOR vs NAND), physical integration structure (2D vs 3D), and cell-level programming technique (single vs multiple levels). Current efforts to improve fabrication processes and device performances using new materials are also introduced. The review suggests directions for future storage devices based on the ionic mechanism, which may overcome the inherent problems of flash memory devices.

Simultaneously ultrafast and robust two-dimensional flash memory devices based on phase-engineered edge contacts

As the prevailing non-volatile memory (NVM), flash memory offers mass data storage at high integration density and low cost. However, due to the 'speed-retention-endurance' dilemma, their typical speed is limited to ~microseconds to milliseconds for program and erase operations, restricting their application in scenarios with high-speed data throughput. Here, by adopting metallic 1T-LixMoS2 as edge contact, we show that ultrafast (10-100 ns) and robust (endurance>106 cycles, retention>10 years) memory operation can be simultaneously achieved in a two-dimensional van der Waals heterostructure flash memory with 2H-MoS2 as semiconductor channel. We attribute the superior performance to the gate tunable Schottky barrier at the edge contact, which can facilitate hot carrier injection to the semiconductor channel and subsequent tunneling when compared to a conventional top contact with high density of defects at the metal interface. Our results suggest that contact engineering can become a strategy to further improve the performance of 2D flash memory devices and meet the increasing demands of high speed and reliable data storage.

Modulating the Function of GeAs/ReS2 van der Waals Heterojunction with its Potential Application for Short-Wave Infrared and Polarization-Sensitive Photodetection

Van der Waals heterojunction (vdWs) of 2D materials with integrated or extended superior characteristics, opening up new opportunities in functional electronic and optoelectric device applications. Exploring methods to achieve multifunctional vdWs heterojunction devices is one of the most promising prospects in this area. Herein, a diverse function of forward rectifying diode, Zener tunneling diode, and backward rectifying diodes are realized in GeAs/ReS2 heterojunction by modulating the doping level of GeAs. The tunneling diode presents an interesting trend forward negative differential resistance (NDR) behavior which may facilitate the application of multi-value logic. More importantly, the GeAs/ReS2 forward rectifying diode exhibits highly sensitive photodetection in the wide-spectrum range up to 1550 nm corresponding to a short-wave infrared (SWIR) region. In addition, as two strong anisotropic 2D materials of GeAs and ReS2 , the heterojunction exhibits strong polarization-sensitive photodetection behavior with a dichroic photocurrent ratio of 1.7. This work provides an effective strategy to achieve multifunctional 2D vdW heterojunction devices and develops more possibilities to broaden their functionalities and applications.

Ultrafast-Programmable 2D Homojunctions Based on van der Waals Heterostructures on a Silicon Substrate

The development of electrically ultrafast-programmable semiconductor homojunctions can lead to transformative multifunctional electronic devices. However, silicon-based homojunctions are not programmable so that alternative materials need to be explored. Here 2D, multi-functional, lateral homojunctions made of van der Waals heterostructures with a semi-floating-gate configuration on a p++ Si substrate feature atomically sharp interfaces and can be electrostatically programmed in nanoseconds, more than seven orders of magnitude faster than other 2D-based homojunctions. By applying voltage pulses with different polarities, lateral p-n, n+ -n and other types of homojunctions can be formed, varied, and reversed. The p-n homojunctions possess a high rectification ratio of up to ≈105 and can be dynamically switched between four distinct conduction states with the current spanning over nine orders of magnitude, enabling them to function as logic rectifiers, memories, and multi-valued logic inverters. Built on a p++ Si substrate, which acts as the control gate, the devices are compatible with Si technology.

A Light-Programmed Rewritable Lattice-Mediated Multistate Memory for High-Density Data Storage

Mainstream non-volatile memory (NVM) devices based on floating gate structures or phase-change/ferroelectric materials face inherent limitations that compromise their suitability for long-term data storage. To address this challenge, a novel memory device based on light-programmed lattice engineering of thin rhenium disulfide (ReS2 ) flakes is proposed. By inducing sulfur vacancies in the ReS2 channel through light illumination, the device's electrical conductivity is modified accordingly and multiple conductance states for data storage therefore are generated. The device exhibits more than 128 distinct states with linearly increasing conductance, corresponding to a sevenfold increase in storage density. Through further optimization to achieve atomic-level precision in defect creation, it is possible to achieve even higher storage densities. These states are extremely stable in vacuum or inert ambient showing long retention of >10 years, while they can be erased upon exposure to the air. The ReS2 memory device can maintain its stability over multiple program-erase operation cycles and shows superior wavelength discrimination capability for incident light in the range of 405-785 nm. This device represents a significant contribution to NVM technology by offering the ability to store information in multistate memory and enabling filter-free color image recorder applications.

Uncovering the Role of Crystal Phase in Determining Nonvolatile Flash Memory Device Performance Fabricated from MoTe2-Based 2D van der Waals Heterostructures

Although the crystal phase of two-dimensional (2D) transition metal dichalcogenides (TMDs) has been proven to play an essential role in fabricating high-performance electronic devices in the past decade, its effect on the performance of 2D material-based flash memory devices still remains unclear. Here, we report the exploration of the effect of MoTe₂ in different phases as the charge-trapping layer on the performance of 2D van der Waals (vdW) heterostructure-based flash memory devices, where a metallic 1T'-MoTe₂ or semiconducting 2H-MoTe₂ nanoflake is used as the floating gate. By conducting comprehensive measurements on the two kinds of vdW heterostructure-based devices, the memory device based on MoS₂/h-BN/1T'-MoTe₂ presents much better performance, including a larger memory window, faster switching speed (100 ns), and higher extinction ratio (10⁷), than that of the device based on the MoS₂/h-BN/2H-MoTe₂ heterostructure. Moreover, the device based on the MoS₂/h-BN/1T'-MoTe₂ heterostructure also shows a long cycle (>1200 cycles) and retention (>3000 s) stability. Our study clearly demonstrates that the crystal phase of 2D TMDs has a significant impact on the performance of nonvolatile flash memory devices based on 2D vdW heterostructures, which paves the way for the fabrication of future high-performance memory devices based on 2D materials.

Selective Growth of van der Waals Heterostructures Enabled by Electron-Beam Irradiation

Van der Waals heterostructures (vdWHSs) enable the fabrication of complex electronic devices based on two-dimensional (2D) materials. Ideally, these vdWHSs should be fabricated in a scalable and repeatable way and only in the specific areas of the substrate to lower the number of technological operations inducing defects and impurities. Here, we present a method of selective fabrication of vdWHSs via chemical vapor deposition by electron-beam (EB) irradiation. We distinguish two growth modes: positive (2D materials nucleate on the irradiated regions) on graphene and tungsten disulfide (WS₂) substrates, and negative (2D materials do not nucleate on the irradiated regions) on the graphene substrate. The growth mode is controlled by limiting the air exposure of the irradiated substrate and the time between irradiation and growth. We conducted Raman mapping, Kelvin-probe force microscopy, X-ray photoelectron spectroscopy, and density-functional theory modeling studies to investigate the selective growth mechanism. We conclude that the selective growth is explained by the competition of three effects: EB-induced defects, adsorption of carbon species, and electrostatic interaction. The method here is a critical step toward the industry-scale fabrication of 2D-materials-based devices.

Perforated Carbon Nanotube Film Assisted Growth of Uniform Monolayer MoS2

Scaling up the chemical vapor deposition (CVD) of monolayer transition metal dichalcogenides (TMDCs) is in high demand for practical applications. However, for CVD-grown TMDCs on a large scale, there are many existing factors that result in their poor uniformity. In particular, gas flow, which usually leads to inhomogeneous distributions of precursor concentrations, has yet to be well controlled. In this work, the growth of uniform monolayer MoS₂ on a large scale by the delicate control of gas flows of precursors, which is realized by vertically aligning a well-designed perforated carbon nanotube (p-CNT) film face-to-face with the substrate in a horizontal tube furnace, is achieved. The p-CNT film releases gaseous Mo precursor from the solid part and allows S vapor to pass through the hollow part, resulting in uniform distributions of both gas flow rate and precursor concentrations near the substrate. Simulation results further verify that the well-designed p-CNT film guarantees a steady gas flow and a uniform spatial distribution of precursors. Consequently, the as-grown monolayer MoS₂ shows quite good uniformity in geometry, density, structure, and electrical properties. This work provides a universal pathway for the synthesis of large-scale uniform monolayer TMDCs, and will advance their applications in high-performance electronic devices.

Reconfigurable Logic-in-Memory Computing Based on a Polarity-Controllable Two-Dimensional Transistor

Logic-in-memory architecture holds great promise to meet the high-performance and energy-efficient requirements of data-intensive scenarios. Two-dimensional compacted transistors embedded with logic functions are expected to extend Moore's law toward advanced nodes. Here we demonstrate that a WSe₂/h-BN/graphene based middle-floating-gate field-effect transistor can perform under diverse current levels due to the controllable polarity by the control gate, floating gate, and drain voltages. Such electrical tunable characteristics are employed for logic-in-memory architectures and can behave as reconfigurable logic functions of AND/XNOR within a single device. Compared to the conventional devices like floating-gate field-effect transistors, our design can greatly decrease the consumption of transistors. For AND/NAND, it can save 75% transistors by reducing the transistor number from 4 to 1; for XNOR/XOR, it is even up to 87.5% with the number being reduced from 8 to 1.

2D materials readiness for the transistor performance breakthrough

As the size of the transistor scales down, this strategy has confronted challenges because of the fundamental limits of silicon materials. Besides, more and more energy and time are consumed by the data transmission out of transistor computing because of the speed mismatching between the computing and memory. To meet the energy efficiency demands of big data computing, the transistor should have a smaller feature size and store data faster to overcome the energy burden of computing and data transfer. Electron transport in two-dimensional (2D) materials is constrained within a 2D plane and different materials are assembled by the van der Waals force. Owning to the atomic thickness and dangling-bond-free surface, 2D materials have demonstrated advantages in transistor scaling-down and heterogeneous structure innovation. In this review, from the performance breakthrough of 2D transistors, we discuss the opportunities, progress and challenges of 2D materials in transistor applications.

Reconfigurable Artificial Synapse Based on Ambipolar Floating Gate Memory

Artificial synapse networks capable of massively parallel computing and mimicking biological neural networks can potentially improve the processing efficiency of existing information technologies. Semiconductor devices functioning as excitatory and inhibitory synapses are crucial for developing intelligence systems, such as traffic control systems. However, achieving reconfigurability between two working modes (inhibitory and excitatory) and bilingual synaptic behavior in a single transistor remains challenging. This study successfully mimics a bilingual synaptic response using an artificial synapse based on an ambipolar floating gate memory comprising tungsten selenide (WSe₂)/hexagonal boron nitride (h-BN)/ molybdenum telluride (MoTe₂). In this WSe₂/h-BN/MoTe₂ structure, ambipolar semiconductors WSe₂ and MoTe₂ are inserted as channel and floating gates, respectively, and h-BN serves as the tunneling barrier layer. Using either positive or negative pulse amplitude modulations at the control gate, this device with bipolar channel conduction produced eight distinct resistance states. Based on this, we experimentally projected that we could achieve 490 memory states (210 hole-resistance states + 280 electron-resistance states). Using the bipolar charge transport and multistorage states of WSe₂/h-BN/MoTe₂ floating gate memory, we mimicked reconfigurable excitatory and inhibitory synaptic plasticity in a single device. Furthermore, the convolution neural network formed by these synaptic devices can recognize handwritten digits with an accuracy of >92%. This study identifies the unique properties of heterostructure devices based on two-dimensional materials as well as predicts their applicability in advanced recognition of neuromorphic computing.

Electronic/Optoelectronic Memory Device Enabled by Tellurium-based 2D van der Waals Heterostructure for in-Sensor Reservoir Computing at the Optical Communication Band

Although 2D materials are widely explored for data storage and neuromorphic computing, the construction of 2D material-based memory devices with optoelectronic responsivity in the short-wave infrared (SWIR) region for in-sensor reservoir computing (RC) at the optical communication band still remains a big challenge. In this work, an electronic/optoelectronic memory device enabled by tellurium-based 2D van der Waals (vdW) heterostructure is reported, where the ferroelectric CuInP₂ S₆ and tellurium channel endow this device with both the long-term potentiation/depression by voltage pulses and short-term potentiation by 1550 nm laser pulses (a typical wavelength in the conventional fiber optical communication band). Leveraging the rich dynamics, a fully memristive in-sensor RC system that can simultaneously sense, decode, and learn messages transmitted by optical fibers is demonstrated. The reported 2D vdW heterostructure-based memory featuring both the long-term and short-term memory behaviors using electrical and optical pulses in SWIR region has not only complemented the wide spectrum of applications of 2D materials family in electronics/optoelectronics but also paves the way for future smart signal processing systems at the edge.