Ultralow contact resistance between semimetal and monolayer semiconductors

Selective Laser-Assisted Direct Synthesis of MoS2 for Graphene/MoS2 Schottky Junction

Implementing a heterostructure by vertically stacking two-dimensional semiconductors is necessary for responding to various requirements in the future of semiconductor technology. However, the chemical-vapor deposition method, which is an existing two-dimensional (2D) material-processing method, inevitably causes heat damage to surrounding materials essential for functionality because of its high synthesis temperature. Therefore, the heterojunction of a 2D material that directly synthesized MoS2 on graphene using a laser-based photothermal reaction at room temperature was studied. The key to the photothermal-reaction mechanism is the difference in the photothermal absorption coefficients of the materials. The device in which graphene and MoS2 were vertically stacked using a laser-based photothermal reaction demonstrated its potential application as a photodetector that responds to light and its stability against cycling. The laser-based photothermal-reaction method for 2D materials will be further applied to various fields, such as transparent display electrodes, photodetectors, and solar cells, in the future.

Dynamical characteristics of AC-driven hybrid WSe2 monolayer/AlGaInP quantum wells light-emitting device

The exploration of functional light-emitting devices and numerous optoelectronic applications can be accomplished on an elegant platform provided by rapidly developing transition metal dichalcogenides (TMDCs). However, TMDCs-based light emitting devices encounter certain serious difficulties, such as high resistance losses from ohmic contacts or the need for complex heterostructures, which restricts the device applications. Despite the fact that AC-driven light emitting devices have developed ways to overcome these challenges, there is still a significant demand for multiple wavelength emission from a single device, which is necessary for full color light emitting devices. Here, we developed a dual-color AC-driven light-emitting device by integrating the WSe2 monolayer and AlGaInP-GaInP multiple quantum well (MQW) structures in the form of capacitor structure using AlOx insulating layer between the two emitters. In order to comprehend the characteristics of the hybrid device under various driving circumstances, we investigate the frequency-dependent EL intensity of the hybrid device using an equivalent RC circuit model. The time-resolved electroluminescence (TREL) characteristics of the hybrid device were analyzed in details to elucidate the underlying physical mechanisms governing its performance under varying applied frequencies. This dual-color hybrid light-emitting device enables the use of 2-D TMDC-based light emitters in a wider range of applications, including broad-band LEDs, quantum display systems, and chip-scale optoelectronic integrated systems.

12-inch growth of uniform MoS2 monolayer for integrated circuit manufacture

Two-dimensional (2D) semiconductors, such as transition metal dichalcogenides, provide an opportunity for beyond-silicon exploration. However, the lab to fab transition of 2D semiconductors is still in its preliminary stages, and it has been challenging to meet manufacturing standards of stability and repeatability. Thus, there is a natural eagerness to grow wafer-level, high-quality films with industrially acceptable scale-cost-performance metrics. Here we report an improved chemical vapour deposition synthesis method in which the controlled release of precursors and substrates predeposited with amorphous Al2O3 ensure the uniform synthesis of monolayer MoS2 as large as 12 inches while also enabling fast and non-toxic growth to reduce manufacturing costs. Transistor arrays were fabricated to further confirm the high quality of the film and its integrated circuit application potential. This work achieves the co-optimization of scale-cost-performance metrics and lays the foundation for advancing the integration of 2D semiconductors in industry-standard pilot lines.

Approaching Ohmic Contacts for Ideal Monolayer MoS2 Transistors Through Sulfur-Vacancy Engineering

Field-effect transistors (FETs) made of monolayer 2D semiconductors (e.g., MoS2 ) are among the basis of the future modern wafer chip industry. However, unusually high contact resistances at the metal-semiconductor interfaces have seriously limited the improvement of monolayer 2D semiconductor FETs so far. Here, a high-scale processable strategy is reported to achieve ohmic contact between the metal and monolayer MoS2 with a large number of sulfur vacancies (SVs) by using simple sulfur-vacancy engineering. Due to the successful doping of the contact regions by introducing SVs, the contact resistance of monolayer MoS2 FET is as low as 1.7 kΩ·µm. This low contact resistance enables high-performance MoS2 FETs with ultrahigh carrier mobility of 153 cm2 V-1 s-1 , a large on/off ratio of 4 × 109 , and high saturation current of 342 µA µm-1 . With the comprehensive investigation of different SV concentrations by adjusting the plasma duration, it is also demonstrated that the SV-increased electron doping, with its resulting reduced Schottky barrier, is the dominant factor driving enhanced electrical performance. The work provides a simple method to promote the development of industrialized atomically thin integrated circuits.

Engineering Single-Layer Hollow Structure of Transition Metal Dichalcogenides with High 1T-Phase Purity for Hydrogen Evolution Reaction

Rational design and controllable synthesis of hollow structures based on transition metal dichalcogenides (TMDs) have gained tremendous attention in the field of clean energy. However, the general synthetic strategies to fabricate single-layer hollow structures of TMDs, especially with unconventional phases (e.g., 1T or 1T'), still pose significant challenges. Herein, a scalable method is reported for the synthesis of single-layer hollow spheres (SLHS) of TMDs with high 1T-phase purity by etching bismuth (Bi) cores from pre-synthesized Bi@TMDs core-shell heterostructures including SLHS-1T-MoS2 , SLHS-1T-MoSe2 , SLHS-1T-WS2 , and SLHS-1T-WSe2 . Additionally, the etched Bi ions can be adsorbed on the single-layer TMDs shells in the form of single atoms (SAs) via the Bi─S bond. Due to the benefits of the single-layer hollow structure, high conductivity of 1T phase, and synergistic effect of Bi SAs and TMDs supports, the fabricated SLHS-1T-MoS2 exhibits superior electrocatalytic performance for hydrogen production. This work provides a way to manufacture advanced functional materials based on the single-layer hollow structures of 1T-TMDs and to expand their applications.

Semi-Transparent, Pixel-Free Upconversion Goggles with Dual Audio-Visual Communication

The intractable brittleness and opacity of the crystalline semiconductor restrict the prospect of developing low-cost imaging systems. Here, infrared visualization technologies are established with large-area, semi-transparent organic upconversion devices that bring high-resolution invisible images into sight without photolithography. To exploit all photoinduced charge carriers, a monolithic device structure is proposed built on the infrared-selective, single-component charge generation layer of chloroaluminum phthalocyanine (ClAlPc) coupled to two visible light-emitting layers manipulated with unipolar charges. Transient pump-probe spectroscopy reveals that the ClAlPc-based device exhibits an efficient charge dissociation process under forward bias. This process is indicated by the prompt and strong features of electroabsorption screening. Furthermore, by imposing the electric field, the ultrafast excited state dynamic suggests a prolonged charge carrier lifetime from the ClAlPc, which facilitates the charge utilization for upconversion luminance. For the first time, >30% of the infrared photons are utilized without photomultiplication strategies owing to the trivial spectrum overlap between ClAlPc and the emitter. In addition, the device can broadcast the acoustic signal by synchronizing the device frequency with the light source, which enables to operate it in dual audio-visual mode. The work demonstrates the potential of upconversion devices for affordable infrared imaging in wearable electronics.

High-Throughput Computational Screening of All-MXene Metal-Semiconductor Junctions for Schottky-Barrier-Free Contacts with Weak Fermi-Level Pinning

Van der Waals (vdW) metal-semiconductor junctions (MSJs) exhibit huge potential to reduce the contact resistance and suppress the Fermi-level pinning (FLP) for improving the device performance, but they are limited by optional (2D) metals with a wide range of work functions. Here a new class of vdW MSJs entirely composed of atomically thin MXenes is reported. Using high-throughput first-principles calculations, highly stable 80 metals and 13 semiconductors are screened from 2256 MXene structures. The selected MXenes cover a broad range of work functions (1.8-7.4 eV) and bandgaps (0.8-3 eV), providing a versatile material platform for constructing all-MXene vdW MSJs. The contact type of 1040 all-MXene vdW MSJs based on Schottky barrier heights (SBHs) is identified. Unlike conventional 2D vdW MSJs, the formation of all-MXene vdW MSJs leads to interfacial polarization, which is responsible for the FLP and deviation of SBHs from the prediction of Schottky-Mott rule. Based on a set of screening criteria, six Schottky-barrier-free MSJs with weak FLP and high carrier tunneling probability (>50%) are identified. This work offers a new way to realize vdW contacts for the development of high-performance electronic and optoelectronic devices.

The practice of reaction window in an electrocatalytic on-chip microcell

To enhance the efficiency of catalysis, it is crucial to comprehend the behavior of individual nanowires/nanosheets. A developed on-chip microcell facilitates this study by creating a reaction window that exposes the catalyst region of interest. However, this technology's potential application is limited due to frequently-observed variations in data between different cells. In this study, we identify a conductance problem in the reaction windows of non-metallic catalysts as the cause of this issue. We investigate this problem using in-situ electronic/electrochemical measurements and atom-thin nanosheets as model catalysts. Our findings show that a full-open window, which exposes the entire catalyst channel, allows for efficient modulation of conductance, which is ten times higher than a half-open window. This often-overlooked factor has the potential to significantly improve the conductivity of non-metallic catalysts during the reaction process. After examining tens of cells, we develop a vertical microcell strategy to eliminate the conductance issue and enhance measurement reproducibility. Our study offers guidelines for conducting reliable microcell measurements on non-metallic single nanowire/nanosheet catalysts.

Toward High-Performance p-Type Two-Dimensional Field Effect Transistors: Contact Engineering, Scaling, and Doping

n-type field effect transistors (FETs) based on two-dimensional (2D) transition-metal dichalcogenides (TMDs) such as MoS2 and WS2 have come close to meeting the requirements set forth in the International Roadmap for Devices and Systems (IRDS). However, p-type 2D FETs are dramatically lagging behind in meeting performance standards. Here, we adopt a three-pronged approach that includes contact engineering, channel length (Lch) scaling, and monolayer doping to achieve high performance p-type FETs based on synthetic WSe2. Using electrical measurements backed by atomistic imaging and rigorous analysis, Pd was identified as the favorable contact metal for WSe2 owing to better epitaxy, larger grain size, and higher compressive strain, leading to a lower Schottky barrier height. While the ON-state performance of Pd-contacted WSe2 FETs was improved by ∼10× by aggressively scaling Lch from 1 μm down to ∼20 nm, ultrascaled FETs were found to be contact limited. To reduce the contact resistance, monolayer tungsten oxyselenide (WOxSey) obtained using self-limiting oxidation of bilayer WSe2 was used as a p-type dopant. This led to ∼5× improvement in the ON-state performance and ∼9× reduction in the contact resistance. We were able to achieve a median ON-state current as high as ∼10 μA/μm for ultrascaled and doped p-type WSe2 FETs with Pd contacts. We also show the applicability of our monolayer doping strategy to other 2D materials such as MoS2, MoTe2, and MoSe2.

Origins of Fermi Level Pinning for Ni and Ag Metal Contacts on Tungsten Dichalcogenides

Tungsten transition metal dichalcogenides (W-TMDs) are intriguing due to their properties and potential for application in next-generation electronic devices. However, strong Fermi level (EF) pinning manifests at the metal/W-TMD interfaces, which could tremendously restrain the carrier injection into the channel. In this work, we illustrate the origins of EF pinning for Ni and Ag contacts on W-TMDs by considering interface chemistry, band alignment, impurities, and imperfections of W-TMDs, contact metal adsorption mechanism, and the resultant electronic structure. We conclude that the origins of EF pinning at a covalent contact metal/W-TMD interface, such as Ni/W-TMDs, can be attributed to defects, impurities, and interface reaction products. In contrast, for a van der Waals contact metal/TMD system such as Ag/W-TMDs, the primary factor responsible for EF pinning is the electronic modification of the TMDs resulting from the defects and impurities with the minor impact of metal-induced gap states. The potential strategies for carefully engineering the metal deposition approach are also discussed. This work unveils the origins of EF pinning at metal/TMD interfaces experimentally and theoretically and provides guidance on further enhancing and improving the device performance.

Controlled synthesis of van der Waals CoS2for improved p-type transistor contact

Two-dimensional (2D) van der Waals (vdW) p-type semiconductors have shown attractive application prospects as atomically thin channels in electronic devices. However, the high Schottky hole barrier of p-type semiconductor-metal contacts induced by Fermi-level pinning is hardly removed. Herein, we prepare a vdW 1T-CoS2nanosheet as the contact electrode of a WSe2field-effect transistor (FET), which shows a considerably high on/off ratio > 107and a hole mobility of ∼114.5 cm2V-1s-1. The CoS2nanosheets exhibit metallic conductivity with thickness dependence, which surpasses most 2D transition metal dichalcogenide metals or semimetals. The excellent FET performance of the CoS2-contacted WSe2FET device can be attributed to the high work function of CoS2, which lowers the Schottky hole barrier. Our work provides an effective method for growing vdW CoS2and opens up more possibilities for the application of 2D p-type semiconductors in electronic devices.

Process integration and future outlook of 2D transistors

2D semiconductors have been proposed as a potential option to replace or complement silicon electronics at the nanoscale. Here, the authors discuss the recent progress and remaining challenges that need to be addressed by the academic and industrial research communities towards the commercialization of 2D transistors.

2D-2D Nanoheterostructure of an Exposed {001}-Facet CuO and MoS2 Based Bifunctional Catalyst Showing Excellent Surface Chemistry and Conductivity for Cathodic CO2 Reduction

A novel CuO-MoS2 based heterostructure catalyst model system is proposed where a CuO nanosheet with exposed {001} facet with proper termination is the active surface for the catalysis and a MoS2 nanosheet is the supporting layer. Density functional theory (DFT) calculations were performed to validate the model. The MoS2 bilayer forms a stable heterostructure with {001} faceted CuO with different terminations exposing oxygen and copper atoms (active sites) on the surface. The heterostructure active sites with a low oxidation state of the copper atoms and subsurface oxygen atoms provide a suitable chemical environment for the selective production of multicarbon products from CO2 electrocatalytic reduction. Furthermore, our heterostructure model exhibits good electrical conductivity, efficient electron transport to active surface sites, and less interfacial resistance compared to similar heterostructure systems. Additionally, we propose a photoenhanced electrocatalysis mechanism due to the photoactive nature of MoS2. We suggest that the photogenerated carrier separation occurs because of the interface-induced dipole. Moreover, we utilized a machine learning model trained on a 2D DFT materials database to predict selected properties and compared them with the DFT results. Overall, our study provides insights into the structure-property relationship of a MoS2 supported 2D CuO nanosheet based bifunctional catalyst and highlights the advantages of heterostructure formation with selective morphology and properly terminated surface in tuning the catalytic performance of nanocomposite materials.

On-Chip Monolithically Integrated Ultraviolet Low-Threshold Plasmonic Metal-Semiconductor Heterojunction Nanolasers

The metal-semiconductor heterojunction is imperative for the realization of electrically driven nanolasers for chip-level platforms. Progress in developing such nanolasers has hitherto rarely been realized, however, because of their complexity in heterojunction fabrication and the need to use noble metals that are incompatible with microelectronic manufacturing. Most plasmonic nanolasers lase either above a high threshold (101 -103  MW cm-2 ) or at a cryogenic temperature, and lasing is possible only after they are removed from the substrate to avoid the large ohmic loss and the low modal reflectivity, making monolithic fabrication impossible. Here, for the first time, record-low-threshold, room-temperature ultraviolet (UV) lasing of plasmon-coupled core-shell nanowires that are directly grown on silicon is demonstrated. The naturally formed core-shell metal-semiconductor heterostructure of the nanowires leads to a 100-fold improvement in growth density over previous results. This unprecedentedly high nanowire density creates intense plasmonic resonance, which is outcoupled to the resonant Fabry-Pérot microcavity. By boosting the emission strength by a factor of 100, the hybrid photonic-plasmonic system successfully facilitates a record-low laser threshold of 12 kW cm-2 with a spontaneous emission coupling factor as high as ≈0.32 in the 340-360 nm range. Such architecture is simple and cost-competitive for future UV sources in silicon integration.

Performance limit of all-wrapped monolayer MoS2 transistors

All-wrapped transistors consisting of two-dimensional transition-metal dichalcogenide channels are appealing candidates for post-silicon electronics. Based on the Boltzmann transport theory, here we report a comprehensive theoretical survey on the performance limits for monolayer MoS2 transistors with three prototypical gate dielectrics (Al2O3, HfO2 and BN), by including primary extrinsic charge scattering mechanisms present in practical devices. A concept of "dead space" between the dielectrics and channels is proposed and used in calculation to ameliorate the general overestimation in scattering intensity of surface optical phonons, which enables an accurate description of electronic transport behavior. Crucial device indices, including charge mobility and current density, are thoroughly analyzed for transistors at post-silicon technological nodes beyond 1 nm. The on-state current is estimated to be generally greater than 2 mA μm-1 at channel lengths below 10 nm. The results clarify the potential benefits in performance from extremely miniaturized monolayer-channel transistors for More-Moore electronics.

ZrTe2 Compound Dirac Semimetal Contacts for High-Performance MoS2 Transistors

Recent investigations reveal elemental semimetal (Bi and Sb) contacts fabricated with conventional deposition processes exhibit a remarkable capacity of approaching the quantum limit in two-dimensional (2D) semiconductor contacts, implying it might be an optimal option to solve the contact issue of 2D semiconductor electronics. Here, we demonstrate novel compound Dirac semimetal ZrTe2 contacts to MoS2 constructed by a nondestructive van der Waals (vdW) transfer process, exhibiting excellent ohmic contact characteristics with a negligible Schottky barrier. The band hybridization between ZrTe2 and MoS2 was verified. The bilayer MoS2 transistor with a 250 nm channel length on a 20 nm thick hexagonal boron nitride (h-BN) exhibits an ION/IOFF current ratio over 105 and an on-state current of 259 μA μm-1. The current results reveal that 2D compound semimetals with vdW contacts can offer a diverse selection of proper semimetals with adjustable work functions for the next-generation 2D-based beyond-silicon electronics.

An all 2D bio-inspired gustatory circuit for mimicking physiology and psychology of feeding behavior

Animal behavior involves complex interactions between physiology and psychology. However, most AI systems neglect psychological factors in decision-making due to a limited understanding of the physiological-psychological connection at the neuronal level. Recent advancements in brain imaging and genetics have uncovered specific neural circuits that regulate behaviors like feeding. By developing neuro-mimetic circuits that incorporate both physiology and psychology, a new emotional-AI paradigm can be established that bridges the gap between humans and machines. This study presents a bio-inspired gustatory circuit that mimics adaptive feeding behavior in humans, considering both physiological states (hunger) and psychological states (appetite). Graphene-based chemitransistors serve as artificial gustatory taste receptors, forming an electronic tongue, while 1L-MoS2 memtransistors construct an electronic-gustatory-cortex comprising a hunger neuron, appetite neuron, and feeding circuit. This work proposes a novel paradigm for emotional neuromorphic systems with broad implications for human health. The concept of gustatory emotional intelligence can extend to other sensory systems, benefiting future humanoid AI.

Monolithic 3D integration of 2D transistors and vertical RRAMs in 1T-4R structure for high-density memory

Emerging data-intensive computation has driven the advanced packaging and vertical stacking of integrated circuits, for minimized latency and energy consumption. Yet a monolithic three-dimensional (3D) integrated structure with interleaved logic and high-density memory layers has been difficult to achieve due to challenges in managing the thermal budget. Here we experimentally demonstrate a monolithic 3D integration of atomically-thin molybdenum disulfide (MoS2) transistors and 3D vertical resistive random-access memories (VRRAMs), with the MoS2 transistors stacked between the bottom-plane and top-plane VRRAMs. The whole fabrication process is integration-friendly (below 300 °C), and the measurement results confirm that the top-plane fabrication does not affect the bottom-plane devices. The MoS2 transistor can drive each layer of VRRAM into four resistance states. Circuit-level modeling of the monolithic 3D structure demonstrates smaller area, faster data transfer, and lower energy consumption than a planar memory. Such platform holds a high potential for energy-efficient 3D on-chip memory systems.

A bio-inspired visuotactile neuron for multisensory integration

Multisensory integration is a salient feature of the brain which enables better and faster responses in comparison to unisensory integration, especially when the unisensory cues are weak. Specialized neurons that receive convergent input from two or more sensory modalities are responsible for such multisensory integration. Solid-state devices that can emulate the response of these multisensory neurons can advance neuromorphic computing and bridge the gap between artificial and natural intelligence. Here, we introduce an artificial visuotactile neuron based on the integration of a photosensitive monolayer MoS2 memtransistor and a triboelectric tactile sensor which minutely captures the three essential features of multisensory integration, namely, super-additive response, inverse effectiveness effect, and temporal congruency. We have also realized a circuit which can encode visuotactile information into digital spiking events, with probability of spiking determined by the strength of the visual and tactile cues. We believe that our comprehensive demonstration of bio-inspired and multisensory visuotactile neuron and spike encoding circuitry will advance the field of neuromorphic computing, which has thus far primarily focused on unisensory intelligence and information processing.

Simultaneously ultrafast and robust two-dimensional flash memory devices based on phase-engineered edge contacts

As the prevailing non-volatile memory (NVM), flash memory offers mass data storage at high integration density and low cost. However, due to the 'speed-retention-endurance' dilemma, their typical speed is limited to ~microseconds to milliseconds for program and erase operations, restricting their application in scenarios with high-speed data throughput. Here, by adopting metallic 1T-LixMoS2 as edge contact, we show that ultrafast (10-100 ns) and robust (endurance>106 cycles, retention>10 years) memory operation can be simultaneously achieved in a two-dimensional van der Waals heterostructure flash memory with 2H-MoS2 as semiconductor channel. We attribute the superior performance to the gate tunable Schottky barrier at the edge contact, which can facilitate hot carrier injection to the semiconductor channel and subsequent tunneling when compared to a conventional top contact with high density of defects at the metal interface. Our results suggest that contact engineering can become a strategy to further improve the performance of 2D flash memory devices and meet the increasing demands of high speed and reliable data storage.

ALD-grown two-dimensional TiSx metal contacts for MoS2 field-effect transistors

Metal contacts to MoS2 field-effect transistors (FETs) play a determinant role in the device electrical characteristics and need to be chosen carefully. Because of the Schottky barrier (SB) and the Fermi level pinning (FLP) effects that occur at the contact/MoS2 interface, MoS2 FETs often suffer from high contact resistance (Rc). One way to overcome this issue is to replace the conventional 3D bulk metal contacts with 2D counterparts. Herein, we investigate 2D metallic TiSx (x ∼ 1.8) as top contacts for MoS2 FETs. We employ atomic layer deposition (ALD) for the synthesis of both the MoS2 channels as well as the TiSx contacts and assess the electrical performance of the fabricated devices. Various thicknesses of TiSx are grown on MoS2, and the resultant devices are electrically compared to the ones with the conventional Ti metal contacts. Our findings show that the replacement of 5 nm Ti bulk contacts with only ∼1.2 nm of 2D TiSx is beneficial in improving the overall device metrics. With such ultrathin TiSx contacts, the ON-state current (ION) triples and increases to ∼35 μA μm-1. Rc also reduces by a factor of four and reaches ∼5 MΩ μm. Such performance enhancements were observed despite the SB formed at the TiSx/MoS2 interface is believed to be higher than the SB formed at the Ti/MoS2 interface. These device metric improvements could therefore be mainly associated with an increased level of electrostatic doping in MoS2, as a result of using 2D TiSx for contacting the 2D MoS2. Our findings are also well supported by TCAD device simulations.

Low Ohmic contact resistance and high on/off ratio in transition metal dichalcogenides field-effect transistors via residue-free transfer

Beyond-silicon technology demands ultrahigh performance field-effect transistors. Transition metal dichalcogenides provide an ideal material platform, but the device performances such as the contact resistance, on/off ratio and mobility are often limited by the presence of interfacial residues caused by transfer procedures. Here, we show an ideal residue-free transfer approach using polypropylene carbonate with a negligible residue coverage of ~0.08% for monolayer MoS2 at the centimetre scale. By incorporating a bismuth semimetal contact with an atomically clean monolayer MoS2 field-effect transistor on hexagonal boron nitride substrate, we obtain an ultralow Ohmic contact resistance of ~78 Ω µm, approaching the quantum limit, and a record-high on/off ratio of ~1011 at 15 K. Such an ultra-clean fabrication approach could be the ideal platform for high-performance electrical devices using large-area semiconducting transition metal dichalcogenides.

Scalable integration of hybrid high-κ dielectric materials on two-dimensional semiconductors

Two-dimensional (2D) semiconductors are promising channel materials for next-generation field-effect transistors (FETs). However, it remains challenging to integrate ultrathin and uniform high-κ dielectrics on 2D semiconductors to fabricate FETs with large gate capacitance. We report a versatile two-step approach to integrating high-quality dielectric film with sub-1 nm equivalent oxide thickness (EOT) on 2D semiconductors. Inorganic molecular crystal Sb2O3 is homogeneously deposited on 2D semiconductors as a buffer layer, which forms a high-quality oxide-to-semiconductor interface and offers a highly hydrophilic surface, enabling the integration of high-κ dielectrics via atomic layer deposition. Using this approach, we can fabricate monolayer molybdenum disulfide-based FETs with the thinnest EOT (0.67 nm). The transistors exhibit an on/off ratio of over 106 using an ultra-low operating voltage of 0.4 V, achieving unprecedently high gating efficiency. Our results may pave the way for the application of 2D materials in low-power ultrascaling electronics.

Mechanistic understanding of the interfacial properties of metal-PtSe2 contacts

With the advantages of a moderate band gap, high carrier mobility and good environmental stability, two-dimensional (2D) semiconductors show promising applications in next-generation electronics. However, the accustomed metal-2D semiconductor contact may lead to a strong Fermi level pinning (FLP) effect, which severely limits the practical performance of 2D electronics. Herein, the interfacial properties of the contacts between a promising 2D semiconductor, PtSe2, and a sequence of metal electrodes are systematically investigated. The strong interfacial interactions formed in all metal-PtSe2 contacts lead to chemical bonds and a significant interfacial dipole, resulting in a vertical Schottky barrier for Ag, Au, Pd and Pt-based systems and a lateral Schottky barrier for Al, Cu, Sc and Ti-based systems, with a strong FLP effect. Remarkably, the tunneling probability for most metal-PtSe2 is significantly high and the tunneling-specific resistivity is two orders of magnitude lower than that of the state-of-the-art contacts, demonstrating the high efficiency for electron injection from metals to PtSe2. Moreover, the introduction of h-BN as a buffer layer leads to a weakened FLP effect (S = 0.50) and the transformation into p-type Schottky contact for Pt-PtSe2 contacts. These results reveal the underlying mechanism of the interfacial properties of metal-PtSe2 contacts, which is useful for designing advanced 2D semiconductor-based electronics.

Deciphering Vacancy Defect Evolution of 2D MoS2 for Reliable Transistors

Two-dimensional (2D) MoS2 is an excellent candidate channel material for next-generation integrated circuit (IC) transistors. However, the reliability of MoS2 is of great concern due to the serious threat of vacancy defects, such as sulfur vacancies (VS). Evaluating the impact of vacancy defects on the service reliability of MoS2 transistors is crucial, but it has always been limited by the difficulty in systematically tracking and analyzing the changes and effects of vacancy defects in the service environment. Here, a simulated initiator is established for deciphering the evolution of vacancy defects in MoS2 and their influence on the reliability of transistors. The results indicate that VS below 1.3% are isolated by slow enrichment during initiation. Over 1.3% of VS tend to enrich in pairs and over 3.5% of the enriched VS easily evolve into nanopores. The enriched VS with electron doping in the channel cause the threshold voltage (Vth) negative drift approaching 6 V, while the expanded nanopores initiate the Vth roll-off and punch-through of transistors. Finally, sulfur steam deposition has been proposed to constrain VS enrichment, and reliable MoS2 transistors are constructed. Our research provides a new method for deciphering and identifying the impact of defects.

Enhanced electrochemical performance of the MoS2/Bi2S3 nanocomposite-based electrode material prepared by a hydrothermal method for supercapacitor applications

Supercapacitors are widely used energy storage systems in the modern world due to their excellent electrochemical performance, fast charging capability, easy handling, and high power density. In the present work, pure MoS2 and MoS2/Bi2S3 nanocomposites with different compositions of bismuth were synthesized by the hydrothermal method. The structural properties of the electrode materials were studied using the XRD technique, which confirmed the formation of MoS2 and the secondary phase of Bi2S3 while increasing Bi substitution. The morphological studies of the synthesized electrode materials were performed using SEM, TEM, and HRTEM techniques, which indicated the 3D layered hierarchical structure of MoS2 nanospheres and the nanosheet-like structure of Bi2S3. The electrochemical properties of pristine MoS2 and MoS2/Bi2S3 nanocomposites were analysed by CV, CP, and EIS techniques using a 2 M KOH electrolyte in a three-electrode system. The CV curves show evidence of significant improvement in the electrochemical performance of MoS2/Bi2S3 composites compared to that of pure MoS2. The calculated specific capacitances of MoS2/Bi2S3 nanocomposites were relatively higher than those of pristine MoS2. The 20 mol% Bi added sample showed a maximum specific capacitance of 371 F g-1, compared to pristine MoS2 and other samples at a current density of 1 A g-1. The kinetics of the electrochemical process was studied. The Nyquist plots indicated that the Bi-added nanocomposites had lower Resr and RCT values, which resulted in high electrochemical performance. The experimental results revealed that Bi-substitution can further enhance the electrochemical energy storage performance of MoS2 for supercapacitor applications.

Mobility Enhancement of Strained MoS2 Transistor on Flat Substrate

Strain engineering has been proposed as a promising method to boost the carrier mobility of two-dimensional (2D) semiconductors. However, state-of-the-art straining approaches are largely based on putting 2D semiconductors on flexible substrates or rough substrate with nanostructures (e.g., nanoparticles, nanorods, ripples), where the observed mobility change is not only dependent on channel strain but could be impacted by the change of dielectric environment as well as rough interface scattering. Therefore, it remains an open question whether the pure lattice strain could improve the carrier mobilities of 2D semiconductors, limiting the achievement of high-performance 2D transistors. Here, we report a strain engineering approach to fabricate highly strained MoS2 transistors on a flat substrate. By mechanically laminating a prefabricated MoS2 transistor onto a custom-designed trench structure on flat substrate, well-controlled strain can be uniformly generated across the 2D channel. In the meantime, the substrate and the back-gate dielectric layer remain flat without any roughness-induced scattering effect or variation of the dielectric environment. Based on this technique, we demonstrate the MoS2 electron mobility could be enhanced by tension strain and decreased by compression strain, consistent with theoretical predictions. The highest mobility enhancement is 152% for monolayer MoS2 and 64% for bilayer MoS2 transistors, comparable to that of a silicon device. Our method not only provides a compatible approach to uniformly strain the layered semiconductors on flat and solid substrate but also demonstrates an effective method to boost the carrier mobilities of 2D transistors.

Fabrication of p-type 2D single-crystalline transistor arrays with Fermi-level-tuned van der Waals semimetal electrodes

High-performance p-type two-dimensional (2D) transistors are fundamental for 2D nanoelectronics. However, the lack of a reliable method for creating high-quality, large-scale p-type 2D semiconductors and a suitable metallization process represents important challenges that need to be addressed for future developments of the field. Here, we report the fabrication of scalable p-type 2D single-crystalline 2H-MoTe2 transistor arrays with Fermi-level-tuned 1T'-phase semimetal contact electrodes. By transforming polycrystalline 1T'-MoTe2 to 2H polymorph via abnormal grain growth, we fabricated 4-inch 2H-MoTe2 wafers with ultra-large single-crystalline domains and spatially-controlled single-crystalline arrays at a low temperature (~500 °C). Furthermore, we demonstrate on-chip transistors by lithographic patterning and layer-by-layer integration of 1T' semimetals and 2H semiconductors. Work function modulation of 1T'-MoTe2 electrodes was achieved by depositing 3D metal (Au) pads, resulting in minimal contact resistance (~0.7 kΩ·μm) and near-zero Schottky barrier height (~14 meV) of the junction interface, and leading to high on-state current (~7.8 μA/μm) and on/off current ratio (~105) in the 2H-MoTe2 transistors.

The future transistors

The metal-oxide-semiconductor field-effect transistor (MOSFET), a core element of complementary metal-oxide-semiconductor (CMOS) technology, represents one of the most momentous inventions since the industrial revolution. Driven by the requirements for higher speed, energy efficiency and integration density of integrated-circuit products, in the past six decades the physical gate length of MOSFETs has been scaled to sub-20 nanometres. However, the downscaling of transistors while keeping the power consumption low is increasingly challenging, even for the state-of-the-art fin field-effect transistors. Here we present a comprehensive assessment of the existing and future CMOS technologies, and discuss the challenges and opportunities for the design of FETs with sub-10-nanometre gate length based on a hierarchical framework established for FET scaling. We focus our evaluation on identifying the most promising sub-10-nanometre-gate-length MOSFETs based on the knowledge derived from previous scaling efforts, as well as the research efforts needed to make the transistors relevant to future logic integrated-circuit products. We also detail our vision of beyond-MOSFET future transistors and potential innovation opportunities. We anticipate that innovations in transistor technologies will continue to have a central role in driving future materials, device physics and topology, heterogeneous vertical and lateral integration, and computing technologies.

Multifunctional Magnetic Oxide-MoS2 Heterostructures on Silicon

Correlated oxides and related heterostructures are intriguing for developing future multifunctional devices by exploiting their exotic properties, but their integration with other materials, especially on Si-based platforms, is challenging. Here, van der Waals heterostructures of La0.7 Sr0.3 MnO3 (LSMO) , a correlated manganite perovskite, and MoS2 are demonstrated on Si substrates with multiple functions. To overcome the problems due to the incompatible growth process, technologies involving freestanding LSMO membranes and van der Waals force-mediated transfer are used to fabricate the LSMO-MoS2 heterostructures. The LSMO-MoS2 heterostructures exhibit a gate-tunable rectifying behavior, based on which metal-semiconductor field-effect transistors (MESFETs) with on-off ratios of over 104 can be achieved. The LSMO-MoS2 heterostructures can function as photodiodes displaying considerable open-circuit voltages and photocurrents. In addition, the colossal magnetoresistance of LSMO endows the LSMO-MoS2 heterostructures with an electrically tunable magnetoresponse at room temperature. This work not only proves the applicability of the LSMO-MoS2 heterostructure devices on Si-based platform but also demonstrates a paradigm to create multifunctional heterostructures from materials with disparate properties.

Transition from Schottky to ohmic contacts in the C31 and MoS2 van der Waals heterostructure

The utilization of conventional metal contacts has restricted the industrial implementation of two-dimensional channel materials. To address this issue, we conducted first-principles calculations to investigate the interface properties of C₃₁ and MoS₂ contacts. An ohmic contact and a low van der Waals barrier were found in the C₃₁/MoS₂ heterostructure. Our findings provide a promising new contact metal material for two-dimensional nanodevices based on MoS₂.

Observation of Rich Defect Dynamics in Monolayer MoS2

Defects play a pivotal role in limiting the performance and reliability of nanoscale devices. Field-effect transistors (FETs) based on atomically thin two-dimensional (2D) semiconductors such as monolayer MoS₂ are no exception. Probing defect dynamics in 2D FETs is therefore of significant interest. Here, we present a comprehensive insight into various defect dynamics observed in monolayer MoS₂ FETs at varying gate biases and temperatures. The measured source-to-drain currents exhibit random telegraph signals (RTS) owing to the transfer of charges between the semiconducting channel and individual defects. Based on the modeled temperature and gate bias dependence, oxygen vacancies or aluminum interstitials are probable defect candidates. Several types of RTSs are observed including anomalous RTS and giant RTS indicating local current crowding effects and rich defect dynamics in monolayer MoS₂ FETs. This study explores defect dynamics in large area-grown monolayer MoS₂ with ALD-grown Al₂O₃ as the gate dielectric.

Tunable Contact Types and Interfacial Electronic Properties in TaS2/MoS2 and TaS2/WSe2 Heterostructures

Following the successful experimental synthesis of single-layer metallic 1T-TaS₂ and semiconducting 2H-MoS₂, 2H-WSe₂, we perform a first-principles study to investigate the electronic and interfacial features of metal/semiconductor 1T-TaS₂/2H-MoS₂ and 1T-TaS₂/2H-WSe₂ van der Waals heterostructures (vdWHs) contact. We show that 1T-TaS₂/2H-MoS₂ and 1T-TaS₂/2H-WSe₂ form n-type Schottky contact (n-ShC type) and p-type Schottky contact (p-ShC type) with ultralow Schottky barrier height (SBH), respectively. This indicates that 1T-TaS₂ can be considered as an effective metal contact with high charge injection efficiency for 2H-MoS₂, 2H-WSe₂ semiconductors. In addition, the electronic structure and interfacial properties of 1T-TaS₂/2H-MoS₂ and 1T-TaS₂/2H-WSe₂ van der Waals heterostructures can be transformed from n-type to p-type Schottky contact through the effect of layer spacing and the electric field. At the same time, the transition from Schottky contact to Ohmic contact can also occur by relying on the electric field and different interlayer spacing. Our results may provide a new approach for photoelectric application design based on metal/semiconductor 1T-TaS₂/2H-MoS₂ and 1T-TaS₂/2H-WSe₂ van der Waals heterostructures.

Ultrafast van der Waals diode using graphene quantum capacitance and Fermi-level depinning

Graphene, with superior electrical tunabilities, has arisen as a multifunctional insertion layer in vertically stacked devices. Although the role of graphene inserted in metal-semiconductor junctions has been well investigated in quasi-static charge transport regime, the implication of graphene insertion at ultrahigh frequencies has rarely been considered. Here, we demonstrate the diode operation of vertical Pt/n-MoSe₂/graphene/Au assemblies at ~200-GHz cutoff frequency (f_C). The electric charge modulation by the inserted graphene becomes essentially frozen above a few GHz frequencies due to graphene quantum capacitance-induced delay, so that the Ohmic graphene/MoSe₂ junction may be transformed to a pinning-free Schottky junction. Our diodes exhibit much lower total capacitance than devices without graphene insertion, deriving an order of magnitude higher f_C, which clearly demonstrates the merit of graphene at high frequencies.

Contact-engineered reconfigurable two-dimensional Schottky junction field-effect transistor with low leakage currents

Two-dimensional (2D) materials have been considered promising candidates for future low power-dissipation and reconfigurable integrated circuit applications. However, 2D transistors with intrinsic ambipolar transport polarity are usually affected by large off-state leakage currents and small on/off ratios. Here, we report the realization of a reconfigurable Schottky junction field-effect transistor (SJFET) in an asymmetric van der Waals contact geometry, showing a balanced and switchable n- and p-unipolarity with the I_ds on/off ratio kept >10⁶. Meanwhile, the static leakage power consumption was suppressed to 10^-5 nW. The SJFET worked as a reversible Schottky rectifier with an ideality factor of ~1.0 and a tuned rectifying ratio from 3 × 10⁶ to 2.5 × 10^-6. This empowered the SJFET with a reconfigurable photovoltaic performance in which the sign of the open-circuit voltage and photo-responsivity were substantially switched. This polarity-reversible SJFET paves an alternative way to develop reconfigurable 2D devices for low-power-consumption photovoltaic logic circuits.

Argon and Oxygen Gas Flow Rate Dependency of Sputtering-Based Indium-Gallium-Zinc Oxide Thin-Film Transistors

Oxygen vacancies are a major factor that controls the electrical characteristics of the amorphous indium-gallium-zinc oxide transistor (a-IGZO TFT). Oxygen vacancies are affected by the composition ratio of the a-IGZO target and the injected oxygen flow rate. In this study, we fabricated three types of a-IGZO TFTs with different oxygen flow rates and then investigated changes in electrical characteristics. Atomic force microscopy (AFM) was performed to analyze the surface morphology of the a-IGZO films according to the oxygen gas rate. Furthermore, X-ray photoelectron spectroscopy (XPS) analysis was performed to confirm changes in oxygen vacancies of a-IGZO films. The optimized a-IGZO TFT has enhanced electrical characteristics such as carrier mobility (μ) of 12.3 cm²/V·s, on/off ratio of 1.25 × 10¹⁰ A/A, subthreshold swing (S.S.) of 3.7 V/dec, and turn-on voltage (V_to) of -3 V. As a result, the optimized a-IGZO TFT has improved electrical characteristics with oxygen vacancies having the highest conductivity.

Controlled Synthesis and Accurate Doping of Wafer-Scale 2D Semiconducting Transition Metal Dichalcogenides

2D semiconducting transition metal dichalcogenide (TMDCs) possess atomically thin thickness, a dangling-bond-free surface, flexible band structure, and silicon-compatible feature, making them one of the most promising channels for constructing state-of-the-art field-effect transistors in the post-Moore's era. However, the existing 2D semiconducting TMDCs fall short of meeting the industry criteria for practical applications in electronics due to their small domain size and the lack of an effective approach to modulate intrinsic physical properties. Therefore, it is crucial to prepare and dope 2D semiconducting TMDCs single crystals with wafer size. In this review, the up-to-date progress regarding the wafer-scale growth of 2D semiconducting TMDC polycrystalline and single-crystal films is systematically summarized. The domain orientation control of 2D TMDCs and the seamless stitching of unidirectionally aligned 2D islands by means of substrate design are proposed. In addition, the accurate and uniform doping of 2D semiconducting TMDCs and the effect on electronic device performances are also discussed. Finally, the dominating challenges pertaining to the enhancement of the electronic device performances of TMDCs are emphasized, and further development directions are put forward. This review provides a systematic and in-depth summary of high-performance device applications of 2D semiconducting TMDCs.

Two-Terminal MoS2 Memristor and the Homogeneous Integration with a MoS2 Transistor for Neural Networks

Memristors are promising candidates for constructing neural networks. However, their dissimilar working mechanism to that of the addressing transistors can result in a scaling mismatch, which may hinder efficient integration. Here, we demonstrate two-terminal MoS₂ memristors that work with a charge-based mechanism similar to that in transistors, which enables the homogeneous integration with MoS₂ transistors to realize one-transistor-one-memristor addressable cells for assembling programmable networks. The homogenously integrated cells are implemented in a 2 × 2 network array to demonstrate the enabled addressability and programmability. The potential for assembling a scalable network is evaluated in a simulated neural network using obtained realistic device parameters, which achieves over 91% pattern recognition accuracy. This study also reveals a generic mechanism and strategy that can be applied to other semiconducting devices for the engineering and homogeneous integration of memristive systems.

Low power flexible monolayer MoS2 integrated circuits

Monolayer molybdenum disulfide (ML-MoS₂) is an emergent two-dimensional (2D) semiconductor holding potential for flexible integrated circuits (ICs). The most important demands for the application of such ML-MoS₂ ICs are low power consumption and high performance. However, these are currently challenging to satisfy due to limitations in the material quality and device fabrication technology. In this work, we develop an ultra-thin high-κ dielectric/metal gate fabrication technique for the realization of thin film transistors based on high-quality wafer scale ML-MoS₂ on both rigid and flexible substrates. The rigid devices can be operated in the deep-subthreshold regime with low power consumption and show negligible hysteresis, sharp subthreshold slope, high current density, and ultra-low leakage currents. Moreover, we realize fully functional large-scale flexible ICs operating at voltages below 1 V. Our process could represent a key step towards using energy-efficient flexible ML-MoS₂ ICs in portable, wearable, and implantable electronics.

The Schottky barrier transistor in emerging electronic devices

This paper explores how the Schottky barrier (SB) transistor is used in a variety of applications and material systems. A discussion of SB formation, current transport processes, and an overview of modeling are first considered. Three discussions follow, which detail the role of SB transistors in high performance, ubiquitous and cryogenic electronics. For high performance computing, the SB typically needs to be minimized to achieve optimal performance and we explore the methods adopted in carbon nanotube technology and two-dimensional electronics. On the contrary for ubiquitous electronics, the SB can be used advantageously in source-gated transistors and reconfigurable field-effect transistors (FETs) for sensors, neuromorphic hardware and security applications. Similarly, judicious use of an SB can be an asset for applications involving Josephson junction FETs.

Bridging Synthesis and Controllable Doping of Monolayer 4 in. Length Transition-Metal Dichalcogenides Single Crystals with High Electron Mobility

Epitaxial growth and controllable doping of wafer-scale atomically thin semiconductor single crystals are two central tasks to tackle the scaling challenge of transistors. Despite considerable efforts are devoted, addressing such crucial issues simultaneously under 2D confinement is yet to be realized. Here, an ingenious strategy to synthesize record-breaking 4 in. length Fe-doped transition-metal dichalcogenides (TMDCs) single crystals on industry-compatible c-plane sapphire without special miscut angle is designed. Atomically thin transistors with high electron mobility (≈146 cm² V^-1 s^-1 ) and remarkable on/off current ratio (≈10⁹ ) are fabricated based on 4 in. length Fe-MoS₂ single crystals, due to the ultralow contact resistance (≈489 Ω µm). In-depth characterizations and theoretical calculations reveal that the introduction of Fe significantly decreases the formation energy of parallel steps on sapphire surfaces and contributes to the edge-nucleation of unidirectional alignment TMDCs domains (>99%). This work represents a substantial leap in terms of bridging synthesis and doping of wafer-scale 2D semiconductor single crystals, which should promote the further device downscaling and extension of Moore's law.

Integration of Self-Passivated Topological Electrodes for Advanced 2D Optoelectronic Devices

With the rapid development of two-dimensional semiconductor technology, the inevitable chemical disorder at a typical metal-semiconductor interface has become an increasingly serious problem that degrades the performance of 2D semiconductor optoelectronic devices. Herein, defect-free van der Waals contacts have been achieved by utilizing topological Bi₂ Se₃ as the electrodes. Such clean and atomically sharp contacts avoid the consumption of photogenerated carriers at the interface, enabling a markedly boosted sensitivity as compared to counterpart devices with directly deposited metal electrodes. Typically, the device with 2D WSe₂ channel realizes a high responsivity of 20.5 A W^-1 , an excellent detectivity of 2.18 × 10¹²  Jones, and a fast rise/decay time of 41.66/38.81 ms. Furthermore, high-resolution visible-light imaging capability of the WSe₂ device is demonstrated, indicating its promising application prospect in future optoelectronic systems. More inspiringly, the topological electrodes are universally applicable to other 2D semiconductor channels, including WS₂ and InSe, suggesting its broad applicability. These results open fascinating opportunities for the development of high-performance electronics and optoelectronics.

Dielectrics for Two-Dimensional Transition-Metal Dichalcogenide Applications

Despite over a decade of intense research efforts, the full potential of two-dimensional transition-metal dichalcogenides continues to be limited by major challenges. The lack of compatible and scalable dielectric materials and integration techniques restrict device performances and their commercial applications. Conventional dielectric integration techniques for bulk semiconductors are difficult to adapt for atomically thin two-dimensional materials. This review provides a brief introduction into various common and emerging dielectric synthesis and integration techniques and discusses their applicability for 2D transition metal dichalcogenides. Dielectric integration for various applications is reviewed in subsequent sections including nanoelectronics, optoelectronics, flexible electronics, valleytronics, biosensing, quantum information processing, and quantum sensing. For each application, we introduce basic device working principles, discuss the specific dielectric requirements, review current progress, present key challenges, and offer insights into future prospects and opportunities.

Effects of Coulomb Blockade on the Charge Transport through the Topological States of Finite Armchair Graphene Nanoribbons and Heterostructures

In this study, we investigate the charge transport properties of semiconducting armchair graphene nanoribbons (AGNRs) and heterostructures through their topological states (TSs), with a specific focus on the Coulomb blockade region. Our approach employs a two-site Hubbard model that takes into account both intra- and inter-site Coulomb interactions. Using this model, we calculate the electron thermoelectric coefficients and tunneling currents of serially coupled TSs (SCTSs). In the linear response regime, we analyze the electrical conductance (Ge), Seebeck coefficient (S), and electron thermal conductance (κe) of finite AGNRs. Our results reveal that at low temperatures, the Seebeck coefficient is more sensitive to many-body spectra than electrical conductance. Furthermore, we observe that the optimized S at high temperatures is less sensitive to electron Coulomb interactions than Ge and κe. In the nonlinear response regime, we observe a tunneling current with negative differential conductance through the SCTSs of finite AGNRs. This current is generated by electron inter-site Coulomb interactions rather than intra-site Coulomb interactions. Additionally, we observe current rectification behavior in asymmetrical junction systems of SCTSs of AGNRs. Notably, we also uncover the remarkable current rectification behavior of SCTSs of 9-7-9 AGNR heterostructure in the Pauli spin blockade configuration. Overall, our study provides valuable insights into the charge transport properties of TSs in finite AGNRs and heterostructures. We emphasize the importance of considering electron-electron interactions in understanding the behavior of these materials.

2D materials readiness for the transistor performance breakthrough

As the size of the transistor scales down, this strategy has confronted challenges because of the fundamental limits of silicon materials. Besides, more and more energy and time are consumed by the data transmission out of transistor computing because of the speed mismatching between the computing and memory. To meet the energy efficiency demands of big data computing, the transistor should have a smaller feature size and store data faster to overcome the energy burden of computing and data transfer. Electron transport in two-dimensional (2D) materials is constrained within a 2D plane and different materials are assembled by the van der Waals force. Owning to the atomic thickness and dangling-bond-free surface, 2D materials have demonstrated advantages in transistor scaling-down and heterogeneous structure innovation. In this review, from the performance breakthrough of 2D transistors, we discuss the opportunities, progress and challenges of 2D materials in transistor applications.

Tuneable 2D surface Bismuth incorporation on InAs nanosheets

The chemical bonding at the interface between compound semiconductors and metals is central in determining electronic and optical properties. In this study, new opportunities for controlling this are presented for nanostructures. We investigate Bi adsorption on 2D wurtzite InAs (112̄0) nanosheets and find that temperature-controlled Bi incorporation in either anionic- or cationic-like bonding is possible in the easily accesible range between room temperature and 400 °C. This separation could not be achieved for ordinary zinc blende InAs(110) surfaces. As the crystal structures of the two surfaces have identical nearest neighbour configurations, this indicates that overall geometric differences can significantly alter the adsorption and incorporation. Ab initio theoretical modelling confirms observed adsorption results, but indicate that both the formation energies as well as kinetic barriers contributes to the observed temperature dependent behaviour. Further, we find that the Bi adsorption rate can differ by at least 2.5 times between the two InAs surfaces while being negligible for standard Si substrates under similar deposition conditions. This, in combination with the observed interface control, provides an excellent opportunity for tuneable Bi integration on 2D InAs nanostructures on standard Si substrates.

Modulation of Contact Resistance of Dual-Gated MoS2 FETs Using Fermi-Level Pinning-Free Antimony Semi-Metal Contacts

Achieving low contact resistance (R_C ) is one of the major challenges in producing 2D FETs for future CMOS technology applications. In this work, the electrical characteristics for semimetal (Sb) and normal metal (Ti) contacted MoS₂ devices are systematically analyzed as a function of top and bottom gate-voltages (V_TG and V_BG ). The semimetal contacts not only significantly reduce R_C but also induce a strong dependence of R_C on V_TG , in sharp contrast to Ti contacts that only modulate R_C by varying V_BG . The anomalous behavior is attributed to the strongly modulated pseudo-junction resistance (R_jun ) by V_TG , resulting from weak Fermi level pinning (FLP) of Sb contacts. In contrast, the resistances under both metallic contacts remain unchanged by V_TG as metal screens the electric field from the applied V_TG . Technology computer aided design simulations further confirm the contribution of V_TG to R_jun , which improves overall R_C of Sb-contacted MoS₂ devices. Consequently, the Sb contact has a distinctive merit in dual-gated (DG) device structure, as it greatly reduces R_C and enables effective gate control by both V_BG and V_TG . The results offer new insight into the development of DG 2D FETs with enhanced contact properties realized by using semimetals.

Two-dimensional MoSi2As4-based field-effect transistors integrating switching and gas-sensing functions

Multifunctional nanoscale devices integrating multiple functions are of great importance for meeting the requirements of next-generation electronics. Herein, using first-principles calculations, we propose multifunctional devices based on the two-dimensional monolayer MoSi₂As₄, where a single-gate field-effect transistor (FET) and FET-type gas sensor are integrated. After introducing the optimizing strategies, such as underlap structures and dielectrics with a high dielectric constant (κ), we designed a 5 nm gate-length MoSi₂As₄ FET, whose performance fulfilled the key criteria of the International Technology Roadmap for Semiconductors (ITRS) for high-performance semiconductors. Under the joint adjustment of the underlap structure and high-κ dielectric material, the on/off ratio of the 5 nm gate-length FET reached up to 1.38 × 10⁴. In addition, driven by the high-performance FET, the MoSi₂As₄-based FET-type gas sensor showed a sensitivity of 38% for NH₃ and 46% for NO_2. Moreover, the weak interaction between NH₃ (NO₂) and MoSi₂As₄ favored the recycling of the sensor. Furthermore, the sensitivity of the sensor could be effectively improved by the gate voltage, and was increased up to 67% (74%) for NH₃ (NO₂). Our work provides theoretical guidance for the fabrication of multifunctional devices combining a high-performance FET and sensitive gas sensor.

Hardware Trojans based on two-dimensional memtransistors

Hardware Trojans (HTs) have emerged as a major security threat for integrated circuits (ICs) owing to the involvement of untrustworthy actors in the globally distributed semiconductor supply chain. HTs are intentional malicious modifications, which remain undetectable through simple electrical measurements but can cause catastrophic failure in the functioning of ICs in mission critical applications. In this article, we show how two-dimensional (2D) material based in-memory computing elements such as memtransistors can be used as hardware Trojans. We found that logic gates based on 2D memtransistors can be made to malfunction by exploiting their inherent programming capabilities. While we use 2D memtransistor-based ICs as the testbed for our demonstration, the results are equally applicable to any state-of-the-art and emerging in-memory computing technologies.

Self-Limiting Growth of Monolayer Tungsten Disulfide Nanoribbons on Tungsten Oxide Nanowires

Transition metal dichalcogenides (TMDCs) are promising two-dimensional (2D) materials for next-generation optoelectronic devices; they can also provide opportunities for further advances in physics. Structuring 2D TMDC sheets as nanoribbons has tremendous potential for electronic state modification. However, a bottom-up synthesis of long TMDC nanoribbons with high monolayer selectivity on a large scale has not yet been reported yet. In this study, we successfully synthesized long W_xO_y nanowires and grew monolayer WS₂ nanoribbons on their surface. The supply of source atoms from a vapor-solid bilayer and chemical reaction at the atomic-scale interface promoted a self-limiting growth process. The developed method exhibited a high monolayer selection yield on a large scale and enabled the growth of long (∼100 μm) WS₂ nanoribbons with electronic properties characterized by optical spectroscopy and electrical transport measurements. The produced nanoribbons were isolated from W_xO_y nanowires by mechanical exfoliation and used as channels for field-effect transistors. The findings of this study can be used in future optoelectronic device applications and advanced physics research.