Van der Waals contacts between three-dimensional metals and two-dimensional semiconductors

Chemically Tailored Growth of 2D Semiconductors via Hybrid Metal-Organic Chemical Vapor Deposition

Two-dimensional (2D) semiconducting transition-metal dichalcogenides (TMDCs) are an exciting platform for excitonic physics and next-generation electronics, creating a strong demand to understand their growth, doping, and heterostructures. Despite significant progress in solid-source (SS-) and metal-organic chemical vapor deposition (MOCVD), further optimization is necessary to grow highly crystalline 2D TMDCs with controlled doping. Here, we report a hybrid MOCVD growth method that combines liquid-phase metal precursor deposition and vapor-phase organo-chalcogen delivery to leverage the advantages of both MOCVD and SS-CVD. Using our hybrid approach, we demonstrate WS2 growth with tunable morphologies─from separated single-crystal domains to continuous monolayer films─on a variety of substrates, including sapphire, SiO2, and Au. These WS2 films exhibit narrow neutral exciton photoluminescence line widths down to 27-28 meV and room-temperature mobility up to 34-36 cm2 V-1 s-1. Through simple modifications to the liquid precursor composition, we demonstrate the growth of V-doped WS2, MoxW1-xS2 alloys, and in-plane WS2-MoS2 heterostructures. This work presents an efficient approach for addressing a variety of TMDC synthesis needs on a laboratory scale.

Multifunctional microwave absorption materials: construction strategies and functional applications

The widespread adoption of wireless communication technology, especially with the introduction of artificial intelligence and the Internet of Things, has greatly improved our quality of life. However, this progress has led to increased electromagnetic (EM) interference and pollution issues. The development of advanced microwave absorbing materials (MAMs) is one of the most feasible solutions to solve these problems, and has therefore received widespread attention. However, MAMs still face many limitations in practical applications and are not yet widely used. This paper presents a comprehensive review of the current status and future prospects of MAMs, and identifies the various challenges from practical application scenarios. Furthermore, strategies and principles for the construction of multifunctional MAMs are discussed in order to address the possible problems that are faced. This article also presents the potential applications of MAMs in other fields including environmental science, energy conversion, and medicine. Finally, an analysis of the potential outcomes and future challenges of multifunctional MAMs are presented.

Precisely Tailoring WSe2 Polarity via van der Waals Bismuth-Gold Modulated Contact

Creating high-quality contacts between high-melting-point metals and delicate two-dimensional (2D) semiconductors poses a critical challenge to polarity control due to inevitable chemical disorder and Fermi-level pinning observed in the contact regions. Here, we report a van der Waals (vdW) integration strategy to precisely tailor the WSe2 polarity by meticulously modulating metal contact compositions. Controlling the low-melting-point bismuth (Bi) thickness effectively modulates the Bi/Au dominant contact with WSe2. This facilitates the precise polarity transformation between n-type, ambipolar, and p-type, with exceptional field-effect mobilities of 200 cm2 V-1 s-1 for electrons and 136 cm2 V-1 s-1 for holes. Within this vdW geometry, we further demonstrate the fundamental electrical components such as diodes and complementary inverters with enhanced rectification ratios and voltage gains. Our results showcase an effective and compatible with mass manufacturing method for precise polarity modulation of 2D semiconductors, providing a promising pathway toward large-scale high-performance 2D electronics and integrated circuits.

Synthesis, Modulation, and Application of Two-Dimensional TMD Heterostructures

Two-dimensional (2D) transition metal dichalcogenide (TMD) heterostructures have attracted a lot of attention due to their rich material diversity and stack geometry, precise controllability of structure and properties, and potential practical applications. These heterostructures not only overcome the inherent limitations of individual materials but also enable the realization of new properties through appropriate combinations, establishing a platform to explore new physical and chemical properties at micro-nano-pico scales. In this review, we systematically summarize the latest research progress in the synthesis, modulation, and application of 2D TMD heterostructures. We first introduce the latest techniques for fabricating 2D TMD heterostructures, examining the rationale, mechanisms, advantages, and disadvantages of each strategy. Furthermore, we emphasize the importance of characteristic modulation in 2D TMD heterostructures and discuss some approaches to achieve novel functionalities. Then, we summarize the representative applications of 2D TMD heterostructures. Finally, we highlight the challenges and future perspectives in the synthesis and device fabrication of 2D TMD heterostructures and provide some feasible solutions.

Contact Resistance Engineering in WS2-Based FET with MoS2 Under-Contact Interlayer: A Statistical Approach

One of the primary factors hindering the development of 2D material-based devices is the difficulty of overcoming fabrication processes, which pose a challenge in achieving low-resistance contacts. Widely used metal deposition methods lead to unfavorable Fermi level pinning effect (FLP), which prevents control over the Schottky barrier height at the metal/2D material junction. We propose to harness the FLP effect to lower contact resistance in field-effect transistors (FETs) by using an additional 2D interlayer at the conducting channel and metallic contact interface (under-contact interlayer). To do so, we developed a new approach using the gold-assisted transfer method, which enables the fabrication of heterostructures consisting of TMDs monolayers with complex shapes, prepatterned using e-beam lithography, with lateral dimensions even down to 100 nm. We designed and demonstrated tungsten disulfide (WS2) monolayer-based devices in which the molybdenum disulfide (MoS2) monolayer is placed only in the contact area of the FET, creating an Au/MoS2/WS2 junction, which effectively reduces contact resistance by over 60% and improves the Ion/Ioff ratio 10 times in comparison to WS2-based devices without MoS2 under-contact interlayer. The enhancement in the device operation arises from the FLP effect occurring only at the interface between the metal and the first layer of the MoS2/WS2 heterostructure. This results in favorable band alignment, which enhances the current flow through the junction. To ensure the reproducibility of our devices, we systematically analyzed 160 FET devices fabricated with under-contact interlayer and without it. Statistical analysis shows a consistent improvement in the operation of the device and reveals the impact of contact resistance on key FET performance indicators.

Self-Aligned Edge Contact Process for Fabricating High-Performance Transition-Metal Dichalcogenide Field-Effect Transistors

The persistent challenges encountered in metal-transition-metal dichalcogenide (TMD) junctions, including tunneling barriers and Fermi-level pinning, pose significant impediments to achieving optimal charge transport and reducing contact resistance. To address these challenges, a pioneering self-aligned edge contact (SAEC) process tailored for TMD-based field-effect transistors (FETs) is developed by integrating a WS2 semiconductor with a hexagonal boron nitride dielectric via reactive ion etching. This approach streamlines semiconductor fabrication by enabling edge contact formation without the need for additional lithography steps. Notably, SAEC TMD-based FETs exhibit exceptional device performance, featuring a high on/off current ratio of ∼108, field-effect mobility of up to 120 cm2/V·s, and controllable polarity─essential attributes for advanced TMD-based logic circuits. Furthermore, the SAEC process enables precise electrode positioning and effective minimization of parasitic capacitance, which are pivotal for attaining high-speed characteristics in TMD-based electronics. The compatibility of the SAEC technique with existing Si self-aligned processes underscores its feasibility for integration into post-CMOS applications, heralding an upcoming era of integration of TMDs into Si semiconductor electronics. The introduction of the SAEC process represents a significant advancement in TMD-based microelectronics and is poised to unlock the full potential of TMDs for future electronic technologies.

Low Contact Resistance on Monolayer MoS2 Field-Effect Transistors Achieved by CMOS-Compatible Metal Contacts

Contact engineering on monolayer layer (ML) semiconducting transition metal dichalcogenides (TMDs) is considered the most challenging problem toward using these materials as a transistor channel in future advanced technology nodes. The typically observed strong Fermi-level pinning induced in part by the reaction of the source/drain contact metal and the ML TMD frequently results in a large Schottky barrier height, which limits the electrical performance of ML TMD field-effect transistors (FETs). However, at a microscopic level, little is known about how interface defects or reaction sites impact the electrical performance of ML TMD FETs. In this work, we have performed statistically meaningful electrical measurements on at least 120 FETs combined with careful surface analysis to unveil contact resistance dependence on interface chemistry. In particular, we achieved a low contact resistance for ML MoS2 FETs with ultrahigh-vacuum (UHV, 3 × 10-11 mbar) deposited Ni contacts, ∼500 Ω·μm, which is 5 times lower than the contact resistance achieved when deposited under high-vacuum (HV, 3 × 10-6 mbar) conditions. These electrical results strongly correlate with our surface analysis observations. X-ray photoelectron spectroscopy (XPS) revealed significant bonding species between Ni and MoS2 under UHV conditions compared to that under HV. We also studied the Bi/MoS2 interface under UHV and HV deposition conditions. Different from the case of Ni, we do not observe a difference in contact resistance or interface chemistry between contacts deposited under UHV and HV. Finally, this article also explores the thermal stability and reliability of the two contact metals employed here.

Innovations of metallic contacts on semiconducting 2D transition metal dichalcogenides toward advanced 3D-structured field-effect transistors

2D semiconductors, represented by transition metal dichalcogenides (TMDs), have the potential to be alternative channel materials for advanced 3D field-effect transistors, such as gate-all-around field-effect-transistors (GAAFETs) and complementary field-effect-transistors (C-FETs), due to their inherent atomic thinness, moderate mobility, and short scaling lengths. However, 2D semiconductors encounter several technological challenges, especially the high contact resistance issue between 2D semiconductors and metals. This review provides a comprehensive overview of the high contact resistance issue in 2D semiconductors, including its physical background and the efforts to address it, with respect to their applicability to GAAFET structures.

Large-Area Epitaxial Growth of Transition Metal Dichalcogenides

Over the past decade, research on atomically thin two-dimensional (2D) transition metal dichalcogenides (TMDs) has expanded rapidly due to their unique properties such as high carrier mobility, significant excitonic effects, and strong spin-orbit couplings. Considerable attention from both scientific and industrial communities has fully fueled the exploration of TMDs toward practical applications. Proposed scenarios, such as ultrascaled transistors, on-chip photonics, flexible optoelectronics, and efficient electrocatalysis, critically depend on the scalable production of large-area TMD films. Correspondingly, substantial efforts have been devoted to refining the synthesizing methodology of 2D TMDs, which brought the field to a stage that necessitates a comprehensive summary. In this Review, we give a systematic overview of the basic designs and significant advancements in large-area epitaxial growth of TMDs. We first sketch out their fundamental structures and diverse properties. Subsequent discussion encompasses the state-of-the-art wafer-scale production designs, single-crystal epitaxial strategies, and techniques for structure modification and postprocessing. Additionally, we highlight the future directions for application-driven material fabrication and persistent challenges, aiming to inspire ongoing exploration along a revolution in the modern semiconductor industry.

Performance Limits and Advancements in Single 2D Transition Metal Dichalcogenide Transistor

Two-dimensional (2D) transition metal dichalcogenides (TMDs) allow for atomic-scale manipulation, challenging the conventional limitations of semiconductor materials. This capability may overcome the short-channel effect, sparking significant advancements in electronic devices that utilize 2D TMDs. Exploring the dimension and performance limits of transistors based on 2D TMDs has gained substantial importance. This review provides a comprehensive investigation into these limits of the single 2D-TMD transistor. It delves into the impacts of miniaturization, including the reduction of channel length, gate length, source/drain contact length, and dielectric thickness on transistor operation and performance. In addition, this review provides a detailed analysis of performance parameters such as source/drain contact resistance, subthreshold swing, hysteresis loop, carrier mobility, on/off ratio, and the development of p-type and single logic transistors. This review details the two logical expressions of the single 2D-TMD logic transistor, including current and voltage. It also emphasizes the role of 2D TMD-based transistors as memory devices, focusing on enhancing memory operation speed, endurance, data retention, and extinction ratio, as well as reducing energy consumption in memory devices functioning as artificial synapses. This review demonstrates the two calculating methods for dynamic energy consumption of 2D synaptic devices. This review not only summarizes the current state of the art in this field but also highlights potential future research directions and applications. It underscores the anticipated challenges, opportunities, and potential solutions in navigating the dimension and performance boundaries of 2D transistors.

Hydrogen-Bonding Integrated Low-Dimensional Flexible Electronics Beyond the Limitations of van der Waals Contacts

Van der Waals (vdW) integration enables clean contacts for low-dimensional electronic devices. The limitation remains; however, that an additional tunneling contact resistance occurs owing to the inherent vdW gap between the metal and the semiconductor. Here, it is demonstrated from theoretical calculations that stronger non-covalent hydrogen-bonding interactions facilitate electron tunneling and significantly reduce the contact resistance; thus, promising to break the limitations of the vdW contact. π-plane hydrogen-bonding contacts in surface-engineered MXene/carbon nanotube metal/semiconductor heterojunctions are realized, and an anomalous temperature-dependent tunneling resistance is observed. Low-dimensional flexible thin-film transistors integrated by hydrogen-bonding contacts exhibit both excellent flexibility and carrier mobility orders of magnitude higher than their counterparts with vdW contacts. This strategy demonstrates a scalable solution for realizing high-performance and low-power flexible electronics beyond vdW contacts.

High-Performance WS2 MOSFETs with Bilayer WS2 Contacts

WS2 is a promising transition-metal dichalcogenide (TMDC) for use as a channel material in extreme-scaled metal-oxide-semiconductor field-effect transistors (MOSFETs) due to its monolayer thickness, high carrier mobility, and its potential for symmetric n-type and p-type MOSFET performance. However, the formation of stable, low-barrier-height contacts to monolayer TMDCs continues to be a challenge. This study introduces an innovative approach to realize high-performance WS2 MOSFETs by utilizing bilayer WS2 (2L-WS2) in the contact region grown through a two-step chemical vapor deposition process. The 2L-WS2 devices demonstrate a high I ON/I OFF ratio of 108 and a saturated drain current, I D(SAT), of 280 μA/μm (386 μA/μm) at room temperature (78 K), even while still using conventional metal (Pd or Ni) contacts. Devices featuring a 1L-WS2 channel and 2L-WS2 in the contact regions were also fabricated, and they exhibited performance comparable to that of 2L-WS2 devices. The devices also exhibit good stability with nearly identical performance after storage over a 13 month period. The study highlights the benefits of a hybrid channel thickness approach for TMDC transistors.

Edge-Passivated Monolayer WSe2 Nanoribbon Transistors

The ongoing reduction in transistor sizes drives advancements in information technology. However, as transistors shrink to the nanometer scale, surface and edge states begin to constrain their performance. 2D semiconductors like transition metal dichalcogenides (TMDs) have dangling-bond-free surfaces, hence achieving minimal surface states. Nonetheless, edge state disorder still limits the performance of width-scaled 2D transistors. This work demonstrates a facile edge passivation method to enhance the electrical properties of monolayer WSe2 nanoribbons, by combining scanning transmission electron microscopy, optical spectroscopy, and field-effect transistor (FET) transport measurements. Monolayer WSe2 nanoribbons are passivated with amorphous WOxSey at the edges, which is achieved using nanolithography and a controlled remote O2 plasma process. The same nanoribbons, with and without edge passivation are sequentially fabricated and measured. The passivated-edge nanoribbon FETs exhibit 10 ± 6 times higher field-effect mobility than the open-edge nanoribbon FETs, which are characterized with dangling bonds at the edges. WOxSey edge passivation minimizes edge disorder and enhances the material quality of WSe2 nanoribbons. Owing to its simplicity and effectiveness, oxidation-based edge passivation could become a turnkey manufacturing solution for TMD nanoribbons in beyond-silicon electronics and optoelectronics.

Controlled Fabrication of Metallic MoO2 Nanosheets towards High-Performance p-Type 2D Transistors

Two-dimensional (2D) semiconducting transition metal dichalcogenides (TMDCs) are extensively employed as channel materials in advanced electronic devices. The electrical contacts between electrodes and 2D semiconductors play a crucial role in the development of high-performance transistors. While numerous strategies for electrode interface engineering have been proposed to enhance the performance of n-type 2D transistors, upgrading p-type ones in a similar manner remains a challenge. In this work, significant improvements in a p-type WSe2 transistor are demonstrated by utilizing metallic MoO2 nanosheets as the electrode contact, which are controllably fabricated through physical vapor deposition and subsequent annealing. The MoO2 nanosheets exhibit an exceptional electrical conductivity of 8.4 × 104 S m‒1 and a breakdown current density of 3.3 × 106 A cm‒2. The work function of MoO2 nanosheets is determined to be ≈5.1 eV, making them suitable for contacting p-type 2D semiconductors. Employing MoO2 nanosheets as the electrode contact in WSe2 transistors results in a notable increase in the field-effect mobility to 92.0 cm2 V‒1 s‒1, which is one order of magnitude higher than the counterpart devices with conventional electrodes. This study not only introduces an intriguing 2D metal oxide to improve the electrical contact in p-type 2D transistors, but also offers an effective approach to fabricating all-2D devices.

Precursor-Confined Chemical Vapor Deposition of 2D Single-Crystalline SexTe1-x Nanosheets for p-Type Transistors and Inverters

Two-dimensional (2D) tellurium (Te) is emerging as a promising p-type candidate for constructing complementary metal-oxide-semiconductor (CMOS) architectures. However, its small bandgap leads to a high leakage current and a low on/off current ratio. Although alloying Te with selenium (Se) can tune its bandgap, thermally evaporated SexTe1-x thin films often suffer from grain boundaries and high-density defects. Herein, we introduce a precursor-confined chemical vapor deposition (CVD) method for synthesizing single-crystalline SexTe1-x alloy nanosheets. These nanosheets, with tunable compositions, are ideal for high-performance field-effect transistors (FETs) and 2D inverters. The preformation of Se-Te frameworks in our developed CVD method plays a critical role in the growth of SexTe1-x nanosheets with high crystallinity. Optimizing the Se composition resulted in a Se0.30Te0.70 nanosheet-based p-type FET with a large on/off current ratio of 4 × 105 and a room-temperature hole mobility of 120 cm2·V-1·s-1, being eight times higher than thermally evaporated SexTe1-x with similar composition and thickness. Moreover, we successfully fabricated an inverter based on p-type Se0.30Te0.70 and n-type MoS2 nanosheets, demonstrating a typical voltage transfer curve with a gain of 30 at an operation voltage of Vdd = 3 V.

In situ via Contact to hBN-Encapsulated Air-Sensitive Atomically Thin Semiconductors

Establishing reliable electrical contacts to atomically thin materials is a prerequisite for both fundamental studies and applications yet remains a challenge. In particular, the development of contact techniques for air-sensitive monolayers has lagged behind, despite their unique properties and significant potential for applications. Here, we present a robust method to create contacts to device layers encapsulated within hexagonal boron nitride (hBN). This method uses plasma etching and metal deposition to create 'vias' in the hBN with graphene forming an atomically thin etch-stop. The resulting partially fluorinated graphene (PFG) protects the underlying device layer from air-induced degradation and damage during metal deposition. PFG is resistive in-plane but maintains high out-of-plane conductivity. The work function of the PFG/metal contact is tunable through the degree of fluorination, offering opportunities for contact engineering. Using the in situ via technique, we achieve ambipolar contact to air-sensitive monolayer 2H-molybdenum ditelluride (MoTe2) with more than 1 order of magnitude improvement in on-current density compared to previous literature. The complete encapsulation provides high reproducibility and long-term stability. The technique can be extended to other air-sensitive materials as well as air-stable materials, offering highly competitive device performance.

Boltzmann Switching MoS2 Metal-Semiconductor Field-Effect Transistors Enabled by Monolithic-Oxide-Gapped Metal Gates at the Schottky-Mott Limit

A gate stack that facilitates a high-quality interface and tight electrostatic control is crucial for realizing high-performance and low-power field-effect transistors (FETs). However, when constructing conventional metal-oxide-semiconductor structures with two-dimensional (2D) transition metal dichalcogenide channels, achieving these requirements becomes challenging due to inherent difficulties in obtaining high-quality gate dielectrics through native oxidation or film deposition. Here, a gate-dielectric-less device architecture of van der Waals Schottky gated metal-semiconductor FETs (vdW-SG MESFETs) using a molybdenum disulfide (MoS2) channel and surface-oxidized metal gates such as nickel and copper is reported. Benefiting from the strong SG coupling, these MESFETs operate at remarkably low gate voltages, <0.5 V. Notably, they also exhibit Boltzmann-limited switching behavior featured by a subthreshold swing of ≈60 mV dec-1 and negligible hysteresis. These ideal FET characteristics are attributed to the formation of a Fermi-level (EF) pinning-free gate stack at the Schottky-Mott limit. Furthermore, authors experimentally and theoretically confirm that EF depinning can be achieved by suppressing both metal-induced and disorder-induced gap states at the interface between the monolithic-oxide-gapped metal gate and the MoS2 channel. This work paves a new route for designing high-performance and energy-efficient 2D electronics.

The future of two-dimensional semiconductors beyond Moore's law

The primary challenge facing silicon-based electronics, crucial for modern technological progress, is difficulty in dimensional scaling. This stems from a severe deterioration of transistor performance due to carrier scattering when silicon thickness is reduced below a few nanometres. Atomically thin two-dimensional (2D) semiconductors still maintain their electrical characteristics even at sub-nanometre scales and offer the potential for monolithic three-dimensional (3D) integration. Here we explore a strategic shift aimed at addressing the scaling bottleneck of silicon by adopting 2D semiconductors as new channel materials. Examining both academic and industrial viewpoints, we delve into the latest trends in channel materials, the integration of metal contacts and gate dielectrics, and offer insights into the emerging landscape of industrializing 2D semiconductor-based transistors for monolithic 3D integration.

Van der Waals Schottky Junction Photodetector with Ultrahigh Rectifying Ratio and Switchable Photocurrent Generation

Metal-semiconductor junctions play an important role in the development of electronic and optoelectronic devices. A Schottky junction photodetector based on two-dimensional (2D) materials is promising for self-powered photodetection with fast response speed and large signal-to-noise ratio. However, it usually suffers from an uncontrolled Schottky barrier due to the Fermi level pinning effect arising from the interface states. In this work, all-2D Schottky junctions with near-ideal Fermi level depinning are realized, attributed to the high-quality interface between 2D semimetals and semiconductors. We further demonstrate asymmetric diodes based on multilayer graphene/MoS2/PtSe2 with a current rectification ratio exceeding 105 and an ideality factor of 1.2. Scanning photocurrent mapping shows that the photocurrent generation mechanism in the heterostructure switches from photovoltaic effect to photogating effect at varying drain biases, indicating both energy conversion and optical sensing are realized in a single device. In the photovoltaic mode, the photodetector is self-powered with a response time smaller than 100 μs under the illumination of a 405 nm laser. In the photogating mode, the photodetector exhibits a high responsivity up to 460 A/W originating from a high photogain. Finally, the photodetector is employed for single-pixel imaging, demonstrating its high-contrast photodetection ability. This work provides insight into the development of high-performance self-powered photodetectors based on 2D Schottky junctions.

The Contact Properties of Monolayer and Multilayer MoS2-Metal van der Waals Interfaces

The contact resistance formed between MoS2 and metal electrodes plays a key role in MoS2-based electronic devices. The Schottky barrier height (SBH) is a crucial parameter for determining the contact resistance. However, the SBH is difficult to modulate because of the strong Fermi-level pinning (FLP) at MoS2-metal interfaces. Here, we investigate the FLP effect and the contact types of monolayer and multilayer MoS2-metal van der Waals (vdW) interfaces using density functional theory (DFT) calculations based on Perdew-Burke-Ernzerhof (PBE) level. It has been demonstrated that, compared with monolayer MoS2-metal close interfaces, the FLP effect can be significantly reduced in monolayer MoS2-metal vdW interfaces. Furthermore, as the layer number of MoS2 increases from 1L to 4L, the FLP effect is first weakened and then increased, which can be attributed to the charge redistribution at the MoS2-metal and MoS2-MoS2 interfaces. In addition, the p-type Schottky contact can be achieved in 1L-4L MoS2-Pt, 3L MoS2-Au, and 2L-3L MoS2-Pd vdW interfaces, which is useful for realizing complementary metal oxide semiconductor (CMOS) logic circuits. These findings indicated that the FLP and contact types can be effectively modulated at MoS2-metal vdW interfaces by selecting the layer number of MoS2.

First-Principles Study of the Schottky Contact, Tunneling Probability, and Optical Properties of MX/TiB4 Heterojunctions (M = Ge, Sn; X = S, Se, Te): Strain Engineering Tunability

Designing two-dimensional (2D) heterojunctions with rapid response and minimal energy consumption holds immense significance for the advancement of the next generation of electronic devices. Here, we construct a series of Schottky heterojunctions based on TiB4 monolayer and group-IV monochalcogenide monolayers MX (M = Ge, Sn; X = S, Se, Te). Using first-principles calculations, we investigate the structural stability, Schottky contact barrier, tunneling probability, and optical properties of MX/TiB4 heterojunctions. The calculated binding energies reveal that X-type MX/TiB4 heterojunctions exhibit more stable structures than M- and C-type stacking modes. Schottky barrier heights (SBHs) indicate that X-type GeSe/TiB4 and GeTe/TiB4 form n-type Schottky contacts with SBHs of 0.497 and 0.132 eV, respectively, while SnS/TiB4 and SnSe/TiB4 form p-type Schottky contacts with SBHs of 0.557 and 0.418 eV, respectively. Moreover, X-type MX/TiB4 heterojunctions exhibit high susceptibility to interlayer electron tunneling due to their large tunneling probability and strong interlayer interaction. Meanwhile, enhanced optical absorption capacity in MX/TiB4 heterojunctions is also observed compared with individual TiB4 and MX monolayers. By applying in-plane biaxial strain, the transformation of MX/TiB4 heterojunctions from a Schottky contact to an Ohmic contact can also be realized. Our findings could offer valuable candidate materials and guidance for the design of the next generation of nanodevices with high electronic and optical performances.

Small Feature-Size Transistors Based on Low-Dimensional Materials: From Structure Design to Nanofabrication Techniques

For several decades after Moore's Law is proposed, there is a continuous effort to reduce the feature-size of transistors. However, as the size of transistors continues to decrease, numerous challenges and obstacles including severe short channel effects (SCEs) are emerging. Recently, low-dimensional materials have provided new opportunities for constructing small feature-size transistors due to their superior electrical properties compared to silicon. Here, state-of-the-art low-dimensional materials-based transistors with small feature-sizes are reviewed. Different from other works that mainly focus on material characteristics of a specific device structure, the discussed topics are utilizing device structure design including vertical structure and nano-gate structure, and nanofabrication techniques to achieve small feature-sizes of transistors. A comprehensive summary of these small feature-size transistors is presented by illustrating their operation mechanism, relevant fabrication processes, and corresponding performance parameters. Besides, the role of small feature-size transistors based on low-dimensional materials in further reducing the small footprint is also clarified and their cutting-edge applications are highlighted. Finally, a comparison and analysis between state-of-art transistors is made, as well as a glimpse into the future research trajectory of low dimensional materials-based small feature-size transistors is briefly outlined.

Optimizing Ultrathin 2D Transistors for Monolithic 3D Integration: A Study on Directly Grown Nanocrystalline Interconnects and Buried Contacts

The potential of monolithic 3D integration technology is largely dependent on the enhancement of interconnect characteristics which can lead to thinner stacks, better heat dissipation, and reduced signal delays. Carbon materials such as graphene, characterized by sp2 hybridized carbons, are promising candidates for future interconnects due to their exceptional electrical, thermal conductivity and resistance to electromigration. However, a significant challenge lies in achieving low contact resistance between extremely thin semiconductor channels and graphitic materials. To address this issue, an innovative wafer-scale synthesis approach is proposed that enables low contact resistance between dry-transferred 2D semiconductors and the as-grown nanocrystalline graphitic interconnects. A hybrid graphitic interconnect with metal doping reduces the sheet resistance by 84% compared to an equivalent thickness metal film. Furthermore, the introduction of a buried graphitic contact results in a contact resistance that is 17 times lower than that of bulk metal contacts (>40 nm). Transistors with this optimal structure are used to successfully demonstrate a simple logic function. The thickness of active layer is maintained within sub-7 nm range, encompassing both channels and contacts. The ultrathin transistor and interconnect stack developed here, characterized by a readily etchable interlayer and low parasitic resistance, leads to heterogeneous integration of future 3D integrated circuits (ICs).

Reliable wafer-scale integration of two-dimensional materials and metal electrodes with van der Waals contacts

Since the first report on single-layer MoS2 based transistor, rapid progress has been achieved in two-dimensional (2D) material-based atomically thin electronics, providing an alternative approach to solve the bottleneck in silicon device miniaturization. In this scenario, reliable contact between the metal electrodes and the subnanometer-thick 2D materials becomes crucial in determining the device performance. Here, utilizing the quasi-van der Waals (vdW) epitaxy of metals on fluorophlogopite mica, we demonstrate an all-stacking method for the fabrication of 2D devices with high-quality vdW contacts by mechanically transferring pre-deposited metal electrodes. This technique is applicable for complex device integration with sizes up to the wafer scale and is also capable of tuning the electric characteristics of the interfacial junctions by transferring selective metals. Our results provide an efficient, scalable, and low-cost technique for 2D electronics, allowing high-density device integration as well as a handy tool for fundamental research in vdW materials.

Trifluoromethylation of 2D Transition Metal Dichalcogenides: A Mild Functionalization and Tunable p-Type Doping Method

Chemical modification is a powerful strategy for tuning the electronic properties of 2D semiconductors. Here we report the electrophilic trifluoromethylation of 2D WSe2 and MoS2 under mild conditions using the reagent trifluoromethyl thianthrenium triflate (TTT). Chemical characterization and density functional theory calculations reveal that the trifluoromethyl groups bind covalently to surface chalcogen atoms as well as oxygen substitution sites. Trifluoromethylation induces p-type doping in the underlying 2D material, enabling the modulation of charge transport and optical emission properties in WSe2. This work introduces a versatile and efficient method for tailoring the optical and electronic properties of 2D transition metal dichalcogenides.

Low Resistance Contact to P-Type Monolayer WSe2

Advanced microelectronics in the future may require semiconducting channel materials beyond silicon. Two-dimensional (2D) semiconductors, with their atomically thin thickness, hold great promise for future electronic devices. One challenge to achieving high-performance 2D semiconductor field effect transistors (FET) is the high contact resistance at the metal-semiconductor interface. In this study, we develop a charge-transfer doping strategy with WSe2/α-RuCl3 heterostructures to achieve low-resistance ohmic contact for p-type monolayer WSe2 transistors. We show that hole doping as high as 3 × 1013 cm-2 can be achieved in the WSe2/α-RuCl3 heterostructure due to its type-III band alignment, resulting in an ohmic contact with resistance of 4 kΩ μm. Based on that, we demonstrate p-type WSe2 transistors with an on-current of 35 μA·μm-1 and an ION/IOFF ratio exceeding 109 at room temperature.

Adjustment methods of Schottky barrier height in one- and two-dimensional semiconductor devices

The Schottky contact which is a crucial interface between semiconductors and metals is becoming increasingly significant in nano-semiconductor devices. A Schottky barrier, also known as the energy barrier, controls the depletion width and carrier transport across the metal-semiconductor interface. Controlling or adjusting Schottky barrier height (SBH) has always been a vital issue in the successful operation of any semiconductor device. This review provides a comprehensive overview of the static and dynamic adjustment methods of SBH, with a particular focus on the recent advancements in nano-semiconductor devices. These methods encompass the work function of the metals, interface gap states, surface modification, image-lowering effect, external electric field, light illumination, and piezotronic effect. We also discuss strategies to overcome the Fermi-level pinning effect caused by interface gap states, including van der Waals contact and 1D edge metal contact. Finally, this review concludes with future perspectives in this field.

Can 2D Semiconductors Be Game-Changers for Nanoelectronics and Photonics?

2D semiconductors have interesting physical and chemical attributes that have led them to become one of the most intensely investigated semiconductor families in recent history. They may play a crucial role in the next technological revolution in electronics as well as optoelectronics or photonics. In this Perspective, we explore the fundamental principles and significant advancements in electronic and photonic devices comprising 2D semiconductors. We focus on strategies aimed at enhancing the performance of conventional devices and exploiting important properties of 2D semiconductors that allow fundamentally interesting device functionalities for future applications. Approaches for the realization of emerging logic transistors and memory devices as well as photovoltaics, photodetectors, electro-optical modulators, and nonlinear optics based on 2D semiconductors are discussed. We also provide a forward-looking perspective on critical remaining challenges and opportunities for basic science and technology level applications of 2D semiconductors.

On-device phase engineering

In situ tailoring of two-dimensional materials' phases under external stimulus facilitates the manipulation of their properties for electronic, quantum and energy applications. However, current methods are mainly limited to the transitions among phases with unchanged chemical stoichiometry. Here we propose on-device phase engineering that allows us to realize various lattice phases with distinct chemical stoichiometries. Using palladium and selenide as a model system, we show that a PdSe2 channel with prepatterned Pd electrodes can be transformed into Pd17Se15 and Pd4Se by thermally tailoring the chemical composition ratio of the channel. Different phase configurations can be obtained by precisely controlling the thickness and spacing of the electrodes. The device can be thus engineered to implement versatile functions in situ, such as exhibiting superconducting behaviour and achieving ultralow-contact resistance, as well as customizing the synthesis of electrocatalysts. The proposed on-device phase engineering approach exhibits a universal mechanism and can be expanded to 29 element combinations between a metal and chalcogen. Our work highlights on-device phase engineering as a promising research approach through which to exploit fundamental properties as well as their applications.

Enhanced Electrical Transport Properties of Molybdenum Disulfide Field-Effect Transistors by Using Alkali Metal Fluorides as Dielectric Capping Layers

The electronic properties of 2D materials are highly influenced by the molecular activity at their interfaces. A method was proposed to address this issue by employing passivation techniques using monolayer MoS2 field-effect transistors (FETs) while preserving high performance. Herein, we have used alkali metal fluorides as dielectric capping layers, including lithium fluoride (LiF), sodium fluoride (NaF), and potassium fluoride (KF) dielectric capping layers, to mitigate the environmental impact of oxygen and water exposure. Among them, the LiF dielectric capping layer significantly improved the transistor performance, specifically in terms of enhanced field effect mobility from 74 to 137 cm2/V·s, increased current density from 17 μA/μm to 32.13 μA/μm at a drain voltage of Vd of 1 V, and decreased subthreshold swing to 0.8 V/dec The results have been analytically verified by X-ray photoelectron spectroscopy (XPS) and Raman, and photoluminescence (PL) spectroscopy, and the demonstrated technique can be extended to other transition metal dichalcogenide (TMD)-based FETs, which can become a prospect for cutting-edge electronic applications. These findings highlight certain important trade-offs and provide insight into the significance of interface control and passivation material choice on the electrical stability, performance, and enhancement of the MoS2 FET.

Photothermionic Effect-Assisted Ultrafast Charge Transfer in NbS2/MoS2 Heterostructure

Two-dimensional (2D) van der Waals heterostructures (vdW HSs) composed of transition metal dichalcogenides (TMDCs) have emerged as frontrunners in the optoelectronics field, owing to their exceptional optical and electrical properties. Recent research on the intrinsic interlayer charge transfer mechanism has been primarily focused on the Type II HSs, while metal-semiconductor (MS) vertical HSs, promising for advancing photodetector technology, have received comparatively less attention. Here, we reveal the first experimental observation of photothermionic effect-assisted ultrafast interlayer charge transfer in the NbS2/MoS2 heterostructure using femtosecond transient absorption technology and first-principles calculations, effectively ignoring the Schottky barrier height. We demonstrate that within 500 fs, charge transfer occurs from NbS2 to MoS2 in the heterostructure, resulting in supplementary carrier generation in the visible spectrum when excited with infrared light below the MoS2 bandgap, at wavelengths of 1030 and 1500 nm. Such promising characteristics of 2D NbS2-semiconductor heterostructures offer a potential platform for synergistically combining low contact resistance with broadband photocarrier generation, marking a significant advancement in optoelectronics and light harvesting.

Ultraclean Interface of Metal Chalcogenides with Metal through Confined Interfacial Chalcogenization

Acquisition of defect-free transition metal dichalcogenides (TMDs) channels with clean heterojunctions is a critical issue in the production of TMD-based functional electronic devices. Conventional approaches have transferred TMD onto a target substrate, and then apply the typical device fabrication processes. Unfortunately, those processes cause physical and chemical defects in the TMD channels. Here, a novel synthetic process of TMD thin films, named confined interfacial chalcogenization (CIC) is proposed. In the proposed synthesis, a uniform TMDlayer is created at the Au/transition metal (TM) interface by diffusion of chalcogen through the upper Au layer and the reaction of chalcogen with the underlying TM. CIC allows for ultraclean heterojunctions with the metals, synthesis of various homo- and hetero-structured TMDs, and in situ TMD channel formation in the last stage of device fabrication. The mechanism of TMD growth is revealed by the TM-accelerated chalcogen diffusion, epitaxial growth of TMD on Au(111). We demonstrated a wafer-scale TMD-based vertical memristors which exhibit excellent statistical concordance in device performance enabled by the ultraclean heterojunctions and superior uniformity in thickness. CIC proposed in this study represents a breakthrough in in TMD-based electronic device fabrication and marking a substantial step toward practical next-generation integrated electronics.

Unraveling the Heterointegration of 3D Semiconductors on Graphene by Anchor Point Nucleation

The heterointegration of graphene with semiconductor materials and the development of graphene-based hybrid functional devices are heavily bound to the control of surface energy. Although remote epitaxy offers one of the most appealing techniques for implementing 3D/2D heterostructures, it is only suitable for polar materials and is hugely dependent on the graphene interface quality. Here, the growth of defect-free single-crystalline germanium (Ge) layers on a graphene-coated Ge substrate is demonstrated by introducing a new approach named anchor point nucleation (APN). This powerful approach based on graphene surface engineering enables the growth of semiconductors on any type of substrate covered by graphene. Through plasma treatment, defects such as dangling bonds and nanoholes, which act as preferential nucleation sites, are introduced in the graphene layer. These experimental data unravel the nature of those defects, their role in nucleation, and the mechanisms governing this technique. Additionally, high-resolution transmission microscopy combined with geometrical phase analysis established that the as-grown layers are perfectly single-crystalline, stress-free, and oriented by the substrate underneath the engineered graphene layer. These findings provide new insights into graphene engineering by plasma and open up a universal pathway for the heterointegration of high-quality 3D semiconductors on graphene for disruptive hybrid devices.

Sm and Gd Contacts in 2D Semiconductors for High-Performance Electronics and Spintronics

Two-dimensional (2D) semiconductors have attracted great attention due to their rich electronic properties and even been considered to have the potential to extend Moore's Law. However, the Schottky barrier between the metal and 2D semiconductor is formed due to the metal-induced gap states (MIGS), which greatly hinder the development of 2D semiconductor transistors in large-scale integrated circuits. Meanwhile, most air-stable 2D semiconductors are nonmagnetic, limiting the possibility of spintronic application. Here, we report a new strategy to suppress the MIGS and reduce the Schottky barrier height on 2D semiconductors (MoS2, WS2, and WSe2) by using lanthanide metal (Sm and Gd) contacts. It was found the lanthanide contacts exhibit a good Ohmic property with a near-zero Schottky barrier. As a result, the carrier mobility of MoS2 transistors reaches 118 cm2/(V s). Furthermore, Gd-contact MoS2 transistors show the typical magnetic property where the magnetoresistance reaches 2.7% at 5 K. By studying its spin valve effect, it was demonstrated that the nonlocal magnetoresistance is 4.1% and spin polarization is 3.25%. This study provides a promising pathway for high-performance 2D electronic and spintronics, which may open a new strategy for future computing-in-memory architecture.

Two-Dimensional Semiconductors and Transistors for Future Integrated Circuits

Silicon transistors are approaching their physical limit, calling for the emergence of a technological revolution. As the acknowledged ultimate version of transistor channels, 2D semiconductors are of interest for the development of post-Moore electronics due to their useful properties and all-in-one potentials. Here, the promise and current status of 2D semiconductors and transistors are reviewed, from materials and devices to integrated applications. First, we outline the evolution and challenges of silicon-based integrated circuits, followed by a detailed discussion on the properties and preparation strategies of 2D semiconductors and van der Waals heterostructures. Subsequently, the significant progress of 2D transistors, including device optimization, large-scale integration, and unconventional devices, are presented. We also examine 2D semiconductors for advanced heterogeneous and multifunctional integration beyond CMOS. Finally, the key technical challenges and potential strategies for 2D transistors and integrated circuits are also discussed. We envision that the field of 2D semiconductors and transistors could yield substantial progress in the upcoming years and hope this review will trigger the interest of scientists planning their next experiment.

van der Waals Contact for Two-Dimensional Transition Metal Dichalcogenides

Two-dimensional (2D) transition metal dichalcogenides (TMDs) have emerged as highly promising candidates for next-generation electronics owing to their atomically thin structures and surfaces devoid of dangling bonds. However, establishing high-quality metal contacts with TMDs presents a critical challenge, primarily attributed to their ultrathin bodies and delicate lattices. These distinctive characteristics render them susceptible to physical damage and chemical reactions when conventional metallization approaches involving "high-energy" processes are implemented. To tackle this challenge, the concept of van der Waals (vdW) contacts has recently been proposed as a "low-energy" alternative. Within the vdW geometry, metal contacts can be physically laminated or gently deposited onto the 2D channel of TMDs, ensuring the formation of atomically clean and electronically sharp contact interfaces while preserving the inherent properties of the 2D TMDs. Consequently, a considerable number of vdW contact devices have been extensively investigated, revealing unprecedented transport physics or exceptional device performance that was previously unachievable. This review presents recent advancements in vdW contacts for TMD transistors, discussing the merits, limitations, and prospects associated with each device geometry. By doing so, our purpose is to offer a comprehensive understanding of the current research landscape and provide insights into future directions within this rapidly evolving field.

Mechanism of Fermi Level Pinning for Metal Contacts on Molybdenum Dichalcogenide

The high contact resistance of transition metal dichalcogenide (TMD)-based devices is receiving considerable attention due to its limitation on electronic performance. The mechanism of Fermi level (EF) pinning, which causes the high contact resistance, is not thoroughly understood to date. In this study, the metal (Ni and Ag)/Mo-TMD surfaces and interfaces are characterized by X-ray photoelectron spectroscopy, atomic force microscopy, scanning tunneling microscopy and spectroscopy, and density functional theory systematically. Ni and Ag form covalent and van der Waals (vdW) interfaces on Mo-TMDs, respectively. Imperfections are detected on Mo-TMDs, which lead to electronic and spatial variations. Gap states appear after the adsorption of single and two metal atoms on Mo-TMDs. The combination of the interface reaction type (covalent or vdW), the imperfection variability of the TMD materials, and the gap states induced by contact metals with different weights are concluded to be the origins of EF pinning.

Growth of Wafer-Scale Single-Crystal 2D Semiconducting Transition Metal Dichalcogenide Monolayers

Due to extraordinary electronic and optoelectronic properties, large-scale single-crystal two-dimensional (2D) semiconducting transition metal dichalcogenide (TMD) monolayers have gained significant interest in the development of profit-making cutting-edge nano and atomic-scale devices. To explore the remarkable properties of single-crystal 2D monolayers, many strategies are proposed to achieve ultra-thin functional devices. Despite substantial attempts, the controllable growth of high-quality single-crystal 2D monolayer still needs to be improved. The quality of the 2D monolayer strongly depends on the underlying substrates primarily responsible for the formation of grain boundaries during the growth process. To restrain the grain boundaries, the epitaxial growth process plays a crucial role and becomes ideal if an appropriate single crystal substrate is selected. Therefore, this perspective focuses on the latest advances in the growth of large-scale single-crystal 2D TMD monolayers in the light of enhancing their industrial applicability. In the end, recent progress and challenges of 2D TMD materials for various potential applications are highlighted.

Room Temperature Negative Differential Resistance with High Peak Current in MoS2/WSe2 Heterostructures

Two-dimensional transition metal dichalcogenide (2D TMD) semiconductors allow facile integration of p- and n-type materials without a lattice mismatch. Here, we demonstrate gate-tunable n- and p-type junctions based on vertical heterostructures of MoS2 and WSe2 using van der Waals (vdW) contacts. The p-n junction shows negative differential resistance (NDR) due to Fowler-Nordheim (F-N) tunneling through the triangular barrier formed by applying a global back-gate bias (VGS). We also show that the integration of hexagonal boron nitride (h-BN) as an insulating tunnel barrier between MoS2 and WSe2 leads to the formation of sharp band edges and unintentional inelastic tunnelling current. The devices based on vdW contacts, global VGS, and h-BN tunnel barriers exhibit NDR with a peak current (Ipeak) of 315 μA, suggesting that the approach may be useful for applications.

Epitaxy of wafer-scale single-crystal MoS2 monolayer via buffer layer control

Monolayer molybdenum disulfide (MoS2), an emergent two-dimensional (2D) semiconductor, holds great promise for transcending the fundamental limits of silicon electronics and continue the downscaling of field-effect transistors. To realize its full potential and high-end applications, controlled synthesis of wafer-scale monolayer MoS2 single crystals on general commercial substrates is highly desired yet challenging. Here, we demonstrate the successful epitaxial growth of 2-inch single-crystal MoS2 monolayers on industry-compatible substrates of c-plane sapphire by engineering the formation of a specific interfacial reconstructed layer through the S/MoO3 precursor ratio control. The unidirectional alignment and seamless stitching of MoS2 domains across the entire wafer are demonstrated through cross-dimensional characterizations ranging from atomic- to centimeter-scale. The epitaxial monolayer MoS2 single crystal shows good wafer-scale uniformity and state-of-the-art quality, as evidenced from the ~100% phonon circular dichroism, exciton valley polarization of ~70%, room-temperature mobility of ~140 cm2v-1s-1, and on/off ratio of ~109. Our work provides a simple strategy to produce wafer-scale single-crystal 2D semiconductors on commercial insulator substrates, paving the way towards the further extension of Moore's law and industrial applications of 2D electronic circuits.

Controlled Preparation of High Quality Bubble-Free and Uniform Conducting Interfaces of Vertical van der Waals Heterostructures of Arrays

Sharp and clean interfaces of van der Waals (vdW) heterostructures are highly demanded in two-dimensional (2D) materials-based devices. However, current assembly methods usually cause interfacial bubbles and wrinkles, hindering carrier interlayer transport. The preparation of a large-scale vdW heterostructure with a bubble-free interface is still a challenge. Although many efforts have been made to eliminate bubbles, the evolution processes of the interfacial bubbles are rarely studied. Here, the interface bubble formation and evolution of the transferred 2D materials and their vdW heterostructure are systemically studied by the atomic force microscopy (AFM) technique and high-resolution surface current mapping. A thermal annealing procedure is developed to reduce the number of bubbles and to improve the quality of interfaces. In addition, influences of the interface residues and nanosteps on bubble evolution are also discussed. Further, we develop the polystyrene (PS)-mediated polydimethylsiloxane (PDMS) transfer technique to realize the high-quality transfer of heterostructure arrays. Finally, high-resolution surface current mapping results confirm that we can now produce highly uniform electrical conduction interfaces of heterojunctions. This study provides guidance for assembling high quality interfaces and paves the way for production of bubble-free heterostructure-based electronic devices with high performance and good uniformity.

Contacts at the Nanoscale and for Nanomaterials

Contact scaling is a major challenge in nano complementary metal-oxide-semiconductor (CMOS) technology, as the surface roughness, contact size, film thicknesses, and undoped substrate become more problematic as the technology shrinks to the nanometer range. These factors increase the contact resistance and the nonlinearity of the current-voltage characteristics, which could limit the benefits of the further downsizing of CMOS devices. This review discusses issues related to the contact size reduction of nano CMOS technology and the validity of the Schottky junction model at the nanoscale. The difficulties, such as the limited doping level and choices of metal for band alignment, Fermi-level pinning, and van der Waals gap, in achieving transparent ohmic contacts with emerging two-dimensional materials are also examined. Finally, various methods for improving ohmic contacts' characteristics, such as two-dimensional/metal van der Waals contacts and hybrid contacts, junction doping technology, phase and bandgap modification effects, buffer layers, are highlighted.

Metal Films on Two-Dimensional Materials: van der Waals Contacts and Raman Enhancement

Electronic devices based on two-dimensional (2D) materials will need ultraclean and defect-free van der Waals (vdW) contacts with three-dimensional (3D) metals. It is therefore important to understand how vdW metal films deposit on 2D surfaces. Here, we study the growth and nucleation of vdW metal films of indium (In) and non-vdW metal films of gold (Au), deposited on 2D MoS2 and graphene. In follows a 2D growth mode in contrast to Au that follows a 3D growth mode. Atomic force microscopy (AFM) and scanning electron microscopy (SEM) were used to image the morphology of metal clusters during growth and quantify the nucleation density. As compared to Au, In atoms exhibit nearly 50 times higher diffusivity (3.65 × 10-6 μm-2 s-1) and half the nucleation density (64.9 ± 2.46 μm-2), leading to larger grain sizes (∼60 nm for 5 nm In on monolayer MoS2). The grain size of In can be further increased by reducing the 2D surface roughness, while the grain size for Au is limited by its high nucleation density due to the creation of interface defects during deposition. The vdW gap between In and MoS2 and graphene leads to strong enhancement (>103) in their Raman signal intensity due to localized surface plasmon resonance. In the absence of a vdW gap, the plasmon-mediated enhancement in Raman does not occur.

Ultrahigh Photosensitivity Based on Single-Step Lay-on Integration of Freestanding Two-Dimensional Transition-Metal Dichalcogenide

Two-dimensional transition-metal dichalcogenides have attracted significant attention because of their unique intrinsic properties, such as high transparency, good flexibility, atomically thin structure, and predictable electron transport. However, the current state of device performance in monolayer transition-metal dichalcogenide-based optoelectronics is far from commercialization, because of its substantial strain on the heterogeneous planar substrate and its robust metal deposition, which causes crystalline damage. In this study, we show that strain-relaxed and undamaged monolayer WSe2 can improve a device performance significantly. We propose here an original point-cell-type photodetector. The device consists in a monolayer of an absorbing TMD (i.e., WSe2) simply deposited on a structured electrode, i.e., core-shell silicon-gold nanopillars. The maximum photoresponsivity of the device is found to be 23.16 A/W, which is a significantly high value for monolayer WSe2-based photodetectors. Such point-cell photodetectors can resolve the critical issues of 2D materials, leading to tremendous improvements in device performance.

Strain-Driven High Thermal Conductivity in Hexagonal Boron Phosphide Monolayer

Two-dimensional graphenelike material, hexagonal boron phosphide (h-BP), is a promising candidate for electronic and optoelectronic devices because of its suitable band gap and high carrier mobility. Especially from the ultrahigh lattice thermal conductivity (κl), it exhibits great potential to solve the challenges of future thermal management applications. Here, the excellent lattice thermal transport properties of the h-BP monolayer are systematically analyzed at the atomic level based on the first-principles method. The results show that the ultrahigh κl value of the h-BP monolayer is attributed to its high phonon group velocity and long phonon lifetime and the strong phonon hydrodynamic effect. We further explore the influence of the tensile strain on the thermal transport properties of the h-BP monolayer. As the strain increases from 0 to 8%, the κl value shows a trend of first increasing and then decreasing due to the coeffect of strain-driven changes for phonon harmonicity and anharmonicity. Under a strain of 6%, the κl value of the h-BP monolayer is as high as 795 W/mK at 300 K, which is about 2.22 times larger than that of 357 W/mK without strain. Such a significant increase in the κl value is mainly due to the increased phonon group velocity and decreased Grüneisen parameter caused by strain. This work is helpful to understand the critical role of tensile strain in lattice thermal transport of two-dimensional graphenelike materials. It is conducive to promoting the thermal management application of the h-BP monolayer.

Tunable Contacts of Bi2 O2 Se Nanosheets MSM Photodetectors by Metal-Assisted Transfer Approach for Self-Powered Near-Infrared Photodetection

Owing to the Fermi pinning effect arose in the metal electrodes deposition process, metal-semiconductor contact is always independent on the work function, which challenges the next-generation optoelectronic devices. In this work, a metal-assisted transfer approach is developed to transfer Bi2 O2 Se nanosheets onto the pre-deposited metal electrodes, benefiting to the tunable metal-semiconductor contact. The success in Bi2 O2 Se nanosheets transfer is contributed to the stronger van der Waals adhesion of metal electrodes than that of growth substrates. With the pre-deposited asymmetric electrodes, the self-powered near-infrared photodetectors are realized, demonstrating low dark current of 0.04 pA, high Ilight /Idark ratio of 380, fast rise and decay times of 4 and 6 ms, respectively, under the illumination of 1310 nm laser. By pre-depositing the metal electrodes on polyimide and glass, high-performance flexible and omnidirectional self-powered near-infrared photodetectors are achieved successfully. This study opens up new opportunities for low-dimensional semiconductors in next-generation high-performance optoelectronic devices.

2D Materials in Flexible Electronics: Recent Advances and Future Prospectives

Flexible electronics have recently gained considerable attention due to their potential to provide new and innovative solutions to a wide range of challenges in various electronic fields. These electronics require specific material properties and performance because they need to be integrated into a variety of surfaces or folded and rolled for newly formatted electronics. Two-dimensional (2D) materials have emerged as promising candidates for flexible electronics due to their unique mechanical, electrical, and optical properties, as well as their compatibility with other materials, enabling the creation of various flexible electronic devices. This article provides a comprehensive review of the progress made in developing flexible electronic devices using 2D materials. In addition, it highlights the key aspects of materials, scalable material production, and device fabrication processes for flexible applications, along with important examples of demonstrations that achieved breakthroughs in various flexible and wearable electronic applications. Finally, we discuss the opportunities, current challenges, potential solutions, and future investigative directions about this field.

Galinstan Liquid Metal Electrical Contacts for Monolayer-Modified Silicon Surfaces

Galinstan is the brand name for a low-melting gallium-based alloy, which is a promising nontoxic alternative to mercury, the only elemental metal found in the liquid state at room temperature. Liquid alloys such as Galinstan have found applications as electromechanical actuators, sensors, and soft contacts for molecular electronics. In this work, we validate the scope of Galinstan top contacts to probe the electrical characteristics of Schottky junctions made on Si(111) and Si(211) crystals modified with Si-C-bound organic monolayers. We show that the surface-to-volume ratio of the Galinstan drop used as a macroscopic contact defines the junction stability. Further, we explore chemical strategies to increase Galinstan surface tension to obtain control over the junction area, hence improving the repeatability and reproducibility of current-voltage (I-V) measurements. We explore Galinstan top contacts as a means to monitor changes in rectification ratios caused by surface reactions and use these data, most notably the static junction leakage, toward making qualitative predictions on the DC outputs recorded when these semiconductor systems are incorporated in Schottky-based triboelectric nanogenerators. We found that the introduction of iron particles leads to poor data repeatability for capacitance-voltage (C-V) measurements but has only a small negative impact in a dynamic current measurement (I-V).

Ultrashort vertical-channel MoS2 transistor using a self-aligned contact

Two-dimensional (2D) semiconductors hold great promises for ultra-scaled transistors. In particular, the gate length of MoS2 transistor has been scaled to 1 nm and 0.3 nm using single wall carbon nanotube and graphene, respectively. However, simultaneously scaling the channel length of these short-gate transistor is still challenging, and could be largely attributed to the processing difficulties to precisely align source-drain contact with gate electrode. Here, we report a self-alignment process for realizing ultra-scaled 2D transistors. By mechanically folding a graphene/BN/MoS2 heterostructure, source-drain metals could be precisely aligned around the folded edge, and the channel length is only dictated by heterostructure thickness. Together, we could realize sub-1 nm gate length and sub-50 nm channel length for vertical MoS2 transistor simultaneously. The self-aligned device exhibits on-off ratio over 105 and on-state current of 250 μA/μm at 4 V bias, which is over 40 times higher compared to control sample without self-alignment process.

Healing Donor Defect States in CVD-Grown MoS2 Field-Effect Transistors Using Oxygen Plasma with a Channel-Protecting Barrier

Molybdenum disulfide (MoS2 ), a metal dichalcogenide, is a promising channel material for highly integrated scalable transistors. However, intrinsic donor defect states, such as sulfur vacancies (Vs ), can degrade the channel properties and lead to undesired n-doping. A method for healing the donor defect states in monolayer MoS2 is proposed using oxygen plasma, with an aluminum oxide (Al2 O3 ) barrier layer that protects the MoS2 channel from damage by plasma treatment. Successful healing of donor defect states in MoS2 by oxygen atoms, even in the presence of an Al2 O3 barrier layer, is confirmed by X-ray photoelectron spectroscopy, photoluminescence, and Raman spectroscopy. Despite the decrease in 2D sheet carrier concentration (Δn2D = -3.82×1012 cm-2 ), the proposed approach increases the on-current and mobility by 18% and 44% under optimal conditions, respectively. Metal-insulator transition occurs at electron concentrations of 5.7×1012 cm-2 and reflects improved channel quality. Finally, the activation energy (Ea ) reduces at all the gate voltages (VG ) owing to a decrease in Vs , which act as a localized state after the oxygen plasma treatment. This study demonstrates the feasibility of plasma-assisted healing of defects in 2D materials and electrical property enhancement and paves the way for the development of next-generation electronic devices.